Re: Which port for armv4l?

[Tixy <tixy@yxit.co.uk>]

On Wed, 2016-08-17 at 11:19 +0200, Adam Wysocki wrote:
> On Wed, 17 Aug 2016, Tixy wrote:
> 
> > BX is the only ARM state instruction on ARMv4 that exists for Thumb
> > interworking.
> 
> What about other (conditional) branch exchange instructions (BXCC, BXNE 
> etc.)?

That's a BX instruction with condition checks, I was treating that as
the same instruction (all older ARM instructions supported conditional
execution, it's the top 4 bits of the instruction encoding).

> 
> > Why would the code be trying to enter Thumb state if it isn't compiled
> > for Thumb?
> 
> Is it possible for a compiler to generate BX instructions without Thumb 
> code (for example to return from a function with bx lr, where lr will 
> always be even - no Thumb)?

I believe so. If my memory serves me "BX reg" was recommended over "MOV
PC,reg" so binaries built for ARM4T would likely use it even when they
are built for ARM code rather than Thumb. (It makes sense as it means
that code can be interwork happily with binaries built using Thumb
instructions)

> Correct me if I'm wrong, but I thought that BX patch (to emulate BX 
> instruction in kernel) was supposed to allow running code with BX 
> instructions on a processor that lacks it, and that's why I want to use it 
> (to run Debian for armel on StrongARM SA-1100, which has ARMv4 core, so 
> without Thumb). Code in Debian for armel architecture doesn't use Thumb?

Correct. I run armel on ARMv5 devices that doesn't have Thumb (Marvel
Kirkwood SoCs) though it does have support for BX (which was added to
ARMv5 as a mandatory instruction even if Thumb is not supported).

> > > Shouldn't the patch handle addresses with bit0=1 differently?
> > 
> > I haven't looked at the patch so don't see what it does,

I have looked now.

> It just copies contents of the register specified in the last nibble of 
> the instruction to PC.
> 
>         int reg = instr & 0xf;
>         regs->ARM_pc = regs->uregs[reg];

Yes, and when the exception returns, the register values will be
restored from that 'regs' structure. This will use an LDM (load
multiple) instruction and the fact that PC has bit zero set or not won't
matter on ARM4 devices (even ARM4T devices). And anyway, if the binary
is compiled for ARM code not Thumb it won't be calling BX to load a
value with bit 0 set anyway, because on ARM4T CPUs that would switch to
Thumb mode and things would go horribly wrong if the binaries in the
system were build for ARM not Thumb.

-- 
Tixy