Re: WAW and RAW warnings in kernel build
>>>>> On 05 Aug 2003 10:19:08 -0600, Al Stone <ahs3@fc.hp.com> said:
Al> If someone will send me the snippets of code with the warnings,
Al> I'll take a look at both the code and gas to see what it's
Al> doing....
Here are some typical examples (from the linux kernel sources):
arch/ia64/kernel/fsys.S: Assembler messages:
arch/ia64/kernel/fsys.S:409: Warning: Use of 'mov.m' violates RAW dependency 'PSR.si' (data)
arch/ia64/kernel/fsys.S:409: Warning: Only the first path encountering the conflict is reported
arch/ia64/kernel/fsys.S:405: Warning: This is the location of the conflicting usage
The problem here is that gas gets totally confused. It thinks that the
previous instruction:
mov psr.l=r9 // slam the door (17 cyc to srlz.i)
may be modifying PSR.si (secure interval timer). This isn't so bad, except
the next instruction:
mov.m r24=ar.rnat // read ar.rnat (5 cyc lat)
reads RNAT and gas doesn't seem to realize that it's not reading ITC,
so the warning message it's issuing is complete bogus. Adding a
srlz.d between the "move-to-psr" and "move-from-ar" instruction makes
the warning go away, but of course that's unacceptable, because srlz.d
is slow (12 cycles) and this is performance-critical code.
Next example:
arch/ia64/kernel/ivt.S: Assembler messages:
arch/ia64/kernel/ivt.S:187: Warning: Use of 'ld8' violates RAW dependency 'DTC' (data)
This message is bogus because the ld8 it's complaining about is
guaranteed NOT to access the TLB entry that was previously inserted
(since we're inserting a user-level TLB entry and we're accessing
kernel page table).
Then there are a couple of warnings because GCC doesn't provide sufficient
.pred.rel.mutex info in some cases. Typical example looks like this:
{standard input}: Assembler messages:
{standard input}:1055: Warning: Use of 'cmp4.le' violates WAW dependency 'PR%, % in 1 - 15' (impliedf), specific resource number is 14
{standard input}:1055: Warning: Only the first path encountering the conflict is reported
--david
Reply to: