Re: New gcc
Jim Pick <firstname.lastname@example.org> writes:
> The big difference of the StrongARM over older generations of the ARM
> chips was primarily the addition of extra cache and some other
> internal stuff plus a higher clock rate. There was a good application
> note on the Acorn website about the differences, but their site seems
> to be down.
The Acorn site is up now. Here's the note:
Significant StrongARM features
* 202MHz core clock
* 5-stage pipeline (Fetch, Issue, Execute, Buffer, Write)
* Separate 16K write-back data cache and 16K instruction cache
* 8 entry write buffer, each entry holding 1-16 bytes
* Fast 32 and 64 bit result multiply instructions
* Averages fewer cycles per instruction than previous ARMs
So the key difference is that it's just a faster all-around chip.