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Re: debian architecture history question



On 20100615_043423, Stan Hoeppner wrote:
> Aaron Toponce put forth on 6/14/2010 10:02 AM:
> > On 6/12/2010 8:11 PM, Anand Sivaram wrote:
> >> On Fri, Jun 11, 2010 at 22:39, Aaron Toponce <aaron.toponce@gmail.com
> >> <mailto:aaron.toponce@gmail.com>> wrote:
> >>     Other than the kernel, which is compiled for 686 instruction sets, and
> >>     maybe a few core packages that would benefit from targeting the 686
> >>     architecture, Debian compiles the rest of the packages against 386.
> >> There is no 386 kernel available.  Kernel starts from 486 only.
> > 
> > I never mentioned there was a 386 kernel.
> 
> Disclaimer:  my comments below intentionally exclude x86-64 capable CPUs
> 
> 
> There are different kernels for different models of the Intel x86 processor
> family and compatibles, but make no mistake, they all use the same instruction
> set introduced in the 80386.  There is no i686 instruction set, nor an i586 or
> i486 instruction set.  As a matter of fact, the latter of these aren't even
> models of Intel CPUs.  What kernel programmers call i586 and i686 are actually
> classes or sets of features of Intel and compatible competitor CPUs from
> Cyrix, IBM, TI, and AMD.  The original Intel 60/66 MHz Pentium model number is
> actually 80501.  All Pentiums up to the MMX models were numbered 80502.  The
> i686 kernel label describes the Pentium Pro, whose model number is 80521, and
> all other later 32 bit x86 CPUs to follow it.
> 
> The differences in the kernels designed for (notice I did not say _compiled_
> for) each of these CPU generations/models has nothing to do with different
> instruction sets (remember they all use the same ISA), but with specific
> features found in these various CPUs and/or features of the platform classes.
>  For example, to use PCI devices and to map them into memory properly requires
> support in the kernel, as does mapping PCI IRQs.  80386/80486 systems don't
> have PCI buses but only ISA (and very rarely VESA) buses and thus don't
> require the kernel code to support PCI.  Likewise, the 80[34]86 and the 80501
> don't offer 36 bits of addressing nor PAE.  The 80521 Pentium Pro and later
> CPUs do.  PAE support requires kernel code to enable and use up to 64GB of
> physical memory.
> 
> The main difference between the 80521 Pentium Pro and earlier CPUs, other than
> the software transparent decoupled CISC/RISC core, is in cache and memory
> management.  The 80521 introduced the now ubiquitous dedicated L2 cache bus,
> called a "backside bus" and an L2 cache fully controlled by the CPU core MMU.
>  All previous CPUs dating back to the 80486 had their L2 caches sitting on the
> main system bus which created a bottleneck.  Moving the L2 cache to a
> dedicated bus required a more sophisticated on chip MMU.  This also requires
> kernel support, and AFAIK is the main difference between "i686" kernels and
> the "i486 i586" kernels.  The other significant difference is the 36 bit
> physical address bus of the PPro and Physical Address Extensions, or PAE.
> When using one of the i686-bigmem kernels, PAE is enabled and the kernel can
> directly access up to 64GB of installed RAM.
> 
> Again, the differences in the various 32bit kernels have nothing to do with
> the instruction sets being different.  They are identical.  The differences in
> the kernels are due to underlying features of the processor models and
> features of their respective platforms, _not the instruction sets_.
> 
> -- 
> Stan

Help me understand this issue better. There are kernel versions in
Debian that are labeled i686 and i386. If they use the 'same
instruction set', then they must differ in some other way than the
'instruction set'. Correct? In what way do they differ? I suppose it
is in the way those instructions are arranged, or what?

I don't have computers of the several different Intel chip versions, so
I can't experiment, but I suppose that an i686 kernel would not work well
on a chip that has the older arrangement of L2 cache. I would also suppose
that an i386 kernel would work on a chip that does have the newer L2 cache,
but would not actually use the new features and would therefore be slower
in execution. Yes/no ? 

My original issue was trying to establish a rational basis for selecting
software packages to download. Of course, originally I was mistaken as to
the extent of this problem. I had thought that almost all packages were 
offered in different i[36]86 versions. I soon learned that it was only
kernel packages that are at issue. But for these packages, if the instruction
set for the two classes of chip are the same, what is it that is different 
from the point of view of the kernel software requirements?

I think I have repeated the same question several times with different
wording. If none of these wordings fit the underlying reality, please
suggest a better question.

-- 
Paul E Condon           
pecondon@mesanetworks.net


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