Re: Amount of RAM L1 cache on a processor will support
On Wed, Dec 12, 2001 at 03:14:20PM -0500, David Teague wrote:
|
| Thanks to Aaron, Nate, dman, and Gary, especially for the web page
| references. I'll spend some time looking at that before asking
| again.
|
| Your articles were enlightening, but you don't address my question.
...
| I have spent considerable time pouring over google references and
| have found Alan Cox's article about the issue of a machine having
| too little tag ram. I also found articles about the 430 chip set and
| the tag ram having 8 bits restricting maximum cacheable memory to
| what? 64MB and 11 bits restricting to some larger number.
...
| I went to AMDs web site and looked at the documents for the Athlon.
| They say the chip has 256K of "L2" cache. That cache is still on
| chip, and I prefere to call that "L1", and I prefer to call the data
| stream cache and instruction stream cache just that, instruction
| cache and data cache.
|
| Incidentaily I don't understand how the instruction cache or data
| cache can be thought of as caching against main memory.
What is in main memory, if it isn't instructions and data? That is
all a computer stores. The difference is how close the 2 caches are
to the CPU core, and how big they are. L1 cache is faster, but
smaller. L2 cache is bigger than L1, faster than main memory, but
slower than L1 cache.
| According to the diagrams in the article from AMD what they call
| "L1" cache is used to cache data and instructions from the L2 cache
| which in turn actually caches against main memory.
This is what older ones did, but AMD says that the ones they currently
manufacture have both L1 and L2 cache directly caching against main
memory.
| The article says "that the L2 cache being on the processor makes the
| maximum cacheable memory 'non-issue'." I find that hard to believe,
| unless there is something about the architecture the author isn't
| saying.
|
| The bottom line is that they say exactly zip about the tag ram. How
| the blazes do I find out how big the cache pages are and how much
| tag ram the Athlon cache has? Once i know these bits of data I can
| determine how much RAM the thing will cache.
According to the article(s) (that I read), if you have the main
memory, and you try to use it, it will be cached.
| The MoBo uses 266 MHz front side bus, and the DDR (double data rate)
| RAM is 266 MHz (unless there something else I either never knew or
| have forgotton) That suggests to me that the whole of memory is as
| fast as some early caches were.
Yeah, I'm sure it is. Did a PDP-11 have any cache? (yes, an
exaggeration, I know)
HTH and Hope Everything I've said is correct :-),
-D
--
"Don't use C; In my opinion, C is a library programming language
not an app programming language." - Owen Taylor (GTK+ developer)
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