Re: Debian needs more buildds. It has offers. They aren't being accepted.
On Thu, Mar 18, 2004 at 05:19:26PM +0100, Bernhard R. Link wrote:
> * Stephen Frost <email@example.com> [040318 15:11]:
> > So, the 2nd r5k (hawking) is now online w/ a slightly slower CPU (150Mhz
> > compared to 180Mhz) and somewhat less ram (90MB compared to 190MB). I
> > expect to have it ready to be set up as buildd by the end of this week
> > (today or tommorow).
> What are the real speads here? When I remember correctly I once saw
> a 250 Mhz r4k beeing half as fast as a 150 Mhz r5k, at least by the
> bogomips-numbers the kernel reported. Does anyone know what the
> important numbers are?
Well, bogomips numbers are not very telling... ;)
mips r4400SC, 200 MHz
cpu model : R4400SC V6.0 FPU V0.0
BogoMIPS : 99.73
No R10k at reach atm.
But when using a "real world benchmark" named dnetc ;)), the m68060 was as
speedy as a R10k at 195 MHz.
Of course the dnetc benchmark is quite, uhm, well, wrong for some reasons.
Dnetc makes extensive use of commands that the mips CPU don't have (bit
shift left/right or so, IIRC). OTOH, the m68060 has no full FPU, which might
give significant drawbacks in build time for such packages like axiom.
There might always be some differences between CPUs, be it on the same arch,
be it cross arch. The 060 is f.e. 2-4x faster than the 040, although it's
just clocked 10 MHz fast. On some operation the speed up is even 10-20x
faster. On some others the 040 outperforms the 060 (FPU).
Taking this in deliberation we could say: ok, let's drop all 040 machines as
buildds for m68k. They are too slow (yes, m68k is slow, no need to start
another ancient architecture or doorstopper comment again). But the 040s do
take worthwhile load off the 060s *and* because there are differences in the
CPU subarch between 060s and 040s m68k sometimes detect ICEs on 040s that
are don't happen on 060s.
So, argueing that mips should only use r5ks as buildds because r4ks are too
slow, is IMHO shortsighted. Even a dead slow R4600PC 133 MHz CPU can be of
help if there's a backlog. Uh, is the L2 Cache support on mips in the
meanwhile? When not, SC CPUs doesn't help speeding up things at all...