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Re: Debian stock kernel config -- CONFIG_NR_CPUS=32?



>
>
>
>---- Original Message ----
>From: ron.l.johnson@cox.net
>To: debian-user@lists.debian.org
>Subject: Re: Debian stock kernel config -- CONFIG_NR_CPUS=32?
>Date: Fri, 22 Oct 2010 02:00:45 -0500
>
>>On 10/22/2010 12:53 AM, Arthur Machlas wrote:
>>> On Thu, Oct 21, 2010 at 8:15 PM, Andrew
>Reid<reidac@bellatlantic.net>  wrote:
>>>>   But I'm curious if anyone on the list knows the rationale for
>>>> distributing kernels with this set to 32.  Is that just a
>>>> reasonable number that's never been updated?  Or is there some
>>>> complication that arises after 32 cores, and should I be more
>>>> careful about tuning other parameters?
>>>
>>> I've always set the number of cores to exactly how many I have x2
>when
>>> I roll my own, which on my puny systems is either 4 or 8. I seem
>to
>>> recall reading that there is a slight performance hit for every
>core
>>> you support.
>>
>>Correct.  The amount of effort needed for cross-CPU communication, 
>>cache coherency and OS process coordination increases much more than
>
>>linearly as you add CPUs.

In fact IIRC the additional overhead follows the square of the number
of CPUs.  I seem to recall this was called Amdahl's Law after Gene
Amdahl of IBM (and later his own company)
Larry

>>
>>Crossbar communication (introduced first, I think, by DEC/Compaq in 
>>2001) eliminated a lot of the latency in multi-CPU communications 
>>which plagues bus-based systems.
>>
>>AMD used a similar mesh in it's dual-core CPUs (not surprising, 
>>since many DEC engineer went to AMD).  Harder to design, but much 
>>faster.
>>
>>Intel's first (and 2nd?) gen multi-core machines were bus-based; 
>>easier to design, quicker to get to market, but a lot slower.
>>
>>(OP's machine is certainly NUMA, where communication between cores 
>>on a chip is much faster than communication with cores on a 
>>different chip.)
>>
>>>              Or was it memory hit? Or was that a bong hit I'm
>thinking
>>> of?
>>>
>>
>>
>>
>>-- 
>>Seek truth from facts.
>>
>>
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