RE: AWE64 & losing my mind!!! (short trip)
On 05-May-98 Greg Norris wrote:
> During the kernel (2.0.33) configuration, I selected the following
> options:
>
> Sound card support: module
> Sound Blaster (SB, SBPro, SB16, clones) support
> Generic OPL2/OPL3 FM synthesizer support
> /dev/dsp and /dev/audio support
> MIDI interface support
> FM synthesizer (YM3812/OPL-3) support
> I/O base for SB: 220
> Sound Blaster IRQ: 5
> Sound Blaster DMA: 1
> Sound Blaster 16 bit DMA: 5
> MPU401 I/O base of SB16: 330
> SB MPU401 IRQ: -1
> Audio DMA buffer size: 65536
>
> No other sound-related options sere selected.
Did you also select the low-level sound driver AWE32 Synth?
FWIW, I had to use IRQ 7 and DMA 7 to get mine to work. YMMV.
My isapnp.conf is attached. Still heavily commented though.
--
Mike Brownlow <mike@ctelcom.net>
# $Id: pnpdump.c,v 1.9 1997/06/10 21:37:32 fox Exp $
# This is free software, see the sources for details.
# This software has NO WARRANTY, use at your OWN RISK
#
# For details of this file format, see isapnp.conf(5)
#
# For latest information on isapnp and pnpdump see:
# http://www.roestock.demon.co.uk/isapnptools/
#
# Compiler flags: -DREALTIME -DNEEDSETSCHEDULER
#
# Trying port address 0203
# Board 1 has serial identifier 96 03 d4 5a 0b 9e 00 8c 0e
# (DEBUG)
(VERIFYLD N)
(READPORT 0x0203)
(ISOLATE)
(IDENTIFY *)
# Card 1: (serial identifier 96 03 d4 5a 0b 9e 00 8c 0e)
# CTL009e Serial No 64248331 [checksum 96]
# Version 1.0, Vendor version 2.0
# ANSI string -->Creative SB AWE64 Gold<--
#
# Logical device id CTL0044
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if r
equired
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL009e/64248331 (LD 0
# ANSI string -->Audio<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# IRQ 5.
# High true, edge sensitive interrupt (by default)
(INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 1.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
(DMA 0 (CHANNEL 1))
# Next DMA channel 5.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
(DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0220
# IO base alignment 1 bytes
# Number of IO addresses required: 16
(IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0330
# Maximum IO base address 0x0330
# IO base alignment 1 bytes
# Number of IO addresses required: 2
(IO 1 (BASE 0x0330))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
(IO 2 (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (BASE 0x0300))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (BASE 0x0300))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Start dependent functions: priority functional
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 16 bytes
# Number of IO addresses required: 2
# (IO 1 (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0394
# IO base alignment 4 bytes
# Number of IO addresses required: 4
# (IO 2 (BASE 0x0388))
# End dependent functions
(ACT Y)
))
#
# Logical device id CTL7002
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if r
equired
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL009e/64248331 (LD 1
# Compatible device id PNPb02f
# ANSI string -->Game<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0200
# Maximum IO base address 0x0200
# IO base alignment 1 bytes
# Number of IO addresses required: 8
(IO 0 (BASE 0x0200))
# Start dependent functions: priority acceptable
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0200
# Maximum IO base address 0x0208
# IO base alignment 8 bytes
# Number of IO addresses required: 8
# (IO 0 (BASE 0x0200))
# End dependent functions
(ACT Y)
))
#
# Logical device id CTL0023
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if r
equired
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL009e/64248331 (LD 2
# ANSI string -->WaveTable<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0620
# Maximum IO base address 0x0620
# IO base alignment 1 bytes
# Number of IO addresses required: 4
(IO 0 (BASE 0x0620))
(IO 1 (BASE 0x0A20))
(IO 2 (BASE 0x0E20))
# Start dependent functions: priority acceptable
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0620
# Maximum IO base address 0x0680
# IO base alignment 32 bytes
# Number of IO addresses required: 4
# (IO 0 (BASE 0x0620))
# End dependent functions
(ACT Y)
))
# End tag... Checksum 0x00 (OK)
# Returns all cards to the "Wait for Key" state
(WAITFORKEY)
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