Re: 2.6.0-test6
On Fri, 3 Oct 2003 09:45:39 -0500
"Paul" <paul@techcenter3000.com> wrote:
> http://docs.sun.com/db/doc/805-7764-12/6j7a77hhh?a=view#z400010a55fa
> "The UPA 64-bit data bus provides the connection between the CPU module and
> the UPA graphics. The 64-bit UPA data shares the data bus with memory
> through six transceiver chips."
>
> Clock speed of UPA varies.
While data may run over the UPA bus in individual 64-bit cycles
the maximum transaction size supported by the bus is 64-bytes
(which also happens to be the size of a L2 cache lines on UltraSPARC).
And if you only write 64-bits from the cpu at one time onto UPA,
you have to eat the cost of requesting the bus multiple times to
move a total of 64-bytes over that bus instead of once using the
special 64-byte block load and store instructions that UltraSPARC
has.
> > Again I am reminded of why I don't post on mailing lists much
> > anymore, because I always hit one of these idiotic threads...
> So a request for information and clarification is...ohhh, never mind.
I guess gone are the good ole' days where people go learn things
before posting to mailing lists.
> Which OS's did you write?
I didn't "WRITE" and OS, that takes more than one person usually.
What I did do was "PORT" an OS onto the various Sparc platforms.
I worked on Linux during this entire time, starting with sun4c systems
all the way to current day UltraSPARCs.
It's funny someone would post on debian-sparc trying to sound knowledgable
and not even know that's he's engaged in conversation with the primary
author of the Linux kernel support for Sparc.
Reply to: