Re: Netra X1 boot getting closer
David S. Miller writes:
>
> > > The dmfe in the X1 is identified as a Davicom 9102 on boot, it doesn't say
> > > DM9102(A) though.
> >
> > The tulip driver reports it as a DM9102(A) I guess that is probably
> > telling the truth but you never know.
> >
> > As for getting things to work on a Netra-X1 I have am able to get to
> > full multiuser mode (Suse-7.1) but have no network so that makes it
> > quite difficult to do things at present. I've still got a few issues
> > with the realtime clock (it always seems to report year as 2000) but
> > the network is my main priority at the moment.
>
> Have you been in contact with Jeff Garzik, the tulip maintainer?
> He can certainly assist you.
>
Yes, he suggested trying the dmfe.c driver. I have included a patch
for what I have done so far. The device isn't working as yet but the
driver does seem to be trying to talk to the card and isn't
complaining too much but I'm not seeing any traffic on my network
though.
The driver is basically reporting
"eth1: Tx timeout - resetting"
a couple of times when I try to configure the card. I have tried
specifying debug (level 5) when I do the modprobe. That gives the
following messages. Oh and I did use ifconfig to give an ethernet
address prior to assigning an inet address.
Jun 27 23:55:00 linux kernel: Davicom DM9xxx net driver, version 1.36p1 (May 12, 2001)
Jun 27 23:55:00 linux kernel: <DMFE>: dmfe_init_one() 0
Jun 27 23:55:00 linux kernel: eth0: Davicom DM9102 at 0x1fe02010100, 00:00:00:00:00:00, IRQ 7176448
Jun 27 23:55:00 linux kernel: <DMFE>: dmfe_init_one() 0
Jun 27 23:55:00 linux kernel: eth1: Davicom DM9102 at 0x1fe02010000, 00:00:00:00:00:00, IRQ 7175744
Jun 27 23:55:08 linux kernel: <DMFE>: dmfe_open 0
Jun 27 23:55:08 linux kernel: <DMFE>: dmfe_init_dm910x() 0
Jun 27 23:55:08 linux kernel: <DMFE>: dmfe_parse_srom() 0
Jun 27 23:55:08 linux kernel: <DMFE>: dmfe_descriptor_init() 0
Jun 27 23:55:08 linux kernel: <DMFE>: send_filter_frame() 0
Jun 27 23:55:08 linux kernel: <DMFE>: dmfe_set_filter_mode() 0
Jun 27 23:55:08 linux kernel: <DMFE>: Set multicast address 0
Jun 27 23:55:08 linux kernel: <DMFE>: send_filter_frame() 0
Jun 27 23:55:08 linux kernel: <DMFE>: dmfe_set_filter_mode() 0
Jun 27 23:55:08 linux kernel: <DMFE>: Set multicast address 1
Jun 27 23:55:08 linux kernel: <DMFE>: send_filter_frame() 0
Jun 27 23:55:08 linux kernel: <DMFE>: dmfe_set_filter_mode() 0
Jun 27 23:55:08 linux kernel: <DMFE>: Set multicast address 2
Jun 27 23:55:08 linux kernel: <DMFE>: send_filter_frame() 0
Jun 27 23:55:08 linux kernel: <DMFE>: dmfe_set_filter_mode() 0
Jun 27 23:55:08 linux kernel: <DMFE>: Set multicast address 3
Jun 27 23:55:08 linux kernel: <DMFE>: send_filter_frame() 0
Jun 27 23:55:08 linux kernel: <DMFE>: dmfe_set_filter_mode() 0
Jun 27 23:55:08 linux kernel: <DMFE>: Set multicast address 3
Jun 27 23:55:08 linux kernel: <DMFE>: send_filter_frame() 0
Jun 27 23:55:09 linux kernel: <DMFE>: dmfe_start_xmit 0
Jun 27 23:55:10 linux kernel: <DMFE>: dmfe_start_xmit 0
Jun 27 23:55:11 linux kernel: <DMFE>: dmfe_timer() 0
Jun 27 23:55:13 linux kernel: <DMFE>: dmfe_start_xmit 0
Jun 27 23:55:14 linux last message repeated 2 times
...
Some comments on what I put in the patch.
1) Increased interrupt value from 1 byte to an integer.
2) Not sure about the entries in rx_desc and tx_desc. I put 2 ulongs
in there and dropped the 2 u32 values which do not seem to be used. I
don't think that these are used by the device (just for the driver to
remember what it did) so I think that it is ok.
3) I converted everything that looked like an ioaddr into a long.
Richard
--- /mnt/sunos/linux/src/linux-cvs/linux/drivers/net/dmfe.c Sun May 20 06:01:50 2001
+++ drivers/net/dmfe.c Fri Jun 29 00:07:36 2001
@@ -123,8 +123,8 @@
#define DMFE_TXTH_1K 0xC000 /* TX TH 1K byte */
#define DMFE_TIMER_WUT (jiffies + HZ * 1)/* timer wakeup time : 1 second */
-#define DMFE_TX_TIMEOUT (HZ * 1.5) /* tx packet time-out time 1.5 s" */
-#define DMFE_TX_KICK (HZ * 0.5) /* tx packet Kick-out time 0.5 s" */
+#define DMFE_TX_TIMEOUT ((ulong)(HZ * 1.5)) /* tx packet time-out time 1.5 s" */
+#define DMFE_TX_KICK ((ulong)(HZ * 0.5)) /* tx packet Kick-out time 0.5 s" */
#define DMFE_DBUG(dbug_now, msg, vaule) if (dmfe_debug || dbug_now) printk(KERN_ERR "<DMFE>: %s %x\n", msg, vaule)
@@ -157,18 +157,28 @@
/* Structure/enum declaration ------------------------------- */
struct tx_desc {
u32 tdes0, tdes1, tdes2, tdes3;
+#if __sparc_v9__
+ ulong tx_buf_ptr;
+ ulong next_tx_desc;
+#else
u32 tx_skb_ptr;
u32 tx_buf_ptr;
u32 next_tx_desc;
u32 reserved;
+#endif
};
struct rx_desc {
u32 rdes0, rdes1, rdes2, rdes3;
+#ifdef __sparc_v9__
+ ulong rx_skb_ptr;
+ ulong next_rx_desc;
+#else
u32 rx_skb_ptr;
u32 rx_buf_ptr;
u32 next_rx_desc;
u32 reserved;
+#endif
};
struct dmfe_board_info {
@@ -178,7 +188,7 @@
struct pci_dev * net_dev; /* PCI device */
spinlock_t lock;
- u32 ioaddr; /* I/O base address */
+ long ioaddr; /* I/O base address */
u32 cr0_data;
u32 cr5_data;
u32 cr6_data;
@@ -353,15 +363,15 @@
static int dmfe_do_ioctl(struct DEVICE *, struct ifreq *, int);
static u16 read_srom_word(long ,int);
static void dmfe_interrupt(int , void *, struct pt_regs *);
-static void dmfe_descriptor_init(struct dmfe_board_info *, u32);
+static void dmfe_descriptor_init(struct dmfe_board_info *, ulong);
static void allocated_rx_buffer(struct dmfe_board_info *);
-static void update_cr6(u32, u32);
+static void update_cr6(u32, ulong);
static void send_filter_frame(struct DEVICE * ,int);
static void dm9132_id_table(struct DEVICE * ,int);
-static u16 phy_read(u32, u8, u8, u32);
-static void phy_write(u32, u8, u8, u16, u32);
-static void phy_write_1bit(u32, u32);
-static u16 phy_read_1bit(u32);
+static u16 phy_read(ulong, u8, u8, u32);
+static void phy_write(ulong, u8, u8, u16, u32);
+static void phy_write_1bit(ulong, u32);
+static u16 phy_read_1bit(ulong);
static u8 dmfe_sense_speed(struct dmfe_board_info *);
static void dmfe_process_mode(struct dmfe_board_info *);
static void dmfe_timer(unsigned long);
@@ -388,7 +398,7 @@
const struct pci_device_id *ent)
{
unsigned long pci_iobase;
- u8 pci_irqline;
+ int pci_irqline;
struct dmfe_board_info *db; /* board information structure */
int i;
struct net_device *dev;
@@ -603,7 +613,7 @@
static void dmfe_init_dm910x(struct DEVICE *dev)
{
struct dmfe_board_info *db = dev->priv;
- u32 ioaddr = db->ioaddr;
+ ulong ioaddr = db->ioaddr;
DMFE_DBUG(0, "dmfe_init_dm910x()", 0);
@@ -738,7 +748,7 @@
static int dmfe_stop(struct DEVICE *dev)
{
struct dmfe_board_info *db = dev->priv;
- u32 ioaddr = dev->base_addr;
+ ulong ioaddr = dev->base_addr;
DMFE_DBUG(0, "dmfe_stop", 0);
@@ -781,7 +791,7 @@
{
struct DEVICE *dev = dev_id;
struct dmfe_board_info *db = (struct dmfe_board_info *) dev->priv;
- u32 ioaddr = dev->base_addr;
+ ulong ioaddr = dev->base_addr;
unsigned long flags;
DMFE_DBUG(0, "dmfe_interrupt()", 0);
@@ -847,12 +857,15 @@
static void dmfe_free_tx_pkt(struct DEVICE *dev, struct dmfe_board_info * db)
{
struct tx_desc *txptr;
- u32 ioaddr = dev->base_addr;
+ ulong ioaddr = dev->base_addr;
+ u32 tdes0, tdes1;
txptr = db->tx_remove_ptr;
while(db->tx_packet_cnt) {
/* printk("<DMFE>: tdes0=%x\n", txptr->tdes0); */
- if (txptr->tdes0 & 0x80000000)
+ tdes0 = le32_to_cpu(txptr->tdes0);
+ tdes1 = le32_to_cpu(txptr->tdes1);
+ if (tdes0 & 0x80000000)
break;
/* A packet sent completed */
@@ -860,29 +873,29 @@
db->stats.tx_packets++;
/* Transmit statistic counter */
- if ( txptr->tdes0 != 0x7fffffff ) {
- /* printk("<DMFE>: tdes0=%x\n", txptr->tdes0); */
- db->stats.collisions += (txptr->tdes0 >> 3) & 0xf;
- db->stats.tx_bytes += txptr->tdes1 & 0x7ff;
- if (txptr->tdes0 & TDES0_ERR_MASK) {
+ if ( tdes0 != 0x7fffffff ) {
+ /* printk("<DMFE>: tdes0=%x\n", tdes0); */
+ db->stats.collisions += (tdes0 >> 3) & 0xf;
+ db->stats.tx_bytes += tdes1 & 0x7ff;
+ if (tdes0 & TDES0_ERR_MASK) {
db->stats.tx_errors++;
- if (txptr->tdes0 & 0x0002) { /* UnderRun */
+ if (tdes0 & 0x0002) { /* UnderRun */
db->tx_fifo_underrun++;
if ( !(db->cr6_data & CR6_SFT) ) {
db->cr6_data = db->cr6_data | CR6_SFT;
update_cr6(db->cr6_data, db->ioaddr);
}
}
- if (txptr->tdes0 & 0x0100)
+ if (tdes0 & 0x0100)
db->tx_excessive_collision++;
- if (txptr->tdes0 & 0x0200)
+ if (tdes0 & 0x0200)
db->tx_late_collision++;
- if (txptr->tdes0 & 0x0400)
+ if (tdes0 & 0x0400)
db->tx_no_carrier++;
- if (txptr->tdes0 & 0x0800)
+ if (tdes0 & 0x0800)
db->tx_loss_carrier++;
- if (txptr->tdes0 & 0x4000)
+ if (tdes0 & 0x4000)
db->tx_jabber_timeout++;
}
}
@@ -917,39 +930,41 @@
struct rx_desc *rxptr;
struct sk_buff *skb;
int rxlen;
+ u32 rdes0;
rxptr = db->rx_ready_ptr;
while(db->rx_avail_cnt) {
- if (rxptr->rdes0 & 0x80000000) /* packet owner check */
+ rdes0 = le32_to_cpu(rxptr->rdes0);
+ if (rdes0 & 0x80000000) /* packet owner check */
break;
db->rx_avail_cnt--;
db->interval_rx_cnt++;
- if ( (rxptr->rdes0 & 0x300) != 0x300) {
+ if ( (rdes0 & 0x300) != 0x300) {
/* A packet without First/Last flag */
/* reused this SKB */
- DMFE_DBUG(0, "Reused SK buffer, rdes0", rxptr->rdes0);
+ DMFE_DBUG(0, "Reused SK buffer, rdes0 %x", rdes0);
dmfe_reused_skb(db, (struct sk_buff *) rxptr->rx_skb_ptr);
} else {
/* A packet with First/Last flag */
- rxlen = ( (rxptr->rdes0 >> 16) & 0x3fff) - 4;
+ rxlen = ( (rdes0 >> 16) & 0x3fff) - 4;
/* error summary bit check */
- if (rxptr->rdes0 & 0x8000) {
+ if (rdes0 & 0x8000) {
/* This is a error packet */
- //printk("<DMFE>: rdes0: %lx\n", rxptr->rdes0);
+ //printk("<DMFE>: rdes0: %lx\n", rdes0);
db->stats.rx_errors++;
- if (rxptr->rdes0 & 1)
+ if (rdes0 & 1)
db->stats.rx_fifo_errors++;
- if (rxptr->rdes0 & 2)
+ if (rdes0 & 2)
db->stats.rx_crc_errors++;
- if (rxptr->rdes0 & 0x80)
+ if (rdes0 & 0x80)
db->stats.rx_length_errors++;
}
- if ( !(rxptr->rdes0 & 0x8000) ||
+ if ( !(rdes0 & 0x8000) ||
((db->cr6_data & CR6_PM) && (rxlen>6)) ) {
skb = (struct sk_buff *) rxptr->rx_skb_ptr;
@@ -984,7 +999,7 @@
}
} else {
/* Reuse SKB buffer when the packet is error */
- DMFE_DBUG(0, "Reused SK buffer, rdes0", rxptr->rdes0);
+ DMFE_DBUG(0, "Reused SK buffer, rdes0 %x", rdes0);
dmfe_reused_skb(db, (struct sk_buff *) rxptr->rx_skb_ptr);
}
}
@@ -1070,6 +1085,7 @@
struct dmfe_board_info *db = (struct dmfe_board_info *) dev->priv;
unsigned long flags;
+#if 1
DMFE_DBUG(0, "dmfe_timer()", 0);
spin_lock_irqsave(&db->lock, flags);
@@ -1089,7 +1105,6 @@
}
}
-
/* Operating Mode Check */
if ( (db->dm910x_chk_mode & 0x1) &&
(db->stats.rx_packets > MAX_CHECK_PACKET) )
@@ -1116,7 +1131,8 @@
dev->name);
}
}
-
+#endif
+#if 1
if (db->wait_reset) {
DMFE_DBUG(0, "Dynamic Reset device", db->tx_packet_cnt);
db->reset_count++;
@@ -1144,7 +1160,6 @@
else
tmp_cr12 = 0x3; /* Link OK */
}
-
if ( !(tmp_cr12 & 0x3) && !db->link_failed ) {
/* Link Failed */
DMFE_DBUG(0, "Link Failed", tmp_cr12);
@@ -1186,6 +1201,7 @@
db->timer.expires = DMFE_TIMER_WUT;
add_timer(&db->timer);
spin_unlock_irqrestore(&db->lock, flags);
+#endif
}
@@ -1255,8 +1271,8 @@
{
struct rx_desc *rxptr = db->rx_insert_ptr;
- if (!(rxptr->rdes0 & 0x80000000)) {
- rxptr->rx_skb_ptr = (u32) skb;
+ if (!(le32_to_cpu(rxptr->rdes0) & 0x80000000)) {
+ rxptr->rx_skb_ptr = (ulong) skb;
rxptr->rdes2 = cpu_to_le32( pci_map_single(db->net_dev, skb->tail, RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE) );
rxptr->rdes0 = cpu_to_le32(0x80000000);
db->rx_avail_cnt++;
@@ -1271,7 +1287,7 @@
* Using Chain structure, and allocated Tx/Rx buffer
*/
-static void dmfe_descriptor_init(struct dmfe_board_info *db, u32 ioaddr)
+static void dmfe_descriptor_init(struct dmfe_board_info *db, ulong ioaddr)
{
struct tx_desc *tmp_tx;
struct rx_desc *tmp_rx;
@@ -1288,7 +1304,7 @@
outl(db->first_tx_desc_dma, ioaddr + DCR4); /* TX DESC address */
/* rx descriptor start pointer */
- db->first_rx_desc = (struct rx_desc *) ( (u32) db->first_tx_desc + sizeof(struct rx_desc) * TX_DESC_CNT );
+ db->first_rx_desc = (struct rx_desc *) ( (ulong) db->first_tx_desc + sizeof(struct rx_desc) * TX_DESC_CNT );
db->first_rx_desc_dma = ( db->first_tx_desc_dma + sizeof(struct rx_desc) * TX_DESC_CNT);
db->rx_insert_ptr = db->first_rx_desc;
db->rx_ready_ptr = db->first_rx_desc;
@@ -1299,18 +1315,18 @@
tmp_buf_dma = db->buf_pool_dma_start;
tmp_tx_dma = db->first_tx_desc_dma;
for (tmp_tx = db->first_tx_desc, i = 0; i < TX_DESC_CNT; i++, tmp_tx++) {
- tmp_tx->tx_buf_ptr = (u32) tmp_buf;
+ tmp_tx->tx_buf_ptr = (ulong) tmp_buf;
tmp_tx->tdes0 = cpu_to_le32(0);
tmp_tx->tdes1 = cpu_to_le32(0x81000000); /* IC, chain */
tmp_tx->tdes2 = cpu_to_le32(tmp_buf_dma);
tmp_tx_dma += sizeof(struct tx_desc);
tmp_tx->tdes3 = cpu_to_le32(tmp_tx_dma);
- tmp_tx->next_tx_desc = (u32) ((u32) tmp_tx + sizeof(struct tx_desc));
- tmp_buf = (unsigned char *) ((u32) tmp_buf + TX_BUF_ALLOC);
+ tmp_tx->next_tx_desc = (ulong) ((ulong) tmp_tx + sizeof(struct tx_desc));
+ tmp_buf = (unsigned char *) ((ulong) tmp_buf + TX_BUF_ALLOC);
tmp_buf_dma = tmp_buf_dma + TX_BUF_ALLOC;
}
(--tmp_tx)->tdes3 = cpu_to_le32(db->first_tx_desc_dma);
- tmp_tx->next_tx_desc = (u32) db->first_tx_desc;
+ tmp_tx->next_tx_desc = (ulong) db->first_tx_desc;
/* Init Receive descriptor chain */
tmp_rx_dma=db->first_rx_desc_dma;
@@ -1319,10 +1335,10 @@
tmp_rx->rdes1 = cpu_to_le32(0x01000600);
tmp_rx_dma += sizeof(struct rx_desc);
tmp_rx->rdes3 = cpu_to_le32(tmp_rx_dma);
- tmp_rx->next_rx_desc = (u32) ((u32) tmp_rx + sizeof(struct rx_desc));
+ tmp_rx->next_rx_desc = (ulong) ((ulong) tmp_rx + sizeof(struct rx_desc));
}
(--tmp_rx)->rdes3 = cpu_to_le32(db->first_rx_desc_dma);
- tmp_rx->next_rx_desc = (u32) db->first_rx_desc;
+ tmp_rx->next_rx_desc = (ulong) db->first_rx_desc;
/* pre-allocated Rx buffer */
allocated_rx_buffer(db);
@@ -1334,7 +1350,7 @@
* Firstly stop DM910X , then written value and start
*/
-static void update_cr6(u32 cr6_data, u32 ioaddr)
+static void update_cr6(u32 cr6_data, ulong ioaddr)
{
u32 cr6_tmp;
@@ -1355,7 +1371,7 @@
{
struct dev_mc_list *mcptr;
u16 * addrptr;
- u32 ioaddr = dev->base_addr+0xc0; /* ID Table */
+ ulong ioaddr = dev->base_addr+0xc0; /* ID Table */
u32 hash_val;
u16 i, hash_table[4];
@@ -1466,7 +1482,7 @@
while(db->rx_avail_cnt < RX_DESC_CNT) {
if ( ( skb = dev_alloc_skb(RX_ALLOC_SIZE) ) == NULL )
break;
- rxptr->rx_skb_ptr = (u32) skb;
+ rxptr->rx_skb_ptr = (ulong) skb;
rxptr->rdes2 = cpu_to_le32( pci_map_single(db->net_dev, skb->tail, RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE) );
rxptr->rdes0 = cpu_to_le32(0x80000000);
rxptr = (struct rx_desc *) rxptr->next_rx_desc;
@@ -1659,10 +1675,10 @@
* Write a word to Phy register
*/
-static void phy_write(u32 iobase, u8 phy_addr, u8 offset, u16 phy_data, u32 chip_id)
+static void phy_write(ulong iobase, u8 phy_addr, u8 offset, u16 phy_data, u32 chip_id)
{
u16 i;
- u32 ioaddr;
+ ulong ioaddr;
if (chip_id == PCI_DM9132_ID) {
ioaddr = iobase + 0x80 + offset * 4;
@@ -1706,11 +1722,11 @@
* Read a word data from phy register
*/
-static u16 phy_read(u32 iobase, u8 phy_addr, u8 offset, u32 chip_id)
+static u16 phy_read(ulong iobase, u8 phy_addr, u8 offset, u32 chip_id)
{
int i;
u16 phy_data;
- u32 ioaddr;
+ ulong ioaddr;
if (chip_id == PCI_DM9132_ID) {
/* DM9132 Chip */
@@ -1758,7 +1774,7 @@
* Write one bit data to Phy Controller
*/
-static void phy_write_1bit(u32 ioaddr, u32 phy_data)
+static void phy_write_1bit(ulong ioaddr, u32 phy_data)
{
outl(phy_data, ioaddr); /* MII Clock Low */
udelay(1);
@@ -1773,7 +1789,7 @@
* Read one bit phy data from PHY controller
*/
-static u16 phy_read_1bit(u32 ioaddr)
+static u16 phy_read_1bit(ulong ioaddr)
{
u16 phy_data;
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