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Re: no networking in riscv-qemu... use pppd?





Sent from my iPhone
> On 20/04/2017, at 3:56 AM, Manuel A. Fernandez Montecelo <manuel.montezelo@gmail.com> wrote:
> 
> 2017-04-19 17:37 GMT+02:00 Michael Clark <michaeljclark@mac.com>:
>> I think the C extension should be targeted by default for RV64. i.e. RV64GC
>> (RV64IMAFDC). Check with the RISC-V Foundation. C is now enabled by default
>> in the RV64 toolchain.
>> 
>> BTW shipping silicon is RV32IMAC, which is why I mentioned it, however this
>> is not really a mainstream distribution target as it's embedded. There will
>> be RV64GC hardware soonish I hope.
> 
> Do you think that all RV64G hardware, at least the one able to run a
> general purpose OS ("not embedded"), will also support C?

Yes I believe RV64GC will be standard for general purpose RV64 silicon. I believe that is why it has now been enabled as the default in the RV64 toolchain. Much like all ARMv7 support Thumb2.

The code density is part of the attractiveness of RISC-V versus x86_64 and AArch64. x86 is very dense. RISC-V with RVC is more dense. RISC ISAs like MIPS and SPARC have typically been hampered by code size. It eats up icache bandwidth.

> I think that it'll depend on the people implementing the hardware, and
> that the Foundation doesn't have much say on that, unless they try and
> have the power to strongarm companies into always implementing C.

Well. I for one won't run an RV64G distro or buy RV64G hardware, only RV64GC. So count one less user. I'll have to figure out how to set up an auto builder if you all choose RV64G.

The first tiny RISC-V silicon available to consumers has C although it is RV32IMAC (-march=rv32imac -mabi=ilp32 might be a good choice for a 32-bit distro assuming runtime hard float dispatch is sorted out and -march=rv64imafdc -mabi=lp64d for a 64-bit distro).

BTW The images for RISCVEMU are RV64GC, as a datapoint. QEMU supports C also.

If we build RV64GC then we set the benchmark.

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