Re: [Fwd: [Sablevm-developer] Inline-threading on ia64 works!]
"Grzegorz B. Prokopski" <gadek@debian.org> wrote:
>The only thing that worries me now is how it will behave on SMP
>systems. If the new version were segfaulting or if there were some
>other serious problems caused by the usage of the inlined engine on SMP
>systems (while running some more advanced apps than HelloWorld ;-).
>*IF* it were so - I think it'd be mandated to get back to currently
>used, slower engine.
Compatibility with an SMP system has *nothing* to do with the slower and/or
faster engine. It has to do with making sure SableVM meets the requirements of
the Java memory model, and that the algorithms used for synchronization (e.g.
thin locks) behave well on SMP. Currently, SableVM implements D. Bacon's thin
locks as described in his ACM SIGPLAN PLDI'98 paper (+ improvements to eliminate
busy-wait). On SMP systems based on ia-64 & alpha, it is very likely that
cache-specific instructions are required when thin locks are released, even
though no atomic instruction is used for releasing the lock. I repeat: This is
required for meeting the requirements of the Java memory model.
Now, the real problem is that the memory model is a moving target: in the Java
Language Specification and Java Virtual Machine Specification there are
important holes in the specification, in regard to SMP systems. Furthermore,
the specified memory model imposes unreasonible constraints that inhibit the
implementation of efficient JVMs on comercial SMP systems, so as of today, all
current JVMs (including Sun's) fail to correctly implement the Java memory
model. There is currenly a group working on revising the specification of the
Java memory model; the latest proposal seems overly complex and unintuitive for
casual Java programmers. I think more work has yet to be done before we see a
new specification of the Java memory model (JMM).
SableVM could be made compatible to SMP systems (even if it would not
necessarily fully implement the JMM), by at least implementin cache-related
instructions on thin locks and volatile field accesses (and probably a few other
locations).
So, please, do not confuse unrelated things. ;-)
Have fun!
Etienne
--
Etienne M. Gagnon, Ph.D. http://www.info.uqam.ca/~egagnon/
SableVM: http://www.sablevm.org/
SableCC: http://www.sablecc.org/
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