Re: f-cpu and Debian
Andreas Bombe wrote:
On Fri, Oct 11, 2002 at 12:33:16AM +0100, Yann Guidon wrote:
oh, btw, most people i spoke about the OR1K
(their 'open RISC' architecture) say that it is
more or less a rip off that mimics the MIPS R2000
to be interesting... I don't want to flame them
down but there is nothing really ground-breaking
There isn't, but for the the software crowd (e.g. Debian) it is more
interesting since it is somewhat more useable for developing software
right now. They have a gcc toolchain and demoed a MP3 player under
uCLinux on their OR1200. I don't think a MMU is available already, so
it can't do full Linux yet.
Their website http://www.opencores.org/ seems to be down at the moment,
I remarked that, too, for 2 days or so....
as i am currently playing with the idea of designing a "VSP",
"Very Simple Processor" targetted only at embedded, ultra-low power
devices, and with the only purpose to control the whole machine
while other dedicated proceessors do the DSP things in parallel.
I had not looked at that kind of "branch" for a while, and the MIPS
and ARM families are getting too heavy for some applications.
And when you find a suitable processor, it doesn't have all the
required I/O, so you have to integrate them yourself with a FPGA,
so it is easier to make your own CPU on your FPGA. No license
fees to ARM or MIPS, with all the required and tuned I/O,
and less pins to solder :-)
There are a lot of small FPGA-based microcontrollers in source
form available on the Internet. For example, there are several 8051
or PIC clones, some clones for other architectures, and a lot of
hobbyists that play with architectures and ideas. Look at the
fpgacpu.org or opencollector sites, they have a lot of resources
about this subject.
Their goal is not to run Linux or any "unix" on it.
just some RTOS that does the job with a very limited
power and money budget. not to run GNOME or KDE.
That's why i'm having so much fun designing the VSP :
no "golden rule" to respect, no bloatware to take into
account, only a limited set of constraints. F-CPU is
much much more complex than that because it is
an architecture (an ideal "virtual" vision of the computer)
and it has to be implemented with many user-defined
parameters. With VSP, i choose some parameters
(number of registers, instruction width) and i can
immediately play with the rest of the architecture
and take decisions that would be sacrilegious in the
F-CPU project :-)
However, i perfectly know that VSP is designed
only to manage DMA channels, a limited user I/O
device, some memory buffers, ATA disk interface
and filesystem, and that's all. At 10MHz, it won't
consume much and one could play tetris, but that's all.
It's the same for many other "hobby" FPGA computer
projects : make something work and play with it.
It's easy because a lot of important decisions are
simply skipped or reduced, depending on the
expected use and application (single CPU, limited
resources, no need for scalability....)
It started more or less the same with F-CPU but
people wanted to "run linux" on it from the start, so
it made a big difference in the early design choices.
There is a BIG difference between having a successful
GCC hack^Wport and being able to run Mozilla on a computer :-)
Ok, now i return to the "free embedded processor" pages
(you know, the usual geek smut with a lot of VHDL :-P)
and i'll try to design a quick and dirty instruction set
for the VSP. Maybe the advices from PGCCFD will
be enough :-) This will be VERY interesting because
i'll try some of the techniques that were developped
for or before F-CPU. There is some hope that this
"dirty" thing will work before the "big clean" F-CPU
and keep the SW people happy, giving some time
to examine some coding practices and compiling
techniques before F-CPU rev.1 is out. I can safely
call VSP a "ground breaking dirty hack", if i ever succeed :-)
<beard_mode value="on">happy hacking </beard_mode>,