Re: Broadcom BCM2709, ARMv8, and missing CPU features

[Jeffrey Walton <noloader@gmail.com>]

On Wed, Jul 27, 2016 at 2:18 AM, Paul Wise <pabs@debian.org> wrote:
> On Wed, Jul 27, 2016 at 11:28 AM, Jeffrey Walton wrote:
>
>> I recently purchased a Raspberry Pi 3. Its got a Broadcom SoC, and its
>> ARMv8.
> ...
>> model name    : ARMv7 Processor rev 4 (v7l)
>
> Looks like you are running it in ARMv7 32-bit mode, perhaps that
> disables the ARMv8 features.
>
> I recently watched the DebConf16 ARM talk and from memory support for
> 64-bit/ARMv8 on the RPi3 is still in progress.

I've had some time to kick the tires, so to speak.

CPU flags indicate only crc32 from the ARMv8 instruction set. And I
can't get the stock toolchain to consume other intrinsics, like PMULL
and PMULL2.

However, dropping into the GCC extended assembler, the program
executes CRC, PMULL, PMULL2, AES, SHA1 and SHA2 without causing an
illegal instruction.

It would be nice if the Raspberry folks enabled the intrinsics and
instructions in the toolchain for the devs who have the specialized
code to take advantage of it.

*******

Using '.byte' below rather than '.inst' or '.inst.w' is another can of worms...

$ gcc -g3 -O0 -march=armv7-a -mfpu=neon test.cc -o test.exe
$ ./test.exe
$

$ cat test.cc
#include <arm_neon.h>
int main(int argc, char* argv[])
{
  __asm__ __volatile__
  (
    ".code 32"

    // CRC using word
    ".byte 0x1a, 0xc1, 0x58, 0x00;\n"
    // CRC using half word
    ".byte 0x1a, 0xc1, 0x54, 0x00;\n"
    // CRC using byte
    ".byte 0x1a, 0xc1, 0x50, 0x00;\n"
    // PMULL
    ".byte 0x0e, 0xe1, 0xe0, 0x00;\n"
    // PMULL2
    ".byte 0x4e, 0xe1, 0xe0, 0x00;\n"
    // AES (aese)
    ".byte 0x4e, 0x28, 0x48, 0x20;\n"
    // AES (aesd)
    ".byte 0x4e, 0x28, 0x58, 0x20;\n"
    // SHA1 (sha1c)
    ".byte 0x5e, 0x02, 0x00, 0x20;\n"
    // SHA1 (sha1m)
    ".byte 0x5e, 0x02, 0x20, 0x20;\n"
    // SHA1 (sha1p)
    ".byte 0x5e, 0x02, 0x30, 0x20;\n"
      :
      :
      : "cc", "d0", "d1", "d2", "q0", "q1", "q2"
  );

  return 0;
}