Re: gcc 2.95.2-13 for arm
On Sun, Sep 10, 2000 at 10:38:53PM +0100, Philip Blundell wrote:
> >/tmp/ccqBnxST.s: Assembler messages:
> >/tmp/ccqBnxST.s:8196: Warning: destination register same as write-back base
> >
> >This would be a bad thing. This would appear to be the bad thing I had
> >before with the previous (debian supplied) compiler. How (where) do I go
> >about working out if it's a known compiler bug?
>
> What's the offending line of the file? I just sent Scott a patch this morning
> for some missing constraints on post-inc `str' peepholes; it sounds like you
> might have run into an analogous situation with `ldr', though I thought they
> were all covered already.
ldr r3, [r3], #-4
in
Perl_pp_entersub:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, current_function_anonymous_args = 0
mov ip, sp
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr, pc}
sub fp, ip, #4
sub sp, sp, #40
ldr r3, .L1502
ldr r3, [r3, #0]
ldr r3, [r3], #-4
str r3, [fp, #-60]
str r3, [fp, #-56]
ldr r3, .L1502+4
ldr r3, [r3, #0]
ldrb r3, [r3, #20] @ zero_extendqisi2
mov r3, r3, lsr #6
and r3, r3, #1
str r3, [fp, #-68]
ldr r3, [fp, #-56]
cmp r3, #0
beq .L1497
ldr r3, [fp, #-56]
ldrb r3, [r3, #8] @ zero_extendqisi2
[snip]
.L1502:
.word PL_stack_sp
.word PL_op
.word PL_sv_yes
.word PL_stack_base
.word PL_markstack_ptr
.word PL_no_usym
.word .LC41
.word PL_no_symref
.word PL_amagic_generation
.word PL_sv_undef
.word .LC4
.word PL_tmps_floor
.word PL_tmps_ix
.word .LC42
.word .LC43
.word .LC40
OP * Perl_pp_entersub (void )
{
register SV **sp = PL_stack_sp ; SV *sv = (*sp--) ;
GV *gv;
HV *stash;
register CV *cv;
register PERL_CONTEXT *cx;
I32 gimme;
char hasargs = (PL_op->op_flags & 64 ) != 0;
if (!sv)
return Perl_die ( "Not a CODE reference");
it looks like it's that *sp--;
-O2 assembler looks like this:
Perl_pp_entersub:
@ args = 0, pretend = 0, frame = 44
@ frame_needed = 1, current_function_anonymous_args = 0
mov ip, sp
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr, pc}
ldr r0, .L1488
sub sp, sp, #44
ldr r1, [r0, #0]
sub fp, ip, #4
ldr ip, [r1], #-4
str r1, [fp, #-60]
str ip, [fp, #-56]
ldr r1, .L1488+4
ldr r2, [r1, #0]
ldrb r3, [r2, #20] @ zero_extendqisi2
cmp ip, #0
mov r3, r3, lsr #6
and r3, r3, #1
str r3, [fp, #-68]
beq .L1483
ldrb r3, [ip, #8] @ zero_extendqisi2
.L1488:
.word PL_stack_sp
.word PL_op
.word PL_sv_yes
.word PL_markstack_ptr
.word PL_stack_base
.word PL_no_usym
which I think is correct (r1 is sp, ip is sv)
and all my SEGVs seem to be caused by PL_stack_sp[1] containing something
bogus (ie odd number < 2048) rather than a deferenceable pointer.
Having spent a long time staring at the output of the optimiser I'm generally
very impressed - a job well done, thanks.
That was going to be unconditional, but I've just spotted this. Can't:
str ip, [fp, #-56]
ldr r1, .L1488+4
ldr r2, [r1, #0]
ldrb r3, [r2, #20] @ zero_extendqisi2
cmp ip, #0
be re-ordered to:
ldr r1, .L1488+4
str ip, [fp, #-56]
ldr r2, [r1, #0]
cmp ip, #0
ldrb r3, [r2, #20] @ zero_extendqisi2
?
Nicholas Clark
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