Re: Intel Core2Duo (T7400)
On Mon, Nov 12, 2007 at 03:36:27PM -0600, Jaime Ochoa Malag?n wrote:
> In my opinion certainly all the applications wrote in the past has no
> designed to use 64 bits operations and many algorithms could have
> beneffits of this, if in the same bus (64 bits) are you only use 32>=
> bits operands there is no gain at all...
> The plus is involved in move and operate data at double rate 64/32 if
> the code is rarely doing this we have this slowdown, obviously thats
> not true if its not a full 64 bits REAL bus...
> And (this is only my knowledge from 8085 -> 8088/80188 old procesors)
> the pointers to the data are in many cases relatives and not
> necesarily should be so long, if this is not true now let me know, I
> just presume that the nowadays procesors still have the ugly segment
Yes they have the segment registers, but they only apply in real mode.
In protected mode the cpu has a flat memory model instead and uses
memory mapping and other tricks to manage memory access.
32bit protected mode provides a flat 4GB address space. PAE allows the
OS to map memory up to 64GB into the 4GB address space of a given
application, so that even though a single application only has a 4GB
address space, the system can have up to 64GB of memory to use for
running multiple applications (and caching and other OS related uses).
In 64bit mode you get a flat 64bit memory space, although current CPUs
only support 48bits or something like that, and ignore the high bits for
now, which means you could use all your ram for a single application.
Neither 32 nor 64bit mode use the segment registers at all (or at least
not the way they were used in real mode).
The i386 and above support 32bit protected mode. The 286 had a
different protected mode that provided a 24bit flat memory model (this
clearly shows in the 32bit page tables since you have a 16bit value in
one place, an 8bit value somewhere else and finally another 8bit value
yet somewhere else all in one structure to provide the 32bit address of
the page. It's been a while since I looked at that stuff).
In protected mode all pointers are full addresses in general (although
you certainly can still use offsets from a register too, and often do).
Given the register offset accesses on x86, you probably don't get quite
the same hit on performance that you would on 64bit RISC designs where
the general model seems to be you move data between memory addresses and
registers, and then operate on the registers and then move data to
memory again. Even those do tend to have the ability to refer to the
address in a register though so you still don't have to always use 64bit
memory addresses to refer to memory.
x86 also has variable length instructions, where RISC would make all
instructions 32bit or 64bit long. I am not sure if the instructions
have changed length on x86_64 at all compared to x86.