Hi,
I think the page fault normally precedes the F-line exception but when the FPU op spans the page boundary, the F-line exception goes missing... but I could be wrong.I think I was wrong about that. Table 8-4 says that a Data Access Error can have a pending unimplemented FP instruction exception, but an Instruction Access Error is reported after all previous instructions and associated exceptions have completed.
Except in case of the borked LC040 - the previous unimplemented float instruction does not get its exception processing completed.
"[The processor] saves the vector offset, PC, and internal copy of the SR on the stack. The saved PC value is the logical address of the instruction executing at the time the fault was detected. This instruction is not necessarily the one that initiated the bus cycle since the processor overlaps execution of instructions." According to the erratum, in this case the access error exception frame will show the fault address for the page fault (i.e. start of following page), rather than the fault address for the unimplemented instrution. And the saved PC will indicate the unimplemented instruction, whereas for a normal access error it would vary. So you have to figure out, for an ATC exception with a fault address at the start of a page, whether an instruction at the page boundary might have (1) been executed prior to the ATC exception (difficult when you can't rely on the saved PC?) and (2) is an FPU op in need of emulation
According to the errata, the saved PC is that of the unimplemented instruction. The fault address is a don't-care since we map in the whole page anyway.
and (3) there is no pending exception for this unimplemented instruction... so in fact it won't be pending. But it may or may not have been raised and handled already, depending on whether the bug lost the exception or not (the bug is apparently not dependable).
That would indeed vastly complicate matters. Are you sure the unreliable bug isn't due to the page in question having been mapped in nonetheless?
No idea what to do about (1). Since I don't understand the implications of "overlapped execution", I can't hazard a guess as to whether this kind of fix is even theoretically feasible.
What this means is that one instruction is in the process of being executed while another one is being loaded and decoded at the same time. Loading it would trigger the page fault while executing of the previous one had triggered the unimplemented instruction exception just previously. Only guessing here...
Michael