mesa: Changes to 'upstream-unstable'
Rebased ref, commits from common ancestor:
commit 8d55da9f579463038f4305ed7d505aa7fffa0f37
Author: Emil Velikov <emil.velikov@collabora.com>
Date: Fri Dec 8 13:47:33 2017 +0000
docs: Update 17.3.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
diff --git a/docs/relnotes/17.3.0.html b/docs/relnotes/17.3.0.html
index b156158..04bc3c2 100644
--- a/docs/relnotes/17.3.0.html
+++ b/docs/relnotes/17.3.0.html
@@ -14,7 +14,7 @@
<iframe src="../contents.html"></iframe>
<div class="content">
-<h1>Mesa 17.3.0 Release Notes / TBD</h1>
+<h1>Mesa 17.3.0 Release Notes / December 8. 2017</h1>
<p>
Mesa 17.3.0 is a new development release.
@@ -58,14 +58,187 @@ Note: some of the new features are only available with certain drivers.
<h2>Bug fixes</h2>
<ul>
-TBD
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=97532";>Bug 97532</a> - Regression: GLB 2.7 & Glmark-2 GLES versions segfault due to linker precision error (259fc505) on dead variable</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100438";>Bug 100438</a> - glsl/ir.cpp:1376: ir_dereference_variable::ir_dereference_variable(ir_variable*): Assertion `var != NULL' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100613";>Bug 100613</a> - Regression in Mesa 17 on s390x (zSystems)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101334";>Bug 101334</a> - AMD SI cards: Some vulkan apps freeze the system</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101378";>Bug 101378</a> - interpolateAtSample check for input parameter is too strict</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101655";>Bug 101655</a> - Explicit sync support for android</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101691";>Bug 101691</a> - gfx corruption on windowed 3d-apps running on dGPU</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101709";>Bug 101709</a> - [llvmpipe] piglit gl-1.0-scissor-offscreen regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101766";>Bug 101766</a> - Assertion `!"invalid type"' failed when constant expression involves literal of different type</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101832";>Bug 101832</a> - [PATCH][regression][bisect] Xorg fails to start after f50aa21456d82c8cb6fbaa565835f1acc1720a5d</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101851";>Bug 101851</a> - [regression] libEGL_common.a undefined reference to '__gxx_personality_v0'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101867";>Bug 101867</a> - Launch options window renders black in Feral Games in current Mesa trunk</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101876";>Bug 101876</a> - SIGSEGV when launching Steam</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101910";>Bug 101910</a> - [BYT] ES31-CTS.functional.copy_image.non_compressed.viewclass_96_bits.rgb32f_rgb32f</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101925";>Bug 101925</a> - playstore/webview crash</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101941";>Bug 101941</a> - Getting different output depending on attribute declaration order</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101961";>Bug 101961</a> - Serious Sam Fusion hangs system completely</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101981";>Bug 101981</a> - Commit ddc32537d6db69198e88ef0dfe19770bf9daa536 breaks rendering in multiple applications</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101982";>Bug 101982</a> - Weston crashes when running an OpenGL program on i965</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101983";>Bug 101983</a> - [G33] ES2-CTS.functional.shaders.struct.uniform.sampler_nested* regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101989";>Bug 101989</a> - ES3-CTS.functional.state_query.integers.viewport_getinteger regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102006";>Bug 102006</a> - gstreamer vaapih264enc segfault</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102014";>Bug 102014</a> - Mesa git build broken by commit bc7f41e11d325280db12e7b9444501357bc13922</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102015";>Bug 102015</a> - [Regression,bisected]: Segfaults with various programs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102024";>Bug 102024</a> - FORMAT_FEATURE_SAMPLED_IMAGE_BIT not supported for D16_UNORM and D32_SFLOAT</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102038";>Bug 102038</a> - assertion failure in update_framebuffer_size</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102050";>Bug 102050</a> - commit b4f639d02a causes build breakage on Android 32bit builds</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102052";>Bug 102052</a> - No package 'expat' found</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102062";>Bug 102062</a> - Segfault at eglCreateContext in android-x86</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102125";>Bug 102125</a> - [softpipe] piglit arb_texture_view-targets regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102148";>Bug 102148</a> - Crash when running qopenglwidget example on mesa llvmpipe win32</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102177";>Bug 102177</a> - [SKL] ES31-CTS.core.sepshaderobjs.StateInteraction fails sporadically</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102201";>Bug 102201</a> - [regression, SI] GPU crash in Unigine Valley</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102241";>Bug 102241</a> - gallium/wgl: SwapBuffers freezing regularly with swap interval enabled</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102274";>Bug 102274</a> - assertion failure in ir_validate.cpp:240</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102308";>Bug 102308</a> - segfault in glCompressedTextureSubImage3D</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102358";>Bug 102358</a> - WarThunder freezes at start, with activated vsync (vblank_mode=2)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102377";>Bug 102377</a> - PIPE_*_4BYTE_ALIGNED_ONLY caps crashing</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102429";>Bug 102429</a> - [regression, SI] Performance decrease in Unigine Valley & Heaven</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102435";>Bug 102435</a> - [skl,kbl] [drm] GPU HANG: ecode 9:0:0x86df7cf9, in csgo_linux64 [4947], reason: Hang on rcs, action: reset</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102454";>Bug 102454</a> - glibc 2.26 doesn't provide anymore xlocale.h</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102461";>Bug 102461</a> - [llvmpipe] piglit glean fragprog1 XPD test 1 regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102467";>Bug 102467</a> - src/mesa/state_tracker/st_cb_readpixels.c:178]: (warning) Redundant assignment</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102496";>Bug 102496</a> - Frontbuffer rendering corruption on mesa master</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102502";>Bug 102502</a> - [bisected] Kodi crashes since commit 707d2e8b - gallium: fold u_trim_pipe_prim call from st/mesa to drivers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102530";>Bug 102530</a> - [bisected] Kodi crashes when launching a stream - commit bd2662bf</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102552";>Bug 102552</a> - Null dereference due to not checking return value of util_format_description</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102565";>Bug 102565</a> - u_debug_stack.c:114: undefined reference to `_Ux86_64_getcontext'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102573";>Bug 102573</a> - fails to build on armel</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102665";>Bug 102665</a> - test_glsl_to_tgsi_lifetime.cpp:53:67: error: ‘>>’ should be ‘> >’ within a nested template argument list</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102677";>Bug 102677</a> - [OpenGL CTS] KHR-GL45.CommonBugs.CommonBug_PerVertexValidation fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102680";>Bug 102680</a> - [OpenGL CTS] KHR-GL45.shader_ballot_tests.ShaderBallotBitmasks fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102685";>Bug 102685</a> - piglit.spec.glsl-1_50.compiler.vs-redeclares-pervertex-out-before-global-redeclaration</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102774";>Bug 102774</a> - [BDW] [Bisected] Absolute constant buffers break VAAPI in mpv</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102809";>Bug 102809</a> - Rust shadows(?) flash random colours</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102844";>Bug 102844</a> - memory leak with glDeleteProgram for shader program type GL_COMPUTE_SHADER</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102847";>Bug 102847</a> - swr fail to build with llvm-5.0.0</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102852";>Bug 102852</a> - Scons: Support the new Scons 3.0.0</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102904";>Bug 102904</a> - piglit and gl45 cts linker tests regressed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102924";>Bug 102924</a> - mesa (git version) images too dark</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102940";>Bug 102940</a> - Regression: Vulkan KMS rendering crashes since 17.2</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102955";>Bug 102955</a> - HyperZ related rendering issue in ARK: Survival Evolved</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102999";>Bug 102999</a> - [BISECTED,REGRESSION] Failing Android EGL dEQP with RGBA configs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103002";>Bug 103002</a> - string_buffer_test.cpp:43: error: ISO C++ forbids initialization of member ‘str1’</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103085";>Bug 103085</a> - [ivb byt hsw] piglit.spec.arb_indirect_parameters.tf-count-arrays</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103098";>Bug 103098</a> - [OpenGL CTS] KHR-GL45.enhanced_layouts.varying_structure_locations fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103101";>Bug 103101</a> - [SKL][bisected] DiRT Rally GPU hang</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103115";>Bug 103115</a> - [BSW BXT GLK] dEQP-VK.spirv_assembly.instruction.compute.sconvert.int32_to_int64</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103128";>Bug 103128</a> - [softpipe] piglit fs-ldexp regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103142";>Bug 103142</a> - R600g+sb: optimizer apparently stuck in an endless loop</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103214";>Bug 103214</a> - GLES CTS functional.state_query.indexed.atomic_counter regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103227";>Bug 103227</a> - [G965 G45 ILK] ES2-CTS.gtf.GL2ExtensionTests.texture_float.texture_float regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103247";>Bug 103247</a> - Performance regression: car chase, manhattan</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103253";>Bug 103253</a> - blob.h:138:1: error: unknown type name 'ssize_t'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103265";>Bug 103265</a> - [llvmpipe] piglit depth-tex-compare regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103323";>Bug 103323</a> - Possible unintended error message in file pixel.c line 286</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103388";>Bug 103388</a> - Linking libcltgsi.la (llvm/codegen/libclllvm_la-common.lo) fails with "error: no match for 'operator-'" with GCC-7, Mesa from Git and current LLVM revisions</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103393";>Bug 103393</a> - glDispatchComputeGroupSizeARB : gl_GlobalInvocationID.x != gl_WorkGroupID.x * gl_LocalGroupSizeARB.x + gl_LocalInvocationID.x</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103412";>Bug 103412</a> - gallium/wgl: Another fix to context creation without prior SetPixelFormat()</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103519";>Bug 103519</a> - wayland egl apps crash on start with mesa 17.2</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103529";>Bug 103529</a> - [GM45] GPU hang with mpv fullscreen (bisected)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103537";>Bug 103537</a> - i965: Shadow of Mordor broken since commit 379b24a40d3d34ffdaaeb1b328f50e28ecb01468 on Haswell</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103544";>Bug 103544</a> - Graphical glitches r600 in game this war of mine linux native</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103616";>Bug 103616</a> - Increased difference from reference image in shaders</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103628";>Bug 103628</a> - [BXT, GLK, BSW] KHR-GL46.shader_ballot_tests.ShaderBallotBitmasks</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103759";>Bug 103759</a> - plasma desktop corrupted rendering</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103787";>Bug 103787</a> - [BDW,BSW] gpu hang on spec.arb_pipeline_statistics_query.arb_pipeline_statistics_query-comp</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103909";>Bug 103909</a> - anv_allocator.c:113:1: error: static declaration of ‘memfd_create’ follows non-static declaration</li>
+
</ul>
<h2>Changes</h2>
-<ul>
-TBD
-</ul>
</div>
</body>
commit c4b070d25c023abcb7b07e4d3b0db5c48f756f01
Author: Emil Velikov <emil.velikov@collabora.com>
Date: Fri Dec 8 13:30:44 2017 +0000
Update version to 17.3.0(final)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
diff --git a/VERSION b/VERSION
index b67a895..5aadcd3 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-17.3.0-rc6
+17.3.0
commit 30abe7dfaeba73406d63ef54f36969d0e75f83af
Author: Emil Velikov <emil.velikov@collabora.com>
Date: Mon Dec 4 08:50:46 2017 +0000
Update version to 17.3.0-rc6
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
diff --git a/VERSION b/VERSION
index de21bbd..b67a895 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-17.3.0-rc5
+17.3.0-rc6
commit 5ac9d91ee3d897016d54e970a977c3fbbbe2488e
Author: Jason Ekstrand <jason.ekstrand@intel.com>
Date: Wed Nov 29 16:22:42 2017 -0800
i965: Disable regular fast-clears (CCS_D) on gen9+
This partially reverts commit 3e57e9494c2279580ad6a83ab8c065d01e7e634e
which caused a bunch of GPU hangs on several Source titles. To date, we
have no clue why these hangs are actually happening. This undoes the
final effect of 3e57e9494c227 and gets us back to not hanging. Tested
with Team Fortress 2.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102435
Fixes: 3e57e9494c2279580ad6a83ab8c065d01e7e634e
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit ee57b15ec764736e2d5360beaef9fb2045ed0f68)
diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c b/src/mesa/drivers/dri/i965/brw_meta_util.c
index d292f5a..ba92168 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_util.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_util.c
@@ -293,6 +293,17 @@ brw_is_color_fast_clear_compatible(struct brw_context *brw,
brw->mesa_to_isl_render_format[mt->format])
return false;
+ /* Gen9 doesn't support fast clear on single-sampled SRGB buffers. When
+ * GL_FRAMEBUFFER_SRGB is enabled any color renderbuffers will be
+ * resolved in intel_update_state. In that case it's pointless to do a
+ * fast clear because it's very likely to be immediately resolved.
+ */
+ if (devinfo->gen >= 9 &&
+ mt->surf.samples == 1 &&
+ ctx->Color.sRGBEnabled &&
+ _mesa_get_srgb_format_linear(mt->format) != mt->format)
+ return false;
+
const mesa_format format = _mesa_get_render_format(ctx, mt->format);
if (_mesa_is_format_integer_color(format)) {
if (devinfo->gen >= 8) {
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index ae596c7..9e69247 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -207,7 +207,13 @@ intel_miptree_supports_ccs(struct brw_context *brw,
if (!brw->mesa_format_supports_render[mt->format])
return false;
- return true;
+ if (devinfo->gen >= 9) {
+ mesa_format linear_format = _mesa_get_srgb_format_linear(mt->format);
+ const enum isl_format isl_format =
+ brw_isl_format_for_mesa_format(linear_format);
+ return isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format);
+ } else
+ return true;
}
static bool
@@ -250,7 +256,7 @@ intel_miptree_supports_hiz(const struct brw_context *brw,
* our HW tends to support more linear formats than sRGB ones, we use this
* format variant for check for CCS_E compatibility.
*/
-static bool
+MAYBE_UNUSED static bool
format_ccs_e_compat_with_miptree(const struct gen_device_info *devinfo,
const struct intel_mipmap_tree *mt,
enum isl_format access_format)
@@ -284,13 +290,12 @@ intel_miptree_supports_ccs_e(struct brw_context *brw,
if (!intel_miptree_supports_ccs(brw, mt))
return false;
- /* Many window system buffers are sRGB even if they are never rendered as
- * sRGB. For those, we want CCS_E for when sRGBEncode is false. When the
- * surface is used as sRGB, we fall back to CCS_D.
+ /* Fast clear can be also used to clear srgb surfaces by using equivalent
+ * linear format. This trick, however, can't be extended to be used with
+ * lossless compression and therefore a check is needed to see if the format
+ * really is linear.
*/
- mesa_format linear_format = _mesa_get_srgb_format_linear(mt->format);
- enum isl_format isl_format = brw_isl_format_for_mesa_format(linear_format);
- return isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format);
+ return _mesa_get_srgb_format_linear(mt->format) == mt->format;
}
/**
@@ -2685,27 +2690,29 @@ intel_miptree_render_aux_usage(struct brw_context *brw,
return ISL_AUX_USAGE_MCS;
case ISL_AUX_USAGE_CCS_D:
- return mt->mcs_buf ? ISL_AUX_USAGE_CCS_D : ISL_AUX_USAGE_NONE;
-
- case ISL_AUX_USAGE_CCS_E: {
- /* If the format supports CCS_E and is compatible with the miptree,
- * then we can use it.
+ /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of
+ * the single-sampled color renderbuffers because the CCS buffer isn't
+ * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
+ * enabled because otherwise the surface state will be programmed with
+ * the linear equivalent format anyway.
*/
- if (format_ccs_e_compat_with_miptree(&brw->screen->devinfo,
- mt, render_format))
- return ISL_AUX_USAGE_CCS_E;
-
- /* Otherwise, we have to fall back to CCS_D */
+ if (isl_format_is_srgb(render_format) &&
+ _mesa_get_srgb_format_linear(mt->format) != mt->format) {
+ return ISL_AUX_USAGE_NONE;
+ } else if (!mt->mcs_buf) {
+ return ISL_AUX_USAGE_NONE;
+ } else {
+ return ISL_AUX_USAGE_CCS_D;
+ }
- /* gen9 hardware technically supports non-0/1 clear colors with sRGB
- * formats. However, there are issues with blending where it doesn't
- * properly apply the sRGB curve to the clear color when blending.
+ case ISL_AUX_USAGE_CCS_E: {
+ /* Lossless compression is not supported for SRGB formats, it
+ * should be impossible to get here with such surfaces.
*/
- if (blend_enabled && isl_format_is_srgb(render_format) &&
- !isl_color_value_is_zero_one(mt->fast_clear_color, render_format))
- return ISL_AUX_USAGE_NONE;
+ assert(!isl_format_is_srgb(render_format) ||
+ _mesa_get_srgb_format_linear(mt->format) == mt->format);
- return ISL_AUX_USAGE_CCS_D;
+ return ISL_AUX_USAGE_CCS_E;
}
default:
commit 4eae5b39eee45ee9ec58634764a9d2376872d5c8
Author: Vinson Lee <vlee@freedesktop.org>
Date: Tue Nov 28 23:16:58 2017 -0800
anv: Check if memfd_create is already defined.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103909
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 8c1e4b1afc8d396ccf99c725c59b29a9aa305557)
[Emil Velikov: drop NA hunks]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
configure.ac
meson.build
src/intel/vulkan/anv_allocator.c
diff --git a/configure.ac b/configure.ac
index 036dfb9..a02173f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -793,6 +793,7 @@ AC_CHECK_HEADER([xlocale.h], [DEFINES="$DEFINES -DHAVE_XLOCALE_H"])
AC_CHECK_HEADER([sys/sysctl.h], [DEFINES="$DEFINES -DHAVE_SYS_SYSCTL_H"])
AC_CHECK_FUNC([strtof], [DEFINES="$DEFINES -DHAVE_STRTOF"])
AC_CHECK_FUNC([mkostemp], [DEFINES="$DEFINES -DHAVE_MKOSTEMP"])
+AC_CHECK_FUNC([memfd_create], [DEFINES="$DEFINES -DHAVE_MEMFD_CREATE"])
AC_MSG_CHECKING([whether strtod has locale support])
AC_LINK_IFELSE([AC_LANG_SOURCE([[
diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_allocator.c
index 27eedb5..4b24695 100644
--- a/src/intel/vulkan/anv_allocator.c
+++ b/src/intel/vulkan/anv_allocator.c
@@ -131,11 +131,13 @@ futex_wait(uint32_t *addr, int32_t value)
return sys_futex(addr, FUTEX_WAIT, value, NULL, NULL, 0);
}
+#ifndef HAVE_MEMFD_CREATE
static inline int
memfd_create(const char *name, unsigned int flags)
{
return syscall(SYS_memfd_create, name, flags);
}
+#endif
static inline uint32_t
ilog2_round_up(uint32_t value)
diff --git a/src/intel/vulkan/anv_gem_stubs.c b/src/intel/vulkan/anv_gem_stubs.c
index 02527b5..26eb5c8 100644
--- a/src/intel/vulkan/anv_gem_stubs.c
+++ b/src/intel/vulkan/anv_gem_stubs.c
@@ -27,11 +27,13 @@
#include "anv_private.h"
+#ifndef HAVE_MEMFD_CREATE
static inline int
memfd_create(const char *name, unsigned int flags)
{
return syscall(SYS_memfd_create, name, flags);
}
+#endif
uint32_t
anv_gem_create(struct anv_device *device, uint64_t size)
commit 4e84aaa906e7abf41b170146dd7ef3e7a76820b9
Author: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Date: Mon Nov 27 12:15:13 2017 +0200
intel/blorp: Fix possible NULL pointer dereferencing
Fix incomplete check of input params in blorp_surf_convert_to_uncompressed()
which can lead to NULL pointer dereferencing.
Fixes: 5ae8043fed2 ("intel/blorp: Add an entrypoint for doing
bit-for-bit copies")
Fixes: f395d0abc83 ("intel/blorp: Internally expose
surf_convert_to_uncompressed")
Reviewed-by: Emil Velikov <emli.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit cdb3eb7174f84f3200408c4b43c819fb093da9c6)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 4507046..7ab0819 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -2344,7 +2344,7 @@ blorp_surf_convert_to_uncompressed(const struct isl_device *isl_dev,
*/
blorp_surf_convert_to_single_slice(isl_dev, info);
- if (width || height) {
+ if (width && height) {
#ifndef NDEBUG
uint32_t right_edge_px = info->tile_x_sa + *x + *width;
uint32_t bottom_edge_px = info->tile_y_sa + *y + *height;
@@ -2357,7 +2357,7 @@ blorp_surf_convert_to_uncompressed(const struct isl_device *isl_dev,
*height = DIV_ROUND_UP(*height, fmtl->bh);
}
- if (x || y) {
+ if (x && y) {
assert(*x % fmtl->bw == 0);
assert(*y % fmtl->bh == 0);
*x /= fmtl->bw;
commit bcd4f26b41c97991d1268c308c15c350bd1da318
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Tue Nov 28 08:58:21 2017 -0800
i965: Reorganize batch/state BO fields into a 'brw_growing_bo' struct.
We're about to add more of them, and need to pass the whole lot of them
around together when growing them. Putting them in a struct makes this
much easier.
brw->batch.batch.bo is a bit of a mouthful, but it's nice to have things
labeled 'batch' and 'state' now that we have multiple buffers.
Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103101
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 74e38739ca266b8178eaa70e30578aa929b067ab)
[Emil Velikov: remove NA blorp_get_surface_base_address hunk]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/mesa/drivers/dri/i965/genX_blorp_exec.c
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 26e71e6..0db3f96 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -442,23 +442,26 @@ struct brw_reloc_list {
int reloc_array_size;
};
+struct brw_growing_bo {
+ struct brw_bo *bo;
+ uint32_t *map;
+ uint32_t *cpu_map;
+};
+
struct intel_batchbuffer {
/** Current batchbuffer being queued up. */
- struct brw_bo *bo;
- /** Last BO submitted to the hardware. Used for glFinish(). */
- struct brw_bo *last_bo;
+ struct brw_growing_bo batch;
/** Current statebuffer being queued up. */
- struct brw_bo *state_bo;
+ struct brw_growing_bo state;
+
+ /** Last batchbuffer submitted to the hardware. Used for glFinish(). */
+ struct brw_bo *last_bo;
#ifdef DEBUG
uint16_t emit, total;
#endif
uint16_t reserved_space;
uint32_t *map_next;
- uint32_t *map;
- uint32_t *batch_cpu_map;
- uint32_t *state_cpu_map;
- uint32_t *state_map;
uint32_t state_used;
enum brw_gpu_ring ring;
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index b2b0148..fbe4ced 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -65,15 +65,15 @@ upload_pipelined_state_pointers(struct brw_context *brw)
BEGIN_BATCH(7);
OUT_BATCH(_3DSTATE_PIPELINED_POINTERS << 16 | (7 - 2));
- OUT_RELOC(brw->batch.state_bo, 0, brw->vs.base.state_offset);
+ OUT_RELOC(brw->batch.state.bo, 0, brw->vs.base.state_offset);
if (brw->ff_gs.prog_active)
- OUT_RELOC(brw->batch.state_bo, 0, brw->ff_gs.state_offset | 1);
+ OUT_RELOC(brw->batch.state.bo, 0, brw->ff_gs.state_offset | 1);
else
OUT_BATCH(0);
- OUT_RELOC(brw->batch.state_bo, 0, brw->clip.state_offset | 1);
- OUT_RELOC(brw->batch.state_bo, 0, brw->sf.state_offset);
- OUT_RELOC(brw->batch.state_bo, 0, brw->wm.base.state_offset);
- OUT_RELOC(brw->batch.state_bo, 0, brw->cc.state_offset);
+ OUT_RELOC(brw->batch.state.bo, 0, brw->clip.state_offset | 1);
+ OUT_RELOC(brw->batch.state.bo, 0, brw->sf.state_offset);
+ OUT_RELOC(brw->batch.state.bo, 0, brw->wm.base.state_offset);
+ OUT_RELOC(brw->batch.state.bo, 0, brw->cc.state_offset);
ADVANCE_BATCH();
brw->ctx.NewDriverState |= BRW_NEW_PSP;
@@ -629,9 +629,9 @@ brw_upload_state_base_address(struct brw_context *brw)
OUT_BATCH(0);
OUT_BATCH(mocs_wb << 16);
/* Surface state base address: */
- OUT_RELOC64(brw->batch.state_bo, 0, mocs_wb << 4 | 1);
+ OUT_RELOC64(brw->batch.state.bo, 0, mocs_wb << 4 | 1);
/* Dynamic state base address: */
- OUT_RELOC64(brw->batch.state_bo, 0, mocs_wb << 4 | 1);
+ OUT_RELOC64(brw->batch.state.bo, 0, mocs_wb << 4 | 1);
/* Indirect object base address: MEDIA_OBJECT data */
OUT_BATCH(mocs_wb << 4 | 1);
OUT_BATCH(0);
@@ -664,7 +664,7 @@ brw_upload_state_base_address(struct brw_context *brw)
* BINDING_TABLE_STATE
* SURFACE_STATE
*/
- OUT_RELOC(brw->batch.state_bo, 0, 1);
+ OUT_RELOC(brw->batch.state.bo, 0, 1);
/* Dynamic state base address:
* SAMPLER_STATE
* SAMPLER_BORDER_COLOR_STATE
@@ -675,7 +675,7 @@ brw_upload_state_base_address(struct brw_context *brw)
* Push constants (when INSTPM: CONSTANT_BUFFER Address Offset
* Disable is clear, which we rely on)
*/
- OUT_RELOC(brw->batch.state_bo, 0, 1);
+ OUT_RELOC(brw->batch.state.bo, 0, 1);
OUT_BATCH(1); /* Indirect object base address: MEDIA_OBJECT data */
@@ -696,7 +696,7 @@ brw_upload_state_base_address(struct brw_context *brw)
BEGIN_BATCH(8);
OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (8 - 2));
OUT_BATCH(1); /* General state base address */
- OUT_RELOC(brw->batch.state_bo, 0, 1); /* Surface state base address */
+ OUT_RELOC(brw->batch.state.bo, 0, 1); /* Surface state base address */
OUT_BATCH(1); /* Indirect object base address */
OUT_RELOC(brw->cache.bo, 0, 1); /* Instruction base address */
OUT_BATCH(0xfffff001); /* General state upper bound */
@@ -707,7 +707,7 @@ brw_upload_state_base_address(struct brw_context *brw)
BEGIN_BATCH(6);
OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (6 - 2));
OUT_BATCH(1); /* General state base address */
- OUT_RELOC(brw->batch.state_bo, 0, 1); /* Surface state base address */
+ OUT_RELOC(brw->batch.state.bo, 0, 1); /* Surface state base address */
OUT_BATCH(1); /* Indirect object base address */
OUT_BATCH(1); /* General state upper bound */
OUT_BATCH(1); /* Indirect object upper bound */
diff --git a/src/mesa/drivers/dri/i965/brw_sync.c b/src/mesa/drivers/dri/i965/brw_sync.c
index 3926d95..6391648 100644
--- a/src/mesa/drivers/dri/i965/brw_sync.c
+++ b/src/mesa/drivers/dri/i965/brw_sync.c
@@ -146,7 +146,7 @@ brw_fence_insert_locked(struct brw_context *brw, struct brw_fence *fence)
assert(!fence->batch_bo);
assert(!fence->signalled);
- fence->batch_bo = brw->batch.bo;
+ fence->batch_bo = brw->batch.batch.bo;
brw_bo_reference(fence->batch_bo);
if (intel_batchbuffer_flush(brw) < 0) {
diff --git a/src/mesa/drivers/dri/i965/gen4_blorp_exec.h b/src/mesa/drivers/dri/i965/gen4_blorp_exec.h
index 798496f..7e5199c 100644
--- a/src/mesa/drivers/dri/i965/gen4_blorp_exec.h
+++ b/src/mesa/drivers/dri/i965/gen4_blorp_exec.h
@@ -28,7 +28,7 @@ dynamic_state_address(struct blorp_batch *batch, uint32_t offset)
struct brw_context *brw = batch->driver_batch;
return (struct blorp_address) {
- .buffer = brw->batch.state_bo,
+ .buffer = brw->batch.state.bo,
.offset = offset,
};
}
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index 3bf6fd6..bb90b36 100644
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -60,7 +60,7 @@ blorp_emit_reloc(struct blorp_batch *batch,
uint32_t offset;
if (GEN_GEN < 6 && brw_ptr_in_state_buffer(&brw->batch, location)) {
- offset = (char *)location - (char *)brw->batch.state_map;
+ offset = (char *)location - (char *)brw->batch.state.map;
return brw_state_reloc(&brw->batch, offset,
address.buffer, address.offset + delta,
address.reloc_flags);
@@ -68,7 +68,7 @@ blorp_emit_reloc(struct blorp_batch *batch,
assert(!brw_ptr_in_state_buffer(&brw->batch, location));
- offset = (char *)location - (char *)brw->batch.map;
+ offset = (char *)location - (char *)brw->batch.batch.map;
return brw_batch_reloc(&brw->batch, offset,
address.buffer, address.offset + delta,
address.reloc_flags);
@@ -86,7 +86,7 @@ blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset,
brw_state_reloc(&brw->batch, ss_offset, bo, address.offset + delta,
address.reloc_flags);
- void *reloc_ptr = (void *)brw->batch.state_map + ss_offset;
+ void *reloc_ptr = (void *)brw->batch.state.map + ss_offset;
#if GEN_GEN >= 8
*(uint64_t *)reloc_ptr = reloc_val;
#else
@@ -150,7 +150,7 @@ blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
void *data = brw_state_batch(brw, size, 64, &offset);
*addr = (struct blorp_address) {
- .buffer = brw->batch.state_bo,
+ .buffer = brw->batch.state.bo,
.offset = offset,
#if GEN_GEN == 10
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 96bbf44..87718ad 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -89,7 +89,7 @@ __gen_combine_address(struct brw_context *brw, void *location,
return address.offset + delta;
} else {
if (GEN_GEN < 6 && brw_ptr_in_state_buffer(batch, location)) {
- offset = (char *) location - (char *) brw->batch.state_map;
+ offset = (char *) location - (char *) brw->batch.state.map;
return brw_state_reloc(batch, offset, address.bo,
address.offset + delta,
address.reloc_flags);
@@ -97,7 +97,7 @@ __gen_combine_address(struct brw_context *brw, void *location,
assert(!brw_ptr_in_state_buffer(batch, location));
- offset = (char *) location - (char *) brw->batch.map;
+ offset = (char *) location - (char *) brw->batch.batch.map;
return brw_batch_reloc(batch, offset, address.bo,
address.offset + delta,
address.reloc_flags);
@@ -1279,7 +1279,7 @@ genX(upload_clip_state)(struct brw_context *brw)
clip.GuardbandClipTestEnable = true;
clip.ClipperViewportStatePointer =
- ro_bo(brw->batch.state_bo, brw->clip.vp_offset);
+ ro_bo(brw->batch.state.bo, brw->clip.vp_offset);
clip.ScreenSpaceViewportXMin = -1;
clip.ScreenSpaceViewportXMax = 1;
@@ -1496,7 +1496,7 @@ genX(upload_sf)(struct brw_context *brw)
* domain.
*/
sf.SetupViewportStateOffset =
- ro_bo(brw->batch.state_bo, brw->sf.vp_offset);
+ ro_bo(brw->batch.state.bo, brw->sf.vp_offset);
sf.PointRasterizationRule = RASTRULE_UPPER_RIGHT;
@@ -1789,7 +1789,7 @@ genX(upload_wm)(struct brw_context *brw)
if (stage_state->sampler_count)
wm.SamplerStatePointer =
- ro_bo(brw->batch.state_bo, stage_state->sampler_offset);
+ ro_bo(brw->batch.state.bo, stage_state->sampler_offset);
#if GEN_GEN == 5
if (wm_prog_data->prog_offset_2)
wm.GRFRegisterCount2 = wm_prog_data->reg_blocks_2;
@@ -2082,7 +2082,7 @@ genX(upload_vs_state)(struct brw_context *brw)
vs.StatisticsEnable = false;
vs.SamplerStatePointer =
- ro_bo(brw->batch.state_bo, stage_state->sampler_offset);
+ ro_bo(brw->batch.state.bo, stage_state->sampler_offset);
#endif
#if GEN_GEN == 5
@@ -3331,7 +3331,7 @@ genX(upload_color_calc_state)(struct brw_context *brw)
cc.StatisticsEnable = brw->stats_wm;
cc.CCViewportStatePointer =
- ro_bo(brw->batch.state_bo, brw->cc.vp_offset);
+ ro_bo(brw->batch.state.bo, brw->cc.vp_offset);
#else
/* _NEW_COLOR */
cc.BlendConstantColorRed = ctx->Color.BlendColorUnclamped[0];
@@ -5083,7 +5083,7 @@ genX(update_sampler_state)(struct brw_context *brw,
}
#if GEN_GEN < 6
samp_st.BorderColorPointer =
- ro_bo(brw->batch.state_bo, border_color_offset);
+ ro_bo(brw->batch.state.bo, border_color_offset);
#else
samp_st.BorderColorPointer = border_color_offset;
#endif
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index ed2131e..ba046b9 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -84,11 +84,11 @@ intel_batchbuffer_init(struct brw_context *brw)
const struct gen_device_info *devinfo = &screen->devinfo;
if (!devinfo->has_llc) {
- batch->batch_cpu_map = malloc(BATCH_SZ);
- batch->map = batch->batch_cpu_map;
- batch->map_next = batch->map;
- batch->state_cpu_map = malloc(STATE_SZ);
- batch->state_map = batch->state_cpu_map;
+ batch->batch.cpu_map = malloc(BATCH_SZ);
+ batch->batch.map = batch->batch.cpu_map;
+ batch->map_next = batch->batch.map;
+ batch->state.cpu_map = malloc(STATE_SZ);
+ batch->state.map = batch->state.cpu_map;
}
init_reloc_list(&batch->batch_relocs, 250);
@@ -171,20 +171,21 @@ intel_batchbuffer_reset(struct brw_context *brw)
brw_bo_unreference(batch->last_bo);
batch->last_bo = NULL;
}
- batch->last_bo = batch->bo;
+ batch->last_bo = batch->batch.bo;
- batch->bo = brw_bo_alloc(bufmgr, "batchbuffer", BATCH_SZ, 4096);
- if (!batch->batch_cpu_map) {
- batch->map = brw_bo_map(brw, batch->bo, MAP_READ | MAP_WRITE);
+ batch->batch.bo = brw_bo_alloc(bufmgr, "batchbuffer", BATCH_SZ, 4096);
+ if (!batch->batch.cpu_map) {
+ batch->batch.map =
+ brw_bo_map(brw, batch->batch.bo, MAP_READ | MAP_WRITE);
}
- batch->map_next = batch->map;
+ batch->map_next = batch->batch.map;
- batch->state_bo = brw_bo_alloc(bufmgr, "statebuffer", STATE_SZ, 4096);
- batch->state_bo->kflags =
+ batch->state.bo = brw_bo_alloc(bufmgr, "statebuffer", STATE_SZ, 4096);
+ batch->state.bo->kflags =
can_do_exec_capture(screen) ? EXEC_OBJECT_CAPTURE : 0;
- if (!batch->state_cpu_map) {
- batch->state_map =
- brw_bo_map(brw, batch->state_bo, MAP_READ | MAP_WRITE);
+ if (!batch->state.cpu_map) {
+ batch->state.map =
+ brw_bo_map(brw, batch->state.bo, MAP_READ | MAP_WRITE);
}
/* Avoid making 0 a valid state offset - otherwise the decoder will try
@@ -192,8 +193,8 @@ intel_batchbuffer_reset(struct brw_context *brw)
*/
batch->state_used = 1;
- add_exec_bo(batch, batch->bo);
- assert(batch->bo->index == 0);
+ add_exec_bo(batch, batch->batch.bo);
+ assert(batch->batch.bo->index == 0);
batch->needs_sol_reset = false;
batch->state_base_address_emitted = false;
@@ -242,8 +243,8 @@ intel_batchbuffer_reset_to_saved(struct brw_context *brw)
void
intel_batchbuffer_free(struct intel_batchbuffer *batch)
{
- free(batch->batch_cpu_map);
- free(batch->state_cpu_map);
+ free(batch->batch.cpu_map);
+ free(batch->state.cpu_map);
for (int i = 0; i < batch->exec_count; i++) {
brw_bo_unreference(batch->exec_bos[i]);
@@ -254,8 +255,8 @@ intel_batchbuffer_free(struct intel_batchbuffer *batch)
free(batch->validation_list);
brw_bo_unreference(batch->last_bo);
- brw_bo_unreference(batch->bo);
- brw_bo_unreference(batch->state_bo);
+ brw_bo_unreference(batch->batch.bo);
+ brw_bo_unreference(batch->state.bo);
if (batch->state_batch_sizes)
_mesa_hash_table_destroy(batch->state_batch_sizes, NULL);
}
@@ -367,13 +368,14 @@ intel_batchbuffer_require_space(struct brw_context *brw, GLuint sz,
const unsigned batch_used = USED_BATCH(*batch) * 4;
if (batch_used + sz >= BATCH_SZ && !batch->no_wrap) {
intel_batchbuffer_flush(brw);
- } else if (batch_used + sz >= batch->bo->size) {
+ } else if (batch_used + sz >= batch->batch.bo->size) {
const unsigned new_size =
- MIN2(batch->bo->size + batch->bo->size / 2, MAX_BATCH_SIZE);
- grow_buffer(brw, &batch->bo, &batch->map, &batch->batch_cpu_map,
- batch_used, new_size);
- batch->map_next = (void *) batch->map + batch_used;
- assert(batch_used + sz < batch->bo->size);
+ MIN2(batch->batch.bo->size + batch->batch.bo->size / 2,
+ MAX_BATCH_SIZE);
+ grow_buffer(brw, &batch->batch.bo, &batch->batch.map,
+ &batch->batch.cpu_map, batch_used, new_size);
+ batch->map_next = (void *) batch->batch.map + batch_used;
+ assert(batch_used + sz < batch->batch.bo->size);
}
/* The intel_batchbuffer_flush() calls above might have changed
@@ -430,16 +432,16 @@ do_batch_dump(struct brw_context *brw)
if (batch->ring != RENDER_RING)
return;
- uint32_t *batch_data = brw_bo_map(brw, batch->bo, MAP_READ);
- uint32_t *state = brw_bo_map(brw, batch->state_bo, MAP_READ);
+ uint32_t *batch_data = brw_bo_map(brw, batch->batch.bo, MAP_READ);
+ uint32_t *state = brw_bo_map(brw, batch->state.bo, MAP_READ);
if (batch_data == NULL || state == NULL) {
fprintf(stderr, "WARNING: failed to map batchbuffer/statebuffer\n");
return;
}
uint32_t *end = batch_data + USED_BATCH(*batch);
- uint32_t batch_gtt_offset = batch->bo->gtt_offset;
- uint32_t state_gtt_offset = batch->state_bo->gtt_offset;
+ uint32_t batch_gtt_offset = batch->batch.bo->gtt_offset;
+ uint32_t state_gtt_offset = batch->state.bo->gtt_offset;
int length;
bool color = INTEL_DEBUG & DEBUG_COLOR;
@@ -560,8 +562,8 @@ do_batch_dump(struct brw_context *brw)
}
}
- brw_bo_unmap(batch->bo);
- brw_bo_unmap(batch->state_bo);
+ brw_bo_unmap(batch->batch.bo);
+ brw_bo_unmap(batch->state.bo);
}
#else
static void do_batch_dump(struct brw_context *brw) { }
@@ -583,7 +585,7 @@ brw_new_batch(struct brw_context *brw)
brw->batch.exec_count = 0;
brw->batch.aperture_space = 0;
- brw_bo_unreference(brw->batch.state_bo);
+ brw_bo_unreference(brw->batch.state.bo);
/* Create a new batchbuffer and reset the associated state: */
intel_batchbuffer_reset_and_clear_render_cache(brw);
@@ -779,18 +781,18 @@ submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd)
struct intel_batchbuffer *batch = &brw->batch;
int ret = 0;
- if (batch->batch_cpu_map) {
- void *bo_map = brw_bo_map(brw, batch->bo, MAP_WRITE);
- memcpy(bo_map, batch->batch_cpu_map, 4 * USED_BATCH(*batch));
+ if (batch->batch.cpu_map) {
+ void *bo_map = brw_bo_map(brw, batch->batch.bo, MAP_WRITE);
+ memcpy(bo_map, batch->batch.cpu_map, 4 * USED_BATCH(*batch));
}
- if (batch->state_cpu_map) {
- void *bo_map = brw_bo_map(brw, batch->state_bo, MAP_WRITE);
- memcpy(bo_map, batch->state_cpu_map, batch->state_used);
+ if (batch->state.cpu_map) {
+ void *bo_map = brw_bo_map(brw, batch->state.bo, MAP_WRITE);
+ memcpy(bo_map, batch->state.cpu_map, batch->state_used);
}
- brw_bo_unmap(batch->bo);
- brw_bo_unmap(batch->state_bo);
+ brw_bo_unmap(batch->batch.bo);
+ brw_bo_unmap(batch->state.bo);
if (!brw->screen->no_hw) {
/* The requirement for using I915_EXEC_NO_RELOC are:
@@ -818,19 +820,19 @@ submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd)
uint32_t hw_ctx = batch->ring == RENDER_RING ? brw->hw_ctx : 0;
/* Set statebuffer relocations */
- const unsigned state_index = batch->state_bo->index;
+ const unsigned state_index = batch->state.bo->index;
if (state_index < batch->exec_count &&
- batch->exec_bos[state_index] == batch->state_bo) {
+ batch->exec_bos[state_index] == batch->state.bo) {
struct drm_i915_gem_exec_object2 *entry =
&batch->validation_list[state_index];
- assert(entry->handle == batch->state_bo->gem_handle);
+ assert(entry->handle == batch->state.bo->gem_handle);
entry->relocation_count = batch->state_relocs.reloc_count;
entry->relocs_ptr = (uintptr_t) batch->state_relocs.relocs;
}
/* Set batchbuffer relocations */
struct drm_i915_gem_exec_object2 *entry = &batch->validation_list[0];
- assert(entry->handle == batch->bo->gem_handle);
+ assert(entry->handle == batch->batch.bo->gem_handle);
entry->relocation_count = batch->batch_relocs.reloc_count;
entry->relocs_ptr = (uintptr_t) batch->batch_relocs.relocs;
@@ -892,7 +894,7 @@ _intel_batchbuffer_flush_fence(struct brw_context *brw,
intel_upload_finish(brw);
if (brw->throttle_batch[0] == NULL) {
- brw->throttle_batch[0] = brw->batch.bo;
+ brw->throttle_batch[0] = brw->batch.batch.bo;
brw_bo_reference(brw->throttle_batch[0]);
}
@@ -914,7 +916,7 @@ _intel_batchbuffer_flush_fence(struct brw_context *brw,
if (unlikely(INTEL_DEBUG & DEBUG_SYNC)) {
fprintf(stderr, "waiting for idle\n");
- brw_bo_wait_rendering(brw->batch.bo);
+ brw_bo_wait_rendering(brw->batch.batch.bo);
}
/* Start a new batch buffer. */
@@ -987,7 +989,7 @@ brw_batch_reloc(struct intel_batchbuffer *batch, uint32_t batch_offset,
struct brw_bo *target, uint32_t target_offset,
unsigned int reloc_flags)
{
- assert(batch_offset <= batch->bo->size - sizeof(uint32_t));
+ assert(batch_offset <= batch->batch.bo->size - sizeof(uint32_t));
return emit_reloc(batch, &batch->batch_relocs, batch_offset,
target, target_offset, reloc_flags);
@@ -998,7 +1000,7 @@ brw_state_reloc(struct intel_batchbuffer *batch, uint32_t state_offset,
struct brw_bo *target, uint32_t target_offset,
unsigned int reloc_flags)
{
- assert(state_offset <= batch->state_bo->size - sizeof(uint32_t));
+ assert(state_offset <= batch->state.bo->size - sizeof(uint32_t));
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