xserver-xorg-video-ati: Changes to 'upstream-unstable'
configure.ac | 14 ++
man/radeon.man | 20 +++
src/ati_pciids_gen.h | 26 ++++
src/drmmode_display.c | 161 +++++++++++++++++++++++++-----
src/drmmode_display.h | 1
src/evergreen_accel.c | 190 +++++++++++++++++++++++++++++++-----
src/evergreen_exa.c | 45 ++++++--
src/evergreen_state.h | 7 +
src/evergreen_textured_videofuncs.c | 7 +
src/pcidb/ati_pciids.csv | 26 ++++
src/r600_exa.c | 86 ++++++++++------
src/r600_state.h | 6 +
src/r600_textured_videofuncs.c | 20 ++-
src/r6xx_accel.c | 75 ++++++++++----
src/radeon.h | 21 +++
src/radeon_chipinfo_gen.h | 26 ++++
src/radeon_chipset_gen.h | 26 ++++
src/radeon_commonfuncs.c | 17 +--
src/radeon_crtc.c | 27 +++--
src/radeon_dri2.c | 162 +++++++++++++++---------------
src/radeon_driver.c | 71 +++++++------
src/radeon_drm.h | 23 +++-
src/radeon_exa.c | 87 +++++++++++++++-
src/radeon_kms.c | 84 ++++++++++++++-
src/radeon_output.c | 4
src/radeon_pci_chipset_gen.h | 26 ++++
src/radeon_pci_device_match_gen.h | 26 ++++
src/radeon_probe.h | 7 -
src/radeon_textured_video.c | 17 +++
src/radeon_textured_videofuncs.c | 68 +++++++-----
src/radeon_video.c | 6 -
31 files changed, 1079 insertions(+), 303 deletions(-)
New commits:
commit 9425c50e93903fb64d9e569cfdc1e2c35d16ce25
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Thu Mar 29 00:19:12 2012 -0400
configure: bump version for release
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
diff --git a/configure.ac b/configure.ac
index 363e1d4..ae62cf2 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ([2.60])
AC_INIT([xf86-video-ati],
- [6.14.99],
+ [6.14.4],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
[xf86-video-ati])
commit dc18d771713ecd893c7d5833da6e0661093161dc
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Wed Mar 28 17:32:53 2012 -0400
configure: bump libdrm requirement for TN support
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
diff --git a/configure.ac b/configure.ac
index 0083325..363e1d4 100644
--- a/configure.ac
+++ b/configure.ac
@@ -141,7 +141,7 @@ if test "$DRI" = yes; then
AC_CHECK_HEADER(xf86drmMode.h,[DRM_MODE=yes],[DRM_MODE=no],[#include <stdint.h>
#include <stdlib.h>])
if test "x$DRM_MODE" = xyes; then
- PKG_CHECK_MODULES(LIBDRM_RADEON, [xorg-server >= 1.6.2 libdrm >= 2.4.31 libdrm_radeon],
+ PKG_CHECK_MODULES(LIBDRM_RADEON, [xorg-server >= 1.6.2 libdrm >= 2.4.33 libdrm_radeon],
[LIBDRM_RADEON=yes], [LIBDRM_RADEON=no])
if test "x$LIBDRM_RADEON" = xyes; then
commit 03535904a3e1542b3924d0a062c4b022ca196888
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Tue Mar 27 09:48:28 2012 -0400
radeon: man page updates
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
diff --git a/man/radeon.man b/man/radeon.man
index 55c5d02..e90979d 100644
--- a/man/radeon.man
+++ b/man/radeon.man
@@ -194,6 +194,8 @@ Radeon HD 6430/6450/6470/6490
.TP 12
.B CAYMAN
Radeon HD 6950/6970/6990
+.TP 12
+.B ARUBA
.PD
.SH CONFIGURATION DETAILS
Please refer to __xconfigfile__(__filemansuffix__) for general configuration
@@ -260,13 +262,25 @@ are supported for
.BI "Option \*qColorTiling\*q \*q" "boolean" \*q
The framebuffer can be addressed either in linear or tiled mode. Tiled mode can provide
significant performance benefits with 3D applications. Tiling will be disabled if the drm
-module is too old or if the current display configuration does not support it. KMS
-ColorTiling is not currently supported on R/RV/RS1XX, R/RV/RS2XX, and RS3XX.
+module is too old or if the current display configuration does not support it. On R600+
+this enables 1D tiling mode.
.br
The default value is
.B on
for R/RV3XX, R/RV4XX, R/RV5XX, RS6XX, RS740, R/RV6XX, R/RV7XX, RS780, RS880,
-EVERGREEN, and CAYMAN.
+EVERGREEN, and CAYMAN and
+.B off
+for R/RV/RS1XX, R/RV/RS2XX, and RS3XX.
+.TP
+.BI "Option \*qColorTiling2D\*q \*q" "boolean" \*q
+The framebuffer can be addressed either in linear, 1D, or 2D tiled modes. 2D tiled mode can
+provide significant performance benefits over 1D tiling with 3D applications. Tiling
+will be disabled if the drm module is too old or if the current display configuration
+does not support it. KMS ColorTiling2D is only supported on R600 and newer chips.
+.br
+The default value is
+.B off
+for R/RV6XX, R/RV7XX, RS780, RS880, EVERGREEN, and CAYMAN.
.TP
.BI "Option \*qEXAPixmaps\*q \*q" boolean \*q
Under KMS, to avoid thrashing pixmaps in/out of VRAM on low memory cards,
commit 6ed191c33caa33c12c2c6dafcba3a5ab1bf4a02f
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Tue Mar 20 19:57:53 2012 -0400
radeon/kms: add TN pci ids
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
index 82da618..77e41ac 100644
--- a/src/ati_pciids_gen.h
+++ b/src/ati_pciids_gen.h
@@ -589,3 +589,10 @@
#define PCI_CHIP_CAICOS_6778 0x6778
#define PCI_CHIP_CAICOS_6779 0x6779
#define PCI_CHIP_CAICOS_677B 0x677B
+#define PCI_CHIP_ARUBA_9900 0x9900
+#define PCI_CHIP_ARUBA_9901 0x9901
+#define PCI_CHIP_ARUBA_9903 0x9903
+#define PCI_CHIP_ARUBA_9904 0x9904
+#define PCI_CHIP_ARUBA_990f 0x990f
+#define PCI_CHIP_ARUBA_9990 0x9990
+#define PCI_CHIP_ARUBA_9991 0x9991
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
index ad3959b..3376438 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -590,3 +590,10 @@
"0x6778","CAICOS_6778","CAICOS",,,,,,"CAICOS"
"0x6779","CAICOS_6779","CAICOS",,,,,,"CAICOS"
"0x677B","CAICOS_677B","CAICOS",,,,,,"CAICOS"
+"0x9900","ARUBA_9900","ARUBA",1,,,,,"ARUBA"
+"0x9901","ARUBA_9901","ARUBA",,,,,,"ARUBA"
+"0x9903","ARUBA_9903","ARUBA",1,,,,,"ARUBA"
+"0x9904","ARUBA_9904","ARUBA",,,,,,"ARUBA"
+"0x990f","ARUBA_990f","ARUBA",,,,,,"ARUBA"
+"0x9990","ARUBA_9990","ARUBA",1,,,,,"ARUBA"
+"0x9991","ARUBA_9991","ARUBA",,,,,,"ARUBA"
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
index 4ba84eb..a578825 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -509,4 +509,11 @@ static RADEONCardInfo RADEONCards[] = {
{ 0x6778, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 },
{ 0x6779, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 },
{ 0x677B, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 },
+ { 0x9900, CHIP_FAMILY_ARUBA, 1, 0, 0, 0, 0 },
+ { 0x9901, CHIP_FAMILY_ARUBA, 0, 0, 0, 0, 0 },
+ { 0x9903, CHIP_FAMILY_ARUBA, 1, 0, 0, 0, 0 },
+ { 0x9904, CHIP_FAMILY_ARUBA, 0, 0, 0, 0, 0 },
+ { 0x990f, CHIP_FAMILY_ARUBA, 0, 0, 0, 0, 0 },
+ { 0x9990, CHIP_FAMILY_ARUBA, 1, 0, 0, 0, 0 },
+ { 0x9991, CHIP_FAMILY_ARUBA, 0, 0, 0, 0, 0 },
};
diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h
index 8e567f9..e7f7379 100644
--- a/src/radeon_chipset_gen.h
+++ b/src/radeon_chipset_gen.h
@@ -509,5 +509,12 @@ static SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_CAICOS_6778, "CAICOS" },
{ PCI_CHIP_CAICOS_6779, "CAICOS" },
{ PCI_CHIP_CAICOS_677B, "CAICOS" },
+ { PCI_CHIP_ARUBA_9900, "ARUBA" },
+ { PCI_CHIP_ARUBA_9901, "ARUBA" },
+ { PCI_CHIP_ARUBA_9903, "ARUBA" },
+ { PCI_CHIP_ARUBA_9904, "ARUBA" },
+ { PCI_CHIP_ARUBA_990f, "ARUBA" },
+ { PCI_CHIP_ARUBA_9990, "ARUBA" },
+ { PCI_CHIP_ARUBA_9991, "ARUBA" },
{ -1, NULL }
};
diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h
index f271720..aef8d89 100644
--- a/src/radeon_pci_chipset_gen.h
+++ b/src/radeon_pci_chipset_gen.h
@@ -509,5 +509,12 @@ PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_CAICOS_6778, PCI_CHIP_CAICOS_6778, RES_SHARED_VGA },
{ PCI_CHIP_CAICOS_6779, PCI_CHIP_CAICOS_6779, RES_SHARED_VGA },
{ PCI_CHIP_CAICOS_677B, PCI_CHIP_CAICOS_677B, RES_SHARED_VGA },
+ { PCI_CHIP_ARUBA_9900, PCI_CHIP_ARUBA_9900, RES_SHARED_VGA },
+ { PCI_CHIP_ARUBA_9901, PCI_CHIP_ARUBA_9901, RES_SHARED_VGA },
+ { PCI_CHIP_ARUBA_9903, PCI_CHIP_ARUBA_9903, RES_SHARED_VGA },
+ { PCI_CHIP_ARUBA_9904, PCI_CHIP_ARUBA_9904, RES_SHARED_VGA },
+ { PCI_CHIP_ARUBA_990f, PCI_CHIP_ARUBA_990f, RES_SHARED_VGA },
+ { PCI_CHIP_ARUBA_9990, PCI_CHIP_ARUBA_9990, RES_SHARED_VGA },
+ { PCI_CHIP_ARUBA_9991, PCI_CHIP_ARUBA_9991, RES_SHARED_VGA },
{ -1, -1, RES_UNDEFINED }
};
diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h
index 8867052..681a6b8 100644
--- a/src/radeon_pci_device_match_gen.h
+++ b/src/radeon_pci_device_match_gen.h
@@ -509,5 +509,12 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6778, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6779, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_677B, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_ARUBA_9900, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_ARUBA_9901, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_ARUBA_9903, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_ARUBA_9904, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_ARUBA_990f, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_ARUBA_9990, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_ARUBA_9991, 0 ),
{ 0, 0, 0 }
};
commit 55d65fcf33eb383e3fbc7a1d469ab68a70a7ab37
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Tue Mar 20 19:54:57 2012 -0400
radeon/kms: add support for TN (trinity) APUs
- KMS only
- Includes full EXA/Xv support
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c
index 3c76d38..581aaf6 100644
--- a/src/evergreen_accel.c
+++ b/src/evergreen_accel.c
@@ -661,7 +661,8 @@ evergreen_set_vtx_resource(ScrnInfoPtr pScrn, vtx_resource_t *res, uint32_t doma
(info->ChipFamily == CHIP_FAMILY_SUMO) ||
(info->ChipFamily == CHIP_FAMILY_SUMO2) ||
(info->ChipFamily == CHIP_FAMILY_CAICOS) ||
- (info->ChipFamily == CHIP_FAMILY_CAYMAN))
+ (info->ChipFamily == CHIP_FAMILY_CAYMAN) ||
+ (info->ChipFamily == CHIP_FAMILY_ARUBA))
evergreen_cp_set_surface_sync(pScrn, TC_ACTION_ENA_bit,
accel_state->vbo.vb_offset, accel_state->vbo.vb_mc_addr,
res->bo,
@@ -864,8 +865,8 @@ evergreen_fix_scissor_coordinates(ScrnInfoPtr pScrn, int *x1, int *y1, int *x2,
if (*y2 == 0)
*y1 = 1;
- /* cayman only */
- if (info->ChipFamily == CHIP_FAMILY_CAYMAN) {
+ /* cayman/tn only */
+ if (info->ChipFamily >= CHIP_FAMILY_CAYMAN) {
/* cliprects aren't affected so we can use them to clip if we need
* a true 1x1 clip region
*/
@@ -970,7 +971,7 @@ evergreen_set_default_state(ScrnInfoPtr pScrn)
RADEONInfoPtr info = RADEONPTR(pScrn);
struct radeon_accel_state *accel_state = info->accel_state;
- if (info->ChipFamily == CHIP_FAMILY_CAYMAN) {
+ if (info->ChipFamily >= CHIP_FAMILY_CAYMAN) {
cayman_set_default_state(pScrn);
return;
}
diff --git a/src/evergreen_exa.c b/src/evergreen_exa.c
index 1077a2d..cee3ec2 100644
--- a/src/evergreen_exa.c
+++ b/src/evergreen_exa.c
@@ -1958,7 +1958,7 @@ EVERGREENDrawInit(ScreenPtr pScreen)
if (!EVERGREENAllocShaders(pScrn, pScreen))
return FALSE;
- if (info->ChipFamily == CHIP_FAMILY_CAYMAN) {
+ if (info->ChipFamily >= CHIP_FAMILY_CAYMAN) {
if (!CAYMANLoadShaders(pScrn))
return FALSE;
} else {
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index c094bea..dda25e9 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -688,7 +688,7 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
Bool colorTilingDefault =
xorgGetVersion() >= XORG_VERSION_NUMERIC(1,9,4,901,0) &&
info->ChipFamily >= CHIP_FAMILY_R300 &&
- info->ChipFamily <= CHIP_FAMILY_CAYMAN;
+ info->ChipFamily <= CHIP_FAMILY_ARUBA;
/* 2D color tiling */
if (info->ChipFamily >= CHIP_FAMILY_R600) {
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 3123bcc..6690502 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -108,6 +108,7 @@ typedef enum {
CHIP_FAMILY_TURKS,
CHIP_FAMILY_CAICOS,
CHIP_FAMILY_CAYMAN,
+ CHIP_FAMILY_ARUBA,
CHIP_FAMILY_LAST
} RADEONChipFamily;
commit b5cf9bd693cf4090956add4c33c4fae9c3069a03
Author: Marek Olšák <maraeo@gmail.com>
Date: Wed Mar 7 11:01:40 2012 -0500
r6xx: initialize SX_MISC
If Mesa set it to 1, the DDX would not render anything = the monitor would
basically freeze.
agd5f: update emit count as well.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
diff --git a/src/r6xx_accel.c b/src/r6xx_accel.c
index 8e6bffa..8d25424 100644
--- a/src/r6xx_accel.c
+++ b/src/r6xx_accel.c
@@ -1161,7 +1161,7 @@ r600_set_default_state(ScrnInfoPtr pScrn, drmBufPtr ib)
r600_fs_setup(pScrn, ib, &fs_conf, RADEON_GEM_DOMAIN_VRAM);
// VGT
- BEGIN_BATCH(43);
+ BEGIN_BATCH(46);
PACK0(ib, VGT_MAX_VTX_INDX, 4);
E32(ib, 0xffffff); // VGT_MAX_VTX_INDX
E32(ib, 0); // VGT_MIN_VTX_INDX
@@ -1200,6 +1200,7 @@ r600_set_default_state(ScrnInfoPtr pScrn, drmBufPtr ib)
E32(ib, 0); // VGT_VTX_CNT_EN
EREG(ib, VGT_STRMOUT_BUFFER_EN, 0);
+ EREG(ib, SX_MISC, 0);
END_BATCH();
}
commit 355dc4295912c153f5333421594fa90aa119a056
Author: Michel Dänzer <michel.daenzer@amd.com>
Date: Tue Mar 6 15:52:40 2012 +0100
DRI2: Unreference buffers immediately when event wait info is invalidated.
Deferring this could result in trying to unreference buffers from a previous
server generation, i.e. accessing freed memory.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Christian König <Christian.koenig@amd.com>
diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
index cf905a1..8bd3f66 100644
--- a/src/radeon_dri2.c
+++ b/src/radeon_dri2.c
@@ -571,6 +571,22 @@ ListDelDRI2ClientEvents(ClientPtr client, struct xorg_list *entry)
}
static void
+radeon_dri2_ref_buffer(BufferPtr buffer)
+{
+ struct dri2_buffer_priv *private = buffer->driverPrivate;
+ private->refcnt++;
+}
+
+static void
+radeon_dri2_unref_buffer(BufferPtr buffer)
+{
+ if (buffer) {
+ struct dri2_buffer_priv *private = buffer->driverPrivate;
+ radeon_dri2_destroy_buffer(&(private->pixmap->drawable), buffer);
+ }
+}
+
+static void
radeon_dri2_client_state_changed(CallbackListPtr *ClientStateCallback, pointer data, pointer calldata)
{
DRI2ClientEventsPtr pClientEventsPriv;
@@ -591,6 +607,8 @@ radeon_dri2_client_state_changed(CallbackListPtr *ClientStateCallback, pointer d
if (pClientEventsPriv) {
xorg_list_for_each_entry(ref, &pClientEventsPriv->reference_list, link) {
ref->valid = FALSE;
+ radeon_dri2_unref_buffer(ref->front);
+ radeon_dri2_unref_buffer(ref->back);
}
}
break;
@@ -599,22 +617,6 @@ radeon_dri2_client_state_changed(CallbackListPtr *ClientStateCallback, pointer d
}
}
-static void
-radeon_dri2_ref_buffer(BufferPtr buffer)
-{
- struct dri2_buffer_priv *private = buffer->driverPrivate;
- private->refcnt++;
-}
-
-static void
-radeon_dri2_unref_buffer(BufferPtr buffer)
-{
- if (buffer) {
- struct dri2_buffer_priv *private = buffer->driverPrivate;
- radeon_dri2_destroy_buffer(&(private->pixmap->drawable), buffer);
- }
-}
-
static int radeon_dri2_drawable_crtc(DrawablePtr pDraw)
{
ScreenPtr pScreen = pDraw->pScreen;
@@ -849,10 +851,11 @@ void radeon_dri2_frame_event_handler(unsigned int frame, unsigned int tv_sec,
}
cleanup:
- radeon_dri2_unref_buffer(event->front);
- radeon_dri2_unref_buffer(event->back);
- if (event->valid)
+ if (event->valid) {
+ radeon_dri2_unref_buffer(event->front);
+ radeon_dri2_unref_buffer(event->back);
ListDelDRI2ClientEvents(event->client, &event->link);
+ }
free(event);
}
commit fe51469b2e02e4d565050bab077985270fb58a9b
Author: Michel Dänzer <michel.daenzer@amd.com>
Date: Tue Mar 6 15:52:40 2012 +0100
Re-register DRM FD wakeup handler for each server generation.
Fixes hang when trying to use DRI2 swap scheduling after a server reset.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Christian König <Christian.koenig@amd.com>
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 3a23474..38f9940 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -1479,9 +1479,7 @@ drm_wakeup_handler(pointer data, int err, pointer p)
Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int cpp)
{
- RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
xf86CrtcConfigPtr xf86_config;
- RADEONInfoPtr info = RADEONPTR(pScrn);
int i, num_dvi = 0, num_hdmi = 0;
xf86CrtcConfigInit(pScrn, &drmmode_xf86crtc_config_funcs);
@@ -1509,14 +1507,22 @@ Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int cpp)
drmmode->event_context.version = DRM_EVENT_CONTEXT_VERSION;
drmmode->event_context.vblank_handler = drmmode_vblank_handler;
drmmode->event_context.page_flip_handler = drmmode_flip_handler;
- if (!pRADEONEnt->fd_wakeup_registered && info->dri->pKernelDRMVersion->version_minor >= 4) {
+
+ return TRUE;
+}
+
+void drmmode_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode)
+{
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+
+ if (pRADEONEnt->fd_wakeup_registered != serverGeneration &&
+ info->dri->pKernelDRMVersion->version_minor >= 4) {
AddGeneralSocket(drmmode->fd);
RegisterBlockAndWakeupHandlers((BlockHandlerProcPtr)NoopDDA,
drm_wakeup_handler, drmmode);
- pRADEONEnt->fd_wakeup_registered = TRUE;
+ pRADEONEnt->fd_wakeup_registered = serverGeneration;
}
-
- return TRUE;
}
Bool drmmode_set_bufmgr(ScrnInfoPtr pScrn, drmmode_ptr drmmode, struct radeon_bo_manager *bufmgr)
diff --git a/src/drmmode_display.h b/src/drmmode_display.h
index eb271f5..dff0392 100644
--- a/src/drmmode_display.h
+++ b/src/drmmode_display.h
@@ -99,6 +99,7 @@ typedef struct {
extern Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int cpp);
+extern void drmmode_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode);
extern Bool drmmode_set_bufmgr(ScrnInfoPtr pScrn, drmmode_ptr drmmode, struct radeon_bo_manager *bufmgr);
extern void drmmode_set_cursor(ScrnInfoPtr scrn, drmmode_ptr drmmode, int id, struct radeon_bo *bo);
void drmmode_adjust_frame(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int x, int y, int flags);
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index 124ce80..c094bea 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -1136,6 +1136,8 @@ Bool RADEONScreenInit_KMS(int scrnIndex, ScreenPtr pScreen,
if (serverGeneration == 1)
xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
+ drmmode_init(pScrn, &info->drmmode);
+
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"RADEONScreenInit finished\n");
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 8ba7214..3123bcc 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -750,7 +750,7 @@ typedef struct
void *FB; /* Map of FB region */
int FB_cnt; /* Map of FB region refcount */
int fd; /* for sharing across zaphod heads */
- Bool fd_wakeup_registered; /* fd has already been registered for wakeup handling */
+ unsigned long fd_wakeup_registered; /* server generation for which fd has been registered for wakeup handling */
int dri2_info_cnt;
} RADEONEntRec, *RADEONEntPtr;
commit 878454ae8d8e96dd27a19d0b30940d014c4cd7e2
Author: Hans Verkuil <hverkuil@xs4all.nl>
Date: Fri Feb 24 09:35:39 2012 -0500
Fix ConnectorTable crash in radeon_output.c
The sam440ep PPC board requires a ConnectorTable xorg.conf option, but putting
in that option causes the radeon driver to crash. I finally traced it to a
copy-and-paste bug in radeon_output.c as a result of a major rework in commit
82f12e5a40c1fbcb91910a0f8b725c34fff02aae.
The actual crash occurred in RADEONPrintPortMap().
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
diff --git a/src/radeon_output.c b/src/radeon_output.c
index ccde346..5abd60e 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -3002,9 +3002,9 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn)
info->BiosConnector[i].devices |= ATOM_DEVICE_CRT2_SUPPORT;
if (!radeon_add_encoder(pScrn,
radeon_get_encoder_id_from_supported_device(pScrn,
- ATOM_DEVICE_CRT1_SUPPORT,
+ ATOM_DEVICE_CRT2_SUPPORT,
2),
- ATOM_DEVICE_CRT1_SUPPORT))
+ ATOM_DEVICE_CRT2_SUPPORT))
return FALSE;
info->BiosConnector[i].load_detection = FALSE;
break;
commit 688c8a54a00b01e73a11970ad2abe858f8c7c5c4
Author: Roland Scheidegger <rscheidegger_lists@hispeed.ch>
Date: Sat Feb 18 21:12:34 2012 +0100
radeon: avoid rounding errors in texture coords for textured xv
make sure the division is done with floats, otherwise the coordinate
can be wrong up to 1 texel.
Particularly visible with clipping and small source scaled up (since one
texel can be a shift of several pixels) but could be seen even unscaled.
Should provide more accurate coords without clipping too depending on the
scale factor probably.
Changed for r100-r600, though only tested on r300.
diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c
index 986650a..62da992 100644
--- a/src/r600_textured_videofuncs.c
+++ b/src/r600_textured_videofuncs.c
@@ -503,7 +503,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
}
while (nBox--) {
- int srcX, srcY, srcw, srch;
+ float srcX, srcY, srcw, srch;
int dstX, dstY, dstw, dsth;
float *vb;
@@ -515,13 +515,13 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
srcX = pPriv->src_x;
srcX += ((pBox->x1 - pPriv->drw_x) *
- pPriv->src_w) / pPriv->dst_w;
+ pPriv->src_w) / (float)pPriv->dst_w;
srcY = pPriv->src_y;
srcY += ((pBox->y1 - pPriv->drw_y) *
- pPriv->src_h) / pPriv->dst_h;
+ pPriv->src_h) / (float)pPriv->dst_h;
- srcw = (pPriv->src_w * dstw) / pPriv->dst_w;
- srch = (pPriv->src_h * dsth) / pPriv->dst_h;
+ srcw = (pPriv->src_w * dstw) / (float)pPriv->dst_w;
+ srch = (pPriv->src_h * dsth) / (float)pPriv->dst_h;
vb = radeon_vbo_space(pScrn, &accel_state->vbo, 16);
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index 7d4a1c1..7119553 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -437,7 +437,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
((loop_boxes * 3) << RADEON_CP_VC_CNTL_NUM_SHIFT));
while (loop_boxes--) {
- int srcX, srcY, srcw, srch;
+ float srcX, srcY, srcw, srch;
int dstX, dstY, dstw, dsth;
dstX = pBox->x1 + dstxoff;
dstY = pBox->y1 + dstyoff;
@@ -446,13 +446,13 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
srcX = pPriv->src_x;
srcX += ((pBox->x1 - pPriv->drw_x) *
- pPriv->src_w) / pPriv->dst_w;
+ pPriv->src_w) / (float)pPriv->dst_w;
srcY = pPriv->src_y;
srcY += ((pBox->y1 - pPriv->drw_y) *
- pPriv->src_h) / pPriv->dst_h;
+ pPriv->src_h) / (float)pPriv->dst_h;
- srcw = (pPriv->src_w * dstw) / pPriv->dst_w;
- srch = (pPriv->src_h * dsth) / pPriv->dst_h;
+ srcw = (pPriv->src_w * dstw) / (float)pPriv->dst_w;
+ srch = (pPriv->src_h * dsth) / (float)pPriv->dst_h;
if (pPriv->is_planar) {
@@ -493,7 +493,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
RADEON_VF_RADEON_MODE |
((nBox * 3) << RADEON_VF_NUM_VERTICES_SHIFT)));
while (nBox--) {
- int srcX, srcY, srcw, srch;
+ float srcX, srcY, srcw, srch;
int dstX, dstY, dstw, dsth;
dstX = pBox->x1 + dstxoff;
dstY = pBox->y1 + dstyoff;
@@ -502,13 +502,13 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
srcX = pPriv->src_x;
srcX += ((pBox->x1 - pPriv->drw_x) *
- pPriv->src_w) / pPriv->dst_w;
+ pPriv->src_w) / (float)pPriv->dst_w;
srcY = pPriv->src_y;
srcY += ((pBox->y1 - pPriv->drw_y) *
- pPriv->src_h) / pPriv->dst_h;
+ pPriv->src_h) / (float)pPriv->dst_h;
- srcw = (pPriv->src_w * dstw) / pPriv->dst_w;
- srch = (pPriv->src_h * dsth) / pPriv->dst_h;
+ srcw = (pPriv->src_w * dstw) / (float)pPriv->dst_w;
+ srch = (pPriv->src_h * dsth) / (float)pPriv->dst_h;
if (pPriv->is_planar) {
@@ -1070,7 +1070,7 @@ FUNC_NAME(R200DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
((loop_boxes * 3) << RADEON_CP_VC_CNTL_NUM_SHIFT));
while (loop_boxes--) {
- int srcX, srcY, srcw, srch;
+ float srcX, srcY, srcw, srch;
int dstX, dstY, dstw, dsth;
dstX = pBox->x1 + dstxoff;
dstY = pBox->y1 + dstyoff;
@@ -1079,13 +1079,13 @@ FUNC_NAME(R200DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
srcX = pPriv->src_x;
srcX += ((pBox->x1 - pPriv->drw_x) *
- pPriv->src_w) / pPriv->dst_w;
+ pPriv->src_w) / (float)pPriv->dst_w;
srcY = pPriv->src_y;
srcY += ((pBox->y1 - pPriv->drw_y) *
- pPriv->src_h) / pPriv->dst_h;
+ pPriv->src_h) / (float)pPriv->dst_h;
- srcw = (pPriv->src_w * dstw) / pPriv->dst_w;
- srch = (pPriv->src_h * dsth) / pPriv->dst_h;
+ srcw = (pPriv->src_w * dstw) / (float)pPriv->dst_w;
+ srch = (pPriv->src_h * dsth) / (float)pPriv->dst_h;
if (pPriv->is_planar) {
/*
@@ -1124,7 +1124,7 @@ FUNC_NAME(R200DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
RADEON_VF_PRIM_WALK_DATA |
((nBox * 3) << RADEON_VF_NUM_VERTICES_SHIFT)));
while (nBox--) {
- int srcX, srcY, srcw, srch;
+ float srcX, srcY, srcw, srch;
int dstX, dstY, dstw, dsth;
dstX = pBox->x1 + dstxoff;
dstY = pBox->y1 + dstyoff;
@@ -1133,13 +1133,13 @@ FUNC_NAME(R200DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
srcX = pPriv->src_x;
srcX += ((pBox->x1 - pPriv->drw_x) *
- pPriv->src_w) / pPriv->dst_w;
+ pPriv->src_w) / (float)pPriv->dst_w;
srcY = pPriv->src_y;
srcY += ((pBox->y1 - pPriv->drw_y) *
- pPriv->src_h) / pPriv->dst_h;
+ pPriv->src_h) / (float)pPriv->dst_h;
- srcw = (pPriv->src_w * dstw) / pPriv->dst_w;
- srch = (pPriv->src_h * dsth) / pPriv->dst_h;
+ srcw = (pPriv->src_w * dstw) / (float)pPriv->dst_w;
+ srch = (pPriv->src_h * dsth) / (float)pPriv->dst_h;
if (pPriv->is_planar) {
/*
@@ -2499,7 +2499,7 @@ FUNC_NAME(R300DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
*/
while (nBox--) {
- int srcX, srcY, srcw, srch;
+ float srcX, srcY, srcw, srch;
int dstX, dstY, dstw, dsth;
Bool use_quad = FALSE;
#ifdef ACCEL_CP
@@ -2522,13 +2522,13 @@ FUNC_NAME(R300DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
srcX = pPriv->src_x;
srcX += ((pBox->x1 - pPriv->drw_x) *
- pPriv->src_w) / pPriv->dst_w;
+ pPriv->src_w) / (float)pPriv->dst_w;
srcY = pPriv->src_y;
srcY += ((pBox->y1 - pPriv->drw_y) *
- pPriv->src_h) / pPriv->dst_h;
+ pPriv->src_h) / (float)pPriv->dst_h;
- srcw = (pPriv->src_w * dstw) / pPriv->dst_w;
- srch = (pPriv->src_h * dsth) / pPriv->dst_h;
+ srcw = (pPriv->src_w * dstw) / (float)pPriv->dst_w;
+ srch = (pPriv->src_h * dsth) / (float)pPriv->dst_h;
if (IS_R400_3D) {
if ((dstw+dsth) > 4021)
@@ -4130,7 +4130,7 @@ FUNC_NAME(R500DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
*/
while (nBox--) {
- int srcX, srcY, srcw, srch;
+ float srcX, srcY, srcw, srch;
int dstX, dstY, dstw, dsth;
#ifdef ACCEL_CP
int draw_size = 3 * pPriv->vtx_count + 4 + 2 + 3;
@@ -4152,13 +4152,13 @@ FUNC_NAME(R500DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
srcX = pPriv->src_x;
srcX += ((pBox->x1 - pPriv->drw_x) *
- pPriv->src_w) / pPriv->dst_w;
+ pPriv->src_w) / (float)pPriv->dst_w;
srcY = pPriv->src_y;
srcY += ((pBox->y1 - pPriv->drw_y) *
- pPriv->src_h) / pPriv->dst_h;
+ pPriv->src_h) / (float)pPriv->dst_h;
- srcw = (pPriv->src_w * dstw) / pPriv->dst_w;
- srch = (pPriv->src_h * dsth) / pPriv->dst_h;
+ srcw = (pPriv->src_w * dstw) / (float)pPriv->dst_w;
+ srch = (pPriv->src_h * dsth) / (float)pPriv->dst_h;
BEGIN_ACCEL(2);
OUT_ACCEL_REG(R300_SC_SCISSOR0, (((dstX) << R300_SCISSOR_X_SHIFT) |
commit 2778b56252124ef6f636a493d2e1457b43911c37
Author: Jerome Glisse <jglisse@redhat.com>
Date: Mon Feb 13 20:42:57 2012 -0500
radeon: r6xx-eg use linear general when using scratch bo
In path where we need to use scratch bo as temporary area,
consider it as linear buffer. Not linear aligned. Fix some
case such as in bugs:
https://bugs.freedesktop.org/show_bug.cgi?id=45827
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 7fa89de..3a23474 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -87,7 +87,7 @@ static PixmapPtr drmmode_create_bo_pixmap(ScrnInfoPtr pScrn,
surface->nsamples = 1;
surface->flags = RADEON_SURF_SCANOUT;
surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
- surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR, MODE);
+ surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR_ALIGNED, MODE);
if (tiling & RADEON_TILING_MICRO) {
surface->flags = RADEON_SURF_CLR(surface->flags, MODE);
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_1D, MODE);
@@ -1293,7 +1293,7 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
surface.nsamples = 1;
surface.flags = RADEON_SURF_SCANOUT;
surface.flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
- surface.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR, MODE);
+ surface.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR_ALIGNED, MODE);
if (tiling_flags & RADEON_TILING_MICRO) {
surface.flags = RADEON_SURF_CLR(surface.flags, MODE);
surface.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_1D, MODE);
diff --git a/src/evergreen_exa.c b/src/evergreen_exa.c
index 9781069..1077a2d 100644
--- a/src/evergreen_exa.c
+++ b/src/evergreen_exa.c
@@ -161,7 +161,7 @@ EVERGREENPrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
cb_conf.pmask |= 8; /* A */
cb_conf.rop = accel_state->rop;
if (accel_state->dst_obj.tiling_flags == 0) {
- cb_conf.array_mode = 1;
+ cb_conf.array_mode = 0;
cb_conf.non_disp_tiling = 1;
}
evergreen_set_render_target(pScrn, &cb_conf, accel_state->dst_obj.domain);
@@ -340,7 +340,7 @@ EVERGREENDoPrepareCopy(ScrnInfoPtr pScrn)
tex_res.last_level = 0;
tex_res.perf_modulation = 0;
if (accel_state->src_obj[0].tiling_flags == 0)
- tex_res.array_mode = 1;
+ tex_res.array_mode = 0;
evergreen_set_tex_resource(pScrn, &tex_res, accel_state->src_obj[0].domain);
tex_samp.id = 0;
@@ -383,7 +383,7 @@ EVERGREENDoPrepareCopy(ScrnInfoPtr pScrn)
cb_conf.pmask |= 8; /* A */
cb_conf.rop = accel_state->rop;
if (accel_state->dst_obj.tiling_flags == 0) {
- cb_conf.array_mode = 1;
+ cb_conf.array_mode = 0;
cb_conf.non_disp_tiling = 1;
}
evergreen_set_render_target(pScrn, &cb_conf, accel_state->dst_obj.domain);
@@ -999,7 +999,7 @@ static Bool EVERGREENTextureSetup(PicturePtr pPict, PixmapPtr pPix,
tex_res.last_level = 0;
tex_res.perf_modulation = 0;
if (accel_state->src_obj[unit].tiling_flags == 0)
- tex_res.array_mode = 1;
+ tex_res.array_mode = 0;
evergreen_set_tex_resource (pScrn, &tex_res, accel_state->src_obj[unit].domain);
tex_samp.id = unit;
@@ -1313,7 +1313,7 @@ static Bool EVERGREENPrepareComposite(int op, PicturePtr pSrcPicture,
cb_conf.rop = 3;
cb_conf.pmask = 0xf;
if (accel_state->dst_obj.tiling_flags == 0) {
- cb_conf.array_mode = 1;
+ cb_conf.array_mode = 0;
cb_conf.non_disp_tiling = 1;
}
#if X_BYTE_ORDER == X_BIG_ENDIAN
diff --git a/src/r600_exa.c b/src/r600_exa.c
index 8a53896..e1eb62f 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -278,7 +278,7 @@ R600PrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
cb_conf.pmask |= 8; /* A */
cb_conf.rop = accel_state->rop;
if (accel_state->dst_obj.tiling_flags == 0)
- cb_conf.array_mode = 1;
+ cb_conf.array_mode = 0;
r600_set_render_target(pScrn, accel_state->ib, &cb_conf, accel_state->dst_obj.domain);
r600_set_spi(pScrn, accel_state->ib, 0, 0);
@@ -501,7 +501,7 @@ R600DoPrepareCopy(ScrnInfoPtr pScrn)
cb_conf.pmask |= 8; /* A */
cb_conf.rop = accel_state->rop;
if (accel_state->dst_obj.tiling_flags == 0)
- cb_conf.array_mode = 1;
+ cb_conf.array_mode = 0;
r600_set_render_target(pScrn, accel_state->ib, &cb_conf, accel_state->dst_obj.domain);
r600_set_spi(pScrn, accel_state->ib, (1 - 1), 1);
@@ -1476,7 +1476,7 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
cb_conf.pmask = 0xf;
cb_conf.rop = 3;
if (accel_state->dst_obj.tiling_flags == 0)
- cb_conf.array_mode = 1;
+ cb_conf.array_mode = 0;
#if X_BYTE_ORDER == X_BIG_ENDIAN
switch (dst_obj.bpp) {
case 16:
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index b5f13a2..124ce80 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -1262,7 +1262,7 @@ static Bool radeon_setup_kernel_mem(ScreenPtr pScreen)
surface.nsamples = 1;
surface.flags = RADEON_SURF_SCANOUT;
surface.flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
- surface.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR, MODE);
+ surface.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR_ALIGNED, MODE);
if (tiling_flags & RADEON_TILING_MICRO) {
surface.flags = RADEON_SURF_CLR(surface.flags, MODE);
surface.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_1D, MODE);
commit c66ae235700f5efe64eb168327551b8f1d153c9c
Author: Michel Dänzer <michel.daenzer@amd.com>
Date: Mon Feb 13 10:43:58 2012 +0100
Handle new xorg_list API.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=45937
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
diff --git a/configure.ac b/configure.ac
index 29f129a..0083325 100644
--- a/configure.ac
+++ b/configure.ac
@@ -234,10 +234,18 @@ AC_CHECK_DECL(XSERVER_LIBPCIACCESS,
[#include "xorg-server.h"])
AC_CHECK_HEADERS([list.h],
- [], [],
+ [have_list_h="yes"], [have_list_h="no"],
[#include <X11/Xdefs.h>
#include "xorg-server.h"])
+if test "x$have_list_h" = xyes; then
+ AC_CHECK_DECL(xorg_list_init,
+ [AC_DEFINE(HAVE_XORG_LIST, 1, [Have xorg_list API])], [],
+ [#include <X11/Xdefs.h>
+ #include "xorg-server.h"
+ #include "list.h"])
+fi
+
CPPFLAGS="$SAVE_CPPFLAGS"
AM_CONDITIONAL(USE_EXA, test "x$USE_EXA" = xyes)
diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
index 835575f..cf905a1 100644
--- a/src/radeon_dri2.c
+++ b/src/radeon_dri2.c
@@ -40,6 +40,13 @@
#if HAVE_LIST_H
#include "list.h"
+#if !HAVE_XORG_LIST
+#define xorg_list list
+#define xorg_list_init list_init
+#define xorg_list_add list_add
+#define xorg_list_del list_del
+#define xorg_list_for_each_entry list_for_each_entry
+#endif
#endif
#ifdef RADEON_DRI2
@@ -515,11 +522,11 @@ typedef struct _DRI2FrameEvent {
Bool valid;
- struct list link;
+ struct xorg_list link;
} DRI2FrameEventRec, *DRI2FrameEventPtr;
typedef struct _DRI2ClientEvents {
- struct list reference_list;
+ struct xorg_list reference_list;
} DRI2ClientEventsRec, *DRI2ClientEventsPtr;
#if HAS_DEVPRIVATEKEYREC
@@ -538,7 +545,7 @@ DevPrivateKey DRI2ClientEventsPrivateKey = &DRI2ClientEventsPrivateKeyIndex;
dixLookupPrivate(&(pClient)->devPrivates, DRI2ClientEventsPrivateKey))
static int
-ListAddDRI2ClientEvents(ClientPtr client, struct list *entry)
+ListAddDRI2ClientEvents(ClientPtr client, struct xorg_list *entry)
{
DRI2ClientEventsPtr pClientPriv;
pClientPriv = GetDRI2ClientEvents(client);
@@ -547,12 +554,12 @@ ListAddDRI2ClientEvents(ClientPtr client, struct list *entry)
return BadAlloc;
}
- list_add(entry, &pClientPriv->reference_list);
+ xorg_list_add(entry, &pClientPriv->reference_list);
return 0;
}
static void
-ListDelDRI2ClientEvents(ClientPtr client, struct list *entry)
+ListDelDRI2ClientEvents(ClientPtr client, struct xorg_list *entry)
{
DRI2ClientEventsPtr pClientPriv;
pClientPriv = GetDRI2ClientEvents(client);
@@ -560,7 +567,7 @@ ListDelDRI2ClientEvents(ClientPtr client, struct list *entry)
if (!pClientPriv) {
return;
Reply to: