libdrm: Changes to 'debian-unstable'
ChangeLog | 151 ++
configure.ac | 28
debian/changelog | 8
debian/control | 4
debian/libdrm-intel1.symbols | 2
debian/rules | 47
debian/xsfbs/xsfbs.mk | 17
debian/xsfbs/xsfbs.sh | 4
libdrm/Makefile.am | 6
libdrm/intel/Makefile.am | 1
libdrm/intel/intel_atomic.h | 61 +
libdrm/intel/intel_bufmgr.c | 174 +-
libdrm/intel/intel_bufmgr.h | 124 +-
libdrm/intel/intel_bufmgr_fake.c | 2316 ++++++++++++++++++++-------------------
libdrm/intel/intel_bufmgr_gem.c | 2176 ++++++++++++++++++++----------------
libdrm/intel/intel_bufmgr_priv.h | 378 +++---
libdrm/intel/mm.c | 414 +++---
libdrm/intel/mm.h | 16
libdrm/radeon/radeon_bo_gem.c | 8
shared-core/i915_drm.h | 16
shared-core/radeon_drm.h | 11
tests/Makefile.am | 23
22 files changed, 3307 insertions(+), 2678 deletions(-)
New commits:
commit f1a374bbc4150272569ab95fba8c75fd07d1605b
Author: Julien Cristau <jcristau@debian.org>
Date: Thu Oct 29 02:30:40 2009 +0100
update libdrm-intel1 symbols and shlibs
diff --git a/debian/changelog b/debian/changelog
index eae197c..1189786 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,7 @@
libdrm (2.4.15-1) UNRELEASED; urgency=low
* New upstream release.
+ + update libdrm-intel1 symbols and shlibs
* Only build libdrm-intel on x86 (linux and kfreebsd).
-- Julien Cristau <jcristau@debian.org> Tue, 13 Oct 2009 20:49:10 +0200
diff --git a/debian/libdrm-intel1.symbols b/debian/libdrm-intel1.symbols
index 9910249..5bfb6fc 100644
--- a/debian/libdrm-intel1.symbols
+++ b/debian/libdrm-intel1.symbols
@@ -1,6 +1,7 @@
libdrm_intel.so.1 libdrm-intel1 #MINVER#
drm_intel_bo_alloc@Base 2.4.1
drm_intel_bo_alloc_for_render@Base 2.4.5
+ drm_intel_bo_alloc_tiled@Base 2.4.15
drm_intel_bo_busy@Base 2.4.13
drm_intel_bo_disable_reuse@Base 2.4.10
drm_intel_bo_emit_reloc@Base 2.4.1
@@ -14,6 +15,7 @@ libdrm_intel.so.1 libdrm-intel1 #MINVER#
drm_intel_bo_map@Base 2.4.1
drm_intel_bo_pin@Base 2.4.1
drm_intel_bo_reference@Base 2.4.1
+ drm_intel_bo_references@Base 2.4.15
drm_intel_bo_set_tiling@Base 2.4.1
drm_intel_bo_subdata@Base 2.4.1
drm_intel_bo_unmap@Base 2.4.1
diff --git a/debian/rules b/debian/rules
index 36ce2f1..0a66490 100755
--- a/debian/rules
+++ b/debian/rules
@@ -125,7 +125,7 @@ endif
dh_fixperms -s
dh_makeshlibs -plibdrm2 -V'libdrm2 (>= 2.4.3)' -- -c4
ifeq ($(INTEL), yes)
- dh_makeshlibs -plibdrm-intel1 -V'libdrm-intel1 (>= 2.4.13)' -- -c4
+ dh_makeshlibs -plibdrm-intel1 -V'libdrm-intel1 (>= 2.4.15)' -- -c4
endif
dh_installdeb -s
dh_shlibdeps -s
commit 45c6ad83a1e31560f37710eeae7c8ba839773f91
Author: Julien Cristau <jcristau@debian.org>
Date: Sat Oct 31 00:24:49 2009 +0100
Only build libdrm-intel on x86 (linux and kfreebsd)
diff --git a/debian/changelog b/debian/changelog
index 11379f4..eae197c 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,7 @@
libdrm (2.4.15-1) UNRELEASED; urgency=low
* New upstream release.
+ * Only build libdrm-intel on x86 (linux and kfreebsd).
-- Julien Cristau <jcristau@debian.org> Tue, 13 Oct 2009 20:49:10 +0200
diff --git a/debian/control b/debian/control
index adb6f36..cac77fb 100644
--- a/debian/control
+++ b/debian/control
@@ -50,7 +50,7 @@ Description: Userspace interface to kernel DRM services -- debugging symbols
Package: libdrm-intel1
Section: libs
-Architecture: any
+Architecture: amd64 i386 kfreebsd-amd64 kfreebsd-i386
Depends: ${shlibs:Depends}, ${misc:Depends}
Description: Userspace interface to intel-specific kernel DRM services -- runtime
This library implements the userspace interface to the intel-specific kernel
@@ -61,7 +61,7 @@ Description: Userspace interface to intel-specific kernel DRM services -- runtim
Package: libdrm-intel1-dbg
Section: debug
Priority: extra
-Architecture: any
+Architecture: amd64 i386 kfreebsd-amd64 kfreebsd-i386
Depends: libdrm-intel1 (= ${binary:Version}), ${misc:Depends}
Description: Userspace interface to intel-specific kernel DRM services -- debugging symbols
This library implements the userspace interface to the kernel DRM services.
diff --git a/debian/rules b/debian/rules
index c6252d6..36ce2f1 100755
--- a/debian/rules
+++ b/debian/rules
@@ -28,6 +28,19 @@ else
confflags += --disable-udev
endif
+# only build libdrm-intel on x86
+ifneq (,$(filter amd64 i386,$(DEB_HOST_ARCH_CPU)))
+ifneq (,$(filter linux kfreebsd,$(DEB_HOST_ARCH_OS)))
+ INTEL = yes
+endif
+endif
+
+ifeq ($(INTEL), yes)
+ confflags += --enable-intel
+else
+ confflags += --disable-intel
+endif
+
CFLAGS = -Wall -g
ifneq (,$(filter noopt,$(DEB_BUILD_OPTIONS)))
@@ -96,25 +109,29 @@ binary-indep: build install
# Build architecture-dependent files here.
binary-arch: build install
- dh_testdir
- dh_testroot
- dh_installchangelogs ChangeLog
- dh_installdocs
- dh_installexamples
+ dh_testdir -s
+ dh_testroot -s
+ dh_installchangelogs -s ChangeLog
+ dh_installdocs -s
+ dh_installexamples -s
dh_install -s --sourcedir=debian/tmp -X.la --fail-missing
- dh_link
+ dh_link -s
dh_strip -plibdrm2 --dbg-package=libdrm2-dbg
+ifeq ($(INTEL), yes)
dh_strip -plibdrm-intel1 --dbg-package=libdrm-intel1-dbg
- dh_strip
- dh_compress
- dh_fixperms
+endif
+ dh_strip -s --remaining-packages
+ dh_compress -s
+ dh_fixperms -s
dh_makeshlibs -plibdrm2 -V'libdrm2 (>= 2.4.3)' -- -c4
+ifeq ($(INTEL), yes)
dh_makeshlibs -plibdrm-intel1 -V'libdrm-intel1 (>= 2.4.13)' -- -c4
- dh_installdeb
- dh_shlibdeps
- dh_gencontrol
- dh_md5sums
- dh_builddeb
+endif
+ dh_installdeb -s
+ dh_shlibdeps -s
+ dh_gencontrol -s
+ dh_md5sums -s
+ dh_builddeb -s
binary: binary-indep binary-arch
.PHONY: build clean binary-indep binary-arch binary install
commit 3c594b7854e582df3dfef5f1bb113ae8725a6071
Author: Julien Cristau <jcristau@debian.org>
Date: Sat Oct 31 00:23:20 2009 +0100
Bump changelogs
diff --git a/ChangeLog b/ChangeLog
index a8c7b97..7f8c872 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,154 @@
+commit a107e5b12960f64722bff424502a4fc0ad33dc8f
+Author: Eric Anholt <eric@anholt.net>
+Date: Thu Oct 8 16:59:17 2009 -0700
+
+ Bump to 2.4.15 for release.
+
+commit 9764061ab1b02e4b7bde1494b121604c5c4d4df8
+Author: Eric Anholt <eric@anholt.net>
+Date: Thu Oct 8 15:39:27 2009 -0700
+
+ intel: Remove the asserts about the ignored alignment parameter.
+
+ I slipped it in with the alloc_tiled changes, since we were explicitly
+ throwing the parameter away. It caught some bogus released code, which
+ we've now fixed, so remove the asserts to keep old drivers working.
+
+commit 3a7dfcdfafdd6ac83a4d3e7b4c1c52fd901b93ae
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date: Tue Oct 6 14:34:06 2009 -0700
+
+ intel: Add a bo_alloc function for tiled BOs.
+
+ This simplifies driver code in handling object allocation, and also gives us
+ an opportunity to possibly cache tiled buffers if it turns out to be a win.
+
+ [anholt: This is chopped out of the execbuf2 patch, as it seems to be useful
+ separately and cleans up the execbuf2 changes to be more obvious]
+
+commit 02c775fc750b48ae25b6a4af51afbfe090ebada4
+Author: Eric Anholt <eric@anholt.net>
+Date: Tue Oct 6 15:25:21 2009 -0700
+
+ intel: Fix up some stale doxygen comments.
+
+commit d70d60529f77ec73322be7b887fd6a3faf133bce
+Author: Eric Anholt <eric@anholt.net>
+Date: Tue Oct 6 12:40:42 2009 -0700
+
+ intel: Reformat to the kernel coding style. Welcome to the 8-space future.
+
+ This is done with:
+ Lindent *.[ch]
+ perl -pi -e 's|drm_intel_bo \* |drm_intel_bo *|g' *.[ch]
+ perl -pi -e 's|drm_intel_bufmgr \* |drm_intel_bufmgr *|g' *.[ch]
+ perl -pi -e 's|drm_intel_bo_gem \* |drm_intel_bo_gem *|g' *.[ch]
+ perl -pi -e 's|drm_intel_bufmgr_gem \* |drm_intel_bufmgr_gem *|g' *.[ch]
+ perl -pi -e 's|_fake \* |_fake *|g' *.[ch]
+ hand-editing to whack indented comments into line and other touchups.
+
+commit 3c9bd068e0aa8069f71e8193b82b231d6513ce35
+Author: Eric Anholt <eric@anholt.net>
+Date: Mon Oct 5 16:35:32 2009 -0700
+
+ intel: Don't allocate more relocation entries than the BO could support.
+
+ This saves 32k of relocation entry storage for many 965 state buffers. No
+ noticeable impact on performance for cairo-gl firefox.
+
+commit ac34f599eabcfc414d4d3300063988d4749813f4
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Sat Oct 3 23:17:57 2009 +0100
+
+ tests: Disable intel-specific tests with --disable-intel
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit ab3300c5816ee26e2d74ac99e2d84c3dfd7cdf82
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Sat Oct 3 22:56:04 2009 +0100
+
+ intel: Add a configure option to *disable* building libdrm-intel
+
+ In conjunction with the atomic operation patch, it may be more
+ convenient for some people to disable building libdrm-intel and its
+ dependencies upon the atomic intrinsics then it is for them to use a
+ supported compiler.
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 61bddf8504461fad3e45fbf0d32956a76e0dd343
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Sun Sep 20 03:11:59 2009 +0100
+
+ intel: report errno
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 11f0e450dd7d711eb69aa9c27ed4aa72d913d697
+Author: Michel Dänzer <daenzer@vmware.com>
+Date: Sat Oct 3 17:37:07 2009 +0200
+
+ libdrm_radeon: Update RADEON_TILING_* flags to what's in current kernels.
+
+commit a5fb264257651d50afe84be7e20f91df41242aa8
+Author: Nicolai Hähnle <nhaehnle@gmail.com>
+Date: Sat Oct 3 13:43:42 2009 +0200
+
+ libdrm_radeon: Zero-initialize structures to silence valgrind warnings
+
+ Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
+
+commit 04495eeec2f053be17a10cc82e646a1e23ed3830
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri Oct 2 04:39:22 2009 +0100
+
+ intel: Use atomic refcounters
+
+ As the target architecture for Intel GPUs is the x86, we can presume to
+ have reasonable compiler support for Intel atomic intrinsics, i.e. gcc,
+ and so use those in preference to pulling in a complicated mess of
+ fragile assembly.
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+ [anholt: hand-resolved against my previous commit. This brings cairo-gl
+ firefox-talos-gfx time from 65 seconds back down to 62 seconds.]
+ Signed-off-by: Eric Anholt <eric@anholt.net>
+
+commit 0fb215ae3199b5be0c9a9474e5941f8d8998c11a
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri Oct 2 04:31:34 2009 +0100
+
+ intel: Mark cached bo as purgeable
+
+ Set the DONTNEED flag on cached buffers so that the kernel is free to
+ discard those when under memory pressure.
+
+ [anholt: This takes firefox-talos-gfx time from ~62 seconds to ~65 seconds
+ on my GM965, but it seems like a hit worth taking for the improved
+ functionality from saving memory]
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+ Signed-off-by: Eric Anholt <eric@anholt.net>
+
+commit 12d9b7cc8550c1999e5c39a38b1b14e654f49065
+Author: Eric Anholt <eric@anholt.net>
+Date: Fri Oct 2 11:11:31 2009 -0700
+
+ intel: Don't free the reloc list when putting a freed BO in the cache.
+
+ This takes firefox-talos-gfx from 74 seconds to 70 seconds on my GM965.
+
+commit 769b10578083aa7bbee0052246d8ea6000435ae8
+Author: Eric Anholt <eric@anholt.net>
+Date: Thu Oct 1 19:09:26 2009 -0700
+
+ intel: Add a new function to check if a BO's reloc tree references some BO.
+
+ There are a bunch of places in GL where if we can't do this we have to
+ flush the batchbuffer, and the cost of lookups here is outweighed by flush
+ savings.
+
commit ac71f0849928f4b2fbb69c01304ac6f9df8916a1
Author: Eric Anholt <eric@anholt.net>
Date: Mon Sep 21 15:29:58 2009 -0700
diff --git a/debian/changelog b/debian/changelog
index 6073662..11379f4 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,9 @@
+libdrm (2.4.15-1) UNRELEASED; urgency=low
+
+ * New upstream release.
+
+ -- Julien Cristau <jcristau@debian.org> Tue, 13 Oct 2009 20:49:10 +0200
+
libdrm (2.4.14-1) unstable; urgency=low
* Parse space-separated DEB_BUILD_OPTIONS, and handle parallel=N.
commit a107e5b12960f64722bff424502a4fc0ad33dc8f
Author: Eric Anholt <eric@anholt.net>
Date: Thu Oct 8 16:59:17 2009 -0700
Bump to 2.4.15 for release.
diff --git a/configure.ac b/configure.ac
index 9832caf..870c056 100644
--- a/configure.ac
+++ b/configure.ac
@@ -19,7 +19,7 @@
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
AC_PREREQ(2.60)
-AC_INIT([libdrm], 2.4.14, [dri-devel@lists.sourceforge.net], libdrm)
+AC_INIT([libdrm], 2.4.15, [dri-devel@lists.sourceforge.net], libdrm)
AC_USE_SYSTEM_EXTENSIONS
AC_CONFIG_SRCDIR([Makefile.am])
AM_INIT_AUTOMAKE([dist-bzip2])
commit 9764061ab1b02e4b7bde1494b121604c5c4d4df8
Author: Eric Anholt <eric@anholt.net>
Date: Thu Oct 8 15:39:27 2009 -0700
intel: Remove the asserts about the ignored alignment parameter.
I slipped it in with the alloc_tiled changes, since we were explicitly
throwing the parameter away. It caught some bogus released code, which
we've now fixed, so remove the asserts to keep old drivers working.
diff --git a/libdrm/intel/intel_bufmgr_gem.c b/libdrm/intel/intel_bufmgr_gem.c
index 3e46f53..b8be96d 100644
--- a/libdrm/intel/intel_bufmgr_gem.c
+++ b/libdrm/intel/intel_bufmgr_gem.c
@@ -545,7 +545,6 @@ drm_intel_gem_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
unsigned long size,
unsigned int alignment)
{
- assert(alignment <= 4096);
return drm_intel_gem_bo_alloc_internal(bufmgr, name, size,
BO_ALLOC_FOR_RENDER);
}
@@ -556,7 +555,6 @@ drm_intel_gem_bo_alloc(drm_intel_bufmgr *bufmgr,
unsigned long size,
unsigned int alignment)
{
- assert(alignment <= 4096);
return drm_intel_gem_bo_alloc_internal(bufmgr, name, size, 0);
}
commit 3a7dfcdfafdd6ac83a4d3e7b4c1c52fd901b93ae
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Tue Oct 6 14:34:06 2009 -0700
intel: Add a bo_alloc function for tiled BOs.
This simplifies driver code in handling object allocation, and also gives us
an opportunity to possibly cache tiled buffers if it turns out to be a win.
[anholt: This is chopped out of the execbuf2 patch, as it seems to be useful
separately and cleans up the execbuf2 changes to be more obvious]
diff --git a/libdrm/intel/intel_bufmgr.c b/libdrm/intel/intel_bufmgr.c
index fd5a2e7..2469cd8 100644
--- a/libdrm/intel/intel_bufmgr.c
+++ b/libdrm/intel/intel_bufmgr.c
@@ -58,6 +58,15 @@ drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
return bufmgr->bo_alloc_for_render(bufmgr, name, size, alignment);
}
+drm_intel_bo *
+drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
+ int x, int y, int cpp, uint32_t *tiling_mode,
+ unsigned long *pitch, unsigned long flags)
+{
+ return bufmgr->bo_alloc_tiled(bufmgr, name, x, y, cpp,
+ tiling_mode, pitch, flags);
+}
+
void drm_intel_bo_reference(drm_intel_bo *bo)
{
bo->bufmgr->bo_reference(bo);
diff --git a/libdrm/intel/intel_bufmgr.h b/libdrm/intel/intel_bufmgr.h
index 0dbe880..3801ff3 100644
--- a/libdrm/intel/intel_bufmgr.h
+++ b/libdrm/intel/intel_bufmgr.h
@@ -77,12 +77,20 @@ struct _drm_intel_bo {
int handle;
};
+#define BO_ALLOC_FOR_RENDER (1<<0)
+
drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
unsigned long size, unsigned int alignment);
drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
const char *name,
unsigned long size,
unsigned int alignment);
+drm_intel_bo *drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr,
+ const char *name,
+ int x, int y, int cpp,
+ uint32_t *tiling_mode,
+ unsigned long *pitch,
+ unsigned long flags);
void drm_intel_bo_reference(drm_intel_bo *bo);
void drm_intel_bo_unreference(drm_intel_bo *bo);
int drm_intel_bo_map(drm_intel_bo *bo, int write_enable);
diff --git a/libdrm/intel/intel_bufmgr_fake.c b/libdrm/intel/intel_bufmgr_fake.c
index f325482..54b3cb8 100644
--- a/libdrm/intel/intel_bufmgr_fake.c
+++ b/libdrm/intel/intel_bufmgr_fake.c
@@ -51,8 +51,6 @@
#include "mm.h"
#include "libdrm_lists.h"
-#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
-
#define DBG(...) do { \
if (bufmgr_fake->bufmgr.debug) \
drmMsg(__VA_ARGS__); \
@@ -838,6 +836,32 @@ drm_intel_fake_bo_alloc(drm_intel_bufmgr *bufmgr,
return &bo_fake->bo;
}
+static drm_intel_bo *
+drm_intel_fake_bo_alloc_tiled(drm_intel_bufmgr * bufmgr,
+ const char *name,
+ int x, int y, int cpp,
+ uint32_t *tiling_mode,
+ unsigned long *pitch,
+ unsigned long flags)
+{
+ unsigned long stride, aligned_y;
+
+ /* No runtime tiling support for fake. */
+ *tiling_mode = I915_TILING_NONE;
+
+ /* Align it for being a render target. Shouldn't need anything else. */
+ stride = x * cpp;
+ stride = ROUND_UP_TO(stride, 64);
+
+ /* 965 subspan loading alignment */
+ aligned_y = ALIGN(y, 2);
+
+ *pitch = stride;
+
+ return drm_intel_fake_bo_alloc(bufmgr, name, stride * aligned_y,
+ 4096);
+}
+
drm_intel_bo *
drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr,
const char *name,
@@ -1565,6 +1589,7 @@ drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd,
/* Hook in methods */
bufmgr_fake->bufmgr.bo_alloc = drm_intel_fake_bo_alloc;
bufmgr_fake->bufmgr.bo_alloc_for_render = drm_intel_fake_bo_alloc;
+ bufmgr_fake->bufmgr.bo_alloc_tiled = drm_intel_fake_bo_alloc_tiled;
bufmgr_fake->bufmgr.bo_reference = drm_intel_fake_bo_reference;
bufmgr_fake->bufmgr.bo_unreference = drm_intel_fake_bo_unreference;
bufmgr_fake->bufmgr.bo_map = drm_intel_fake_bo_map;
diff --git a/libdrm/intel/intel_bufmgr_gem.c b/libdrm/intel/intel_bufmgr_gem.c
index aa55f2d..3e46f53 100644
--- a/libdrm/intel/intel_bufmgr_gem.c
+++ b/libdrm/intel/intel_bufmgr_gem.c
@@ -193,6 +193,66 @@ static void drm_intel_gem_bo_unreference(drm_intel_bo *bo);
static void drm_intel_gem_bo_free(drm_intel_bo *bo);
+static unsigned long
+drm_intel_gem_bo_tile_size(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long size,
+ uint32_t *tiling_mode)
+{
+ unsigned long min_size, max_size;
+ unsigned long i;
+
+ if (*tiling_mode == I915_TILING_NONE)
+ return size;
+
+ /* 965+ just need multiples of page size for tiling */
+ if (IS_I965G(bufmgr_gem))
+ return ROUND_UP_TO(size, 4096);
+
+ /* Older chips need powers of two, of at least 512k or 1M */
+ if (IS_I9XX(bufmgr_gem)) {
+ min_size = 1024*1024;
+ max_size = 128*1024*1024;
+ } else {
+ min_size = 512*1024;
+ max_size = 64*1024*1024;
+ }
+
+ if (size > max_size) {
+ *tiling_mode = I915_TILING_NONE;
+ return size;
+ }
+
+ for (i = min_size; i < size; i <<= 1)
+ ;
+
+ return i;
+}
+
+/*
+ * Round a given pitch up to the minimum required for X tiling on a
+ * given chip. We use 512 as the minimum to allow for a later tiling
+ * change.
+ */
+static unsigned long
+drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem,
+ unsigned long pitch, uint32_t tiling_mode)
+{
+ unsigned long tile_width = 512;
+ unsigned long i;
+
+ if (tiling_mode == I915_TILING_NONE)
+ return ROUND_UP_TO(pitch, tile_width);
+
+ /* 965 is flexible */
+ if (IS_I965G(bufmgr_gem))
+ return ROUND_UP_TO(pitch, tile_width);
+
+ /* Pre-965 needs power of two tile width */
+ for (i = tile_width; i < pitch; i <<= 1)
+ ;
+
+ return i;
+}
+
static struct drm_intel_gem_bo_bucket *
drm_intel_gem_bo_bucket_for_size(drm_intel_bufmgr_gem *bufmgr_gem,
unsigned long size)
@@ -372,8 +432,7 @@ static drm_intel_bo *
drm_intel_gem_bo_alloc_internal(drm_intel_bufmgr *bufmgr,
const char *name,
unsigned long size,
- unsigned int alignment,
- int for_render)
+ unsigned long flags)
{
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr;
drm_intel_bo_gem *bo_gem;
@@ -382,6 +441,10 @@ drm_intel_gem_bo_alloc_internal(drm_intel_bufmgr *bufmgr,
struct drm_intel_gem_bo_bucket *bucket;
int alloc_from_cache;
unsigned long bo_size;
+ int for_render = 0;
+
+ if (flags & BO_ALLOC_FOR_RENDER)
+ for_render = 1;
/* Round the allocated size up to a power of two number of pages. */
bucket = drm_intel_gem_bo_bucket_for_size(bufmgr_gem, size);
@@ -482,8 +545,9 @@ drm_intel_gem_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
unsigned long size,
unsigned int alignment)
{
- return drm_intel_gem_bo_alloc_internal(bufmgr, name, size, alignment,
- 1);
+ assert(alignment <= 4096);
+ return drm_intel_gem_bo_alloc_internal(bufmgr, name, size,
+ BO_ALLOC_FOR_RENDER);
}
static drm_intel_bo *
@@ -492,8 +556,45 @@ drm_intel_gem_bo_alloc(drm_intel_bufmgr *bufmgr,
unsigned long size,
unsigned int alignment)
{
- return drm_intel_gem_bo_alloc_internal(bufmgr, name, size, alignment,
- 0);
+ assert(alignment <= 4096);
+ return drm_intel_gem_bo_alloc_internal(bufmgr, name, size, 0);
+}
+
+static drm_intel_bo *
+drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
+ int x, int y, int cpp, uint32_t *tiling_mode,
+ unsigned long *pitch, unsigned long flags)
+{
+ drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr;
+ drm_intel_bo *bo;
+ unsigned long size, stride, aligned_y = y;
+ int ret;
+
+ if (*tiling_mode == I915_TILING_NONE)
+ aligned_y = ALIGN(y, 2);
+ else if (*tiling_mode == I915_TILING_X)
+ aligned_y = ALIGN(y, 8);
+ else if (*tiling_mode == I915_TILING_Y)
+ aligned_y = ALIGN(y, 32);
+
+ stride = x * cpp;
+ stride = drm_intel_gem_bo_tile_pitch(bufmgr_gem, stride, *tiling_mode);
+ size = stride * aligned_y;
+ size = drm_intel_gem_bo_tile_size(bufmgr_gem, size, tiling_mode);
+
+ bo = drm_intel_gem_bo_alloc_internal(bufmgr, name, size, flags);
+ if (!bo)
+ return NULL;
+
+ ret = drm_intel_gem_bo_set_tiling(bo, tiling_mode, stride);
+ if (ret != 0) {
+ drm_intel_gem_bo_unreference(bo);
+ return NULL;
+ }
+
+ *pitch = stride;
+
+ return bo;
}
/**
@@ -1565,6 +1666,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
bufmgr_gem->bufmgr.bo_alloc = drm_intel_gem_bo_alloc;
bufmgr_gem->bufmgr.bo_alloc_for_render =
drm_intel_gem_bo_alloc_for_render;
+ bufmgr_gem->bufmgr.bo_alloc_tiled = drm_intel_gem_bo_alloc_tiled;
bufmgr_gem->bufmgr.bo_reference = drm_intel_gem_bo_reference;
bufmgr_gem->bufmgr.bo_unreference = drm_intel_gem_bo_unreference;
bufmgr_gem->bufmgr.bo_map = drm_intel_gem_bo_map;
diff --git a/libdrm/intel/intel_bufmgr_priv.h b/libdrm/intel/intel_bufmgr_priv.h
index 3b19eca..475c402 100644
--- a/libdrm/intel/intel_bufmgr_priv.h
+++ b/libdrm/intel/intel_bufmgr_priv.h
@@ -61,6 +61,28 @@ struct _drm_intel_bufmgr {
unsigned long size,
unsigned int alignment);
+ /**
+ * Allocate a tiled buffer object.
+ *
+ * Alignment for tiled objects is set automatically; the 'flags'
+ * argument provides a hint about how the object will be used initially.
+ *
+ * Valid tiling formats are:
+ * I915_TILING_NONE
+ * I915_TILING_X
+ * I915_TILING_Y
+ *
+ * Note the tiling format may be rejected; callers should check the
+ * 'tiling_mode' field on return, as well as the pitch value, which
+ * may have been rounded up to accommodate for tiling restrictions.
+ */
+ drm_intel_bo *(*bo_alloc_tiled) (drm_intel_bufmgr *bufmgr,
+ const char *name,
+ int x, int y, int cpp,
+ uint32_t *tiling_mode,
+ unsigned long *pitch,
+ unsigned long flags);
+
/** Takes a reference on a buffer object */
void (*bo_reference) (drm_intel_bo *bo);
@@ -225,4 +247,8 @@ struct _drm_intel_bufmgr {
int debug;
};
+#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
+#define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
+#define ROUND_UP_TO_MB(x) ROUND_UP_TO((x), 1024*1024)
+
#endif /* INTEL_BUFMGR_PRIV_H */
commit 02c775fc750b48ae25b6a4af51afbfe090ebada4
Author: Eric Anholt <eric@anholt.net>
Date: Tue Oct 6 15:25:21 2009 -0700
intel: Fix up some stale doxygen comments.
diff --git a/libdrm/intel/intel_bufmgr.h b/libdrm/intel/intel_bufmgr.h
index 9f07a94..0dbe880 100644
--- a/libdrm/intel/intel_bufmgr.h
+++ b/libdrm/intel/intel_bufmgr.h
@@ -56,8 +56,9 @@ struct _drm_intel_bo {
unsigned long align;
/**
- * Card virtual address (offset from the beginning of the aperture)
- * for the object. Only valid while validated.
+ * Last seen card virtual address (offset from the beginning of the
+ * aperture) for the object. This should be used to fill relocation
+ * entries when calling drm_intel_bo_emit_reloc()
*/
unsigned long offset;
diff --git a/libdrm/intel/intel_bufmgr_priv.h b/libdrm/intel/intel_bufmgr_priv.h
index b7cae6f..3b19eca 100644
--- a/libdrm/intel/intel_bufmgr_priv.h
+++ b/libdrm/intel/intel_bufmgr_priv.h
@@ -45,8 +45,7 @@ struct _drm_intel_bufmgr {
*
* Buffer objects are not necessarily initially mapped into CPU virtual
* address space or graphics device aperture. They must be mapped
- * using bo_map() to be used by the CPU, and validated for use using
- * bo_validate() to be used from the graphics device.
+ * using bo_map() or drm_intel_gem_bo_map_gtt() to be used by the CPU.
*/
drm_intel_bo *(*bo_alloc) (drm_intel_bufmgr *bufmgr, const char *name,
unsigned long size, unsigned int alignment);
@@ -67,7 +66,7 @@ struct _drm_intel_bufmgr {
/**
* Releases a reference on a buffer object, freeing the data if
- * rerefences remain.
+ * no references remain.
*/
void (*bo_unreference) (drm_intel_bo *bo);
commit d70d60529f77ec73322be7b887fd6a3faf133bce
Author: Eric Anholt <eric@anholt.net>
Date: Tue Oct 6 12:40:42 2009 -0700
intel: Reformat to the kernel coding style. Welcome to the 8-space future.
This is done with:
Lindent *.[ch]
perl -pi -e 's|drm_intel_bo \* |drm_intel_bo *|g' *.[ch]
perl -pi -e 's|drm_intel_bufmgr \* |drm_intel_bufmgr *|g' *.[ch]
perl -pi -e 's|drm_intel_bo_gem \* |drm_intel_bo_gem *|g' *.[ch]
perl -pi -e 's|drm_intel_bufmgr_gem \* |drm_intel_bufmgr_gem *|g' *.[ch]
perl -pi -e 's|_fake \* |_fake *|g' *.[ch]
hand-editing to whack indented comments into line and other touchups.
diff --git a/libdrm/intel/intel_atomic.h b/libdrm/intel/intel_atomic.h
index 562394a..9eb50a1 100644
--- a/libdrm/intel/intel_atomic.h
+++ b/libdrm/intel/intel_atomic.h
@@ -42,7 +42,9 @@
#define HAS_ATOMIC_OPS 1
-typedef struct { int atomic; } atomic_t;
+typedef struct {
+ int atomic;
+} atomic_t;
# define atomic_read(x) ((x)->atomic)
# define atomic_set(x, val) ((x)->atomic = (val))
diff --git a/libdrm/intel/intel_bufmgr.c b/libdrm/intel/intel_bufmgr.c
index 20e59b8..fd5a2e7 100644
--- a/libdrm/intel/intel_bufmgr.c
+++ b/libdrm/intel/intel_bufmgr.c
@@ -44,124 +44,114 @@
* Convenience functions for buffer management methods.
*/
-drm_intel_bo *
-drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
- unsigned long size, unsigned int alignment)
+drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
+ unsigned long size, unsigned int alignment)
{
- return bufmgr->bo_alloc(bufmgr, name, size, alignment);
+ return bufmgr->bo_alloc(bufmgr, name, size, alignment);
}
-drm_intel_bo *
-drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, const char *name,
- unsigned long size, unsigned int alignment)
+drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
+ const char *name,
+ unsigned long size,
+ unsigned int alignment)
{
- return bufmgr->bo_alloc_for_render(bufmgr, name, size, alignment);
+ return bufmgr->bo_alloc_for_render(bufmgr, name, size, alignment);
}
-void
-drm_intel_bo_reference(drm_intel_bo *bo)
+void drm_intel_bo_reference(drm_intel_bo *bo)
{
- bo->bufmgr->bo_reference(bo);
+ bo->bufmgr->bo_reference(bo);
}
-void
-drm_intel_bo_unreference(drm_intel_bo *bo)
+void drm_intel_bo_unreference(drm_intel_bo *bo)
{
- if (bo == NULL)
- return;
+ if (bo == NULL)
+ return;
- bo->bufmgr->bo_unreference(bo);
+ bo->bufmgr->bo_unreference(bo);
}
-int
-drm_intel_bo_map(drm_intel_bo *buf, int write_enable)
+int drm_intel_bo_map(drm_intel_bo *buf, int write_enable)
{
- return buf->bufmgr->bo_map(buf, write_enable);
+ return buf->bufmgr->bo_map(buf, write_enable);
}
-int
-drm_intel_bo_unmap(drm_intel_bo *buf)
+int drm_intel_bo_unmap(drm_intel_bo *buf)
{
- return buf->bufmgr->bo_unmap(buf);
+ return buf->bufmgr->bo_unmap(buf);
}
int
drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
unsigned long size, const void *data)
{
- int ret;
+ int ret;
- if (bo->bufmgr->bo_subdata)
- return bo->bufmgr->bo_subdata(bo, offset, size, data);
- if (size == 0 || data == NULL)
- return 0;
+ if (bo->bufmgr->bo_subdata)
+ return bo->bufmgr->bo_subdata(bo, offset, size, data);
+ if (size == 0 || data == NULL)
+ return 0;
- ret = drm_intel_bo_map(bo, 1);
- if (ret)
- return ret;
- memcpy((unsigned char *)bo->virtual + offset, data, size);
- drm_intel_bo_unmap(bo);
- return 0;
+ ret = drm_intel_bo_map(bo, 1);
+ if (ret)
+ return ret;
+ memcpy((unsigned char *)bo->virtual + offset, data, size);
+ drm_intel_bo_unmap(bo);
+ return 0;
}
int
drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
unsigned long size, void *data)
{
- int ret;
- if (bo->bufmgr->bo_subdata)
- return bo->bufmgr->bo_get_subdata(bo, offset, size, data);
+ int ret;
+ if (bo->bufmgr->bo_subdata)
+ return bo->bufmgr->bo_get_subdata(bo, offset, size, data);
- if (size == 0 || data == NULL)
- return 0;
+ if (size == 0 || data == NULL)
+ return 0;
- ret = drm_intel_bo_map(bo, 0);
- if (ret)
- return ret;
- memcpy(data, (unsigned char *)bo->virtual + offset, size);
- drm_intel_bo_unmap(bo);
- return 0;
+ ret = drm_intel_bo_map(bo, 0);
+ if (ret)
+ return ret;
+ memcpy(data, (unsigned char *)bo->virtual + offset, size);
+ drm_intel_bo_unmap(bo);
+ return 0;
}
-void
-drm_intel_bo_wait_rendering(drm_intel_bo *bo)
+void drm_intel_bo_wait_rendering(drm_intel_bo *bo)
{
- bo->bufmgr->bo_wait_rendering(bo);
+ bo->bufmgr->bo_wait_rendering(bo);
}
-void
-drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr)
+void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr)
{
- bufmgr->destroy(bufmgr);
+ bufmgr->destroy(bufmgr);
}
int
drm_intel_bo_exec(drm_intel_bo *bo, int used,
- drm_clip_rect_t *cliprects, int num_cliprects,
- int DR4)
+ drm_clip_rect_t * cliprects, int num_cliprects, int DR4)
{
- return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4);
+ return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4);
}
-void
-drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug)
+void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug)
{
- bufmgr->debug = enable_debug;
+ bufmgr->debug = enable_debug;
}
-int
-drm_intel_bufmgr_check_aperture_space(drm_intel_bo **bo_array, int count)
+int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count)
{
return bo_array[0]->bufmgr->check_aperture_space(bo_array, count);
}
-int
-drm_intel_bo_flink(drm_intel_bo *bo, uint32_t *name)
+int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name)
{
- if (bo->bufmgr->bo_flink)
- return bo->bufmgr->bo_flink(bo, name);
+ if (bo->bufmgr->bo_flink)
+ return bo->bufmgr->bo_flink(bo, name);
- return -ENODEV;
+ return -ENODEV;
}
int
@@ -174,43 +164,41 @@ drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
read_domains, write_domain);
}
-int
-drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment)
+int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment)
{
- if (bo->bufmgr->bo_pin)
- return bo->bufmgr->bo_pin(bo, alignment);
+ if (bo->bufmgr->bo_pin)
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