xserver-xorg-video-radeonhd: Changes to 'debian-unstable'
ChangeLog | 1400 ++++++++++++++++++
Makefile.am | 2
README | 14
configure.ac | 3
debian/changelog | 6
man/radeonhd.man | 124 -
src/Makefile.am | 9
src/r5xx_accel.c | 9
src/r5xx_accel.h | 2
src/r5xx_exa.c | 12
src/r5xx_xaa.c | 2
src/r600_exa.c | 2150 ++++++++++++++++++++++++++++
src/r600_reg.h | 140 +
src/r600_reg_auto_r6xx.h | 3087 +++++++++++++++++++++++++++++++++++++++++
src/r600_reg_r6xx.h | 504 ++++++
src/r600_reg_r7xx.h | 149 +
src/r600_shader.c | 1848 ++++++++++++++++++++++++
src/r600_shader.h | 359 ++++
src/r600_state.h | 293 +++
src/r600_textured_videofuncs.c | 531 +++++++
src/r6xx_accel.c | 1233 ++++++++++++++++
src/r6xx_accel.h | 89 +
src/radeon_exa_render.c | 2
src/rhd.h | 49
src/rhd_atombios.c | 4
src/rhd_atombios.h | 2
src/rhd_atomcrtc.c | 15
src/rhd_atomout.c | 152 +-
src/rhd_atomout.h | 2
src/rhd_atompll.c | 2
src/rhd_atomwrapper.c | 2
src/rhd_atomwrapper.h | 2
src/rhd_audio.c | 4
src/rhd_audio.h | 2
src/rhd_biosscratch.c | 2
src/rhd_biosscratch.h | 2
src/rhd_card.h | 2
src/rhd_connector.c | 2
src/rhd_connector.h | 2
src/rhd_crtc.c | 47
src/rhd_crtc.h | 4
src/rhd_cs.c | 27
src/rhd_cs.h | 2
src/rhd_cursor.c | 10
src/rhd_cursor.h | 2
src/rhd_dac.c | 2
src/rhd_ddia.c | 2
src/rhd_dig.c | 208 +-
src/rhd_dri.c | 171 +-
src/rhd_dri.h | 2
src/rhd_driver.c | 215 +-
src/rhd_edid.c | 2
src/rhd_hdmi.c | 2
src/rhd_hdmi.h | 2
src/rhd_helper.c | 32
src/rhd_i2c.c | 16
src/rhd_i2c.h | 2
src/rhd_id.c | 68
src/rhd_lut.c | 77 -
src/rhd_lut.h | 2
src/rhd_lvtma.c | 75
src/rhd_mc.c | 948 +++++-------
src/rhd_mc.h | 16
src/rhd_modes.c | 2
src/rhd_modes.h | 2
src/rhd_monitor.c | 2
src/rhd_monitor.h | 2
src/rhd_output.c | 58
src/rhd_output.h | 6
src/rhd_pll.c | 2
src/rhd_pll.h | 2
src/rhd_randr.c | 293 ++-
src/rhd_randr.h | 2
src/rhd_regs.h | 6
src/rhd_shadow.c | 2
src/rhd_shadow.h | 2
src/rhd_tmds.c | 57
src/rhd_vga.c | 133 +
src/rhd_vga.h | 21
src/rhd_video.c | 223 ++
src/rhd_video.h | 12
utils/conntest/rhd_conntest.c | 2
utils/conntest/rhd_dump.c | 38
83 files changed, 13675 insertions(+), 1340 deletions(-)
New commits:
commit f6fcadb86a6664e4288462025943b308cbcb9061
Author: Brice Goglin <bgoglin@debian.org>
Date: Fri Apr 10 08:09:19 2009 +0200
Prepare changelog for upload
diff --git a/debian/changelog b/debian/changelog
index 8501e9c..540e5a9 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,8 +1,8 @@
-xserver-xorg-video-radeonhd (1.2.5-1) UNRELEASED; urgency=low
+xserver-xorg-video-radeonhd (1.2.5-1) unstable; urgency=low
* New upstream release.
- -- Brice Goglin <bgoglin@debian.org> Fri, 10 Apr 2009 08:07:39 +0200
+ -- Brice Goglin <bgoglin@debian.org> Fri, 10 Apr 2009 08:09:08 +0200
xserver-xorg-video-radeonhd (1.2.4-3) unstable; urgency=low
commit 177fc11b5f05c3fcb7a8d3cc98a2a6537825efdc
Author: Brice Goglin <bgoglin@debian.org>
Date: Fri Apr 10 08:09:04 2009 +0200
New upstream release
diff --git a/ChangeLog b/ChangeLog
index ba39083..7e64580 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,1393 @@
+commit cb54f48b212d5ae54e13bbdf24575b6163798c0d
+Author: Matthias Hopf <mhopf@suse.de>
+Date: Thu Apr 9 15:11:37 2009 +0200
+
+ Bump to 1.2.5. Updated README.
+
+commit 9d2a508892f16572127d192497bcf505556538b8
+Author: Yang Zhao <yang@yangman.ca>
+Date: Thu Apr 9 15:01:05 2009 +0200
+
+ Fix resume from suspend for r6xx/r7xx
+
+ Move DRM calls to DRM_RADEON_CP_RESUME and RADEON_SETPARAM_VBLANK_CRTC
+ to after doing GART backup. Also move call to DRIUnlock() to end of
+ RHDEnterVT() from RHDDRIEnterVT().
+
+commit 1137e0963e322dcb41816bdc76c57d3e3d407166
+Author: Matthias Hopf <mhopf@suse.de>
+Date: Thu Apr 9 11:42:35 2009 +0200
+
+ RHDDRIGetIntGARTLocation is called too often to be logged. Nuked RHDFUNC there.
+
+commit 76d6973a5c18b5aff7e7027a2f87d3616179e2e9
+Author: Matthias Hopf <mhopf@suse.de>
+Date: Wed Apr 8 17:01:49 2009 +0200
+
+ man: R6xx and R7xx 2D possible now.
+
+commit 0065697647401fd4b0df13df94bd9ebedcac96dc
+Author: Yang Zhao <yang@yangman.ca>
+Date: Wed Mar 25 19:26:02 2009 -0700
+
+ LUT: reduce number of writes to DC_LUT_RW_INDEX
+
+ The value of DC_LUT_RW_INDEX is increased everytime DC_LUT_30_COLOR is
+ accessed. It is pointless to set this explicitly for each row of the
+ input colour table.
+
+ Signed-off-by: Yang Zhao <yang@yangman.ca>
+
+commit 6d7f2486ea5f7794dee0c8d8d2655ddad378eff5
+Author: Matthias Hopf <mhopf@suse.de>
+Date: Fri Apr 3 11:54:14 2009 +0200
+
+ Use () in macro arguments of new RHDRegMask.
+
+commit d6c3727751a2de2c333e654aea1bd9b1d9c2ef44
+Author: Yang Zhao <yang@yangman.ca>
+Date: Fri Mar 27 21:21:25 2009 -0700
+
+ CS: Replace register read/write macros with ones from compiler.h
+
+ Signed-off-by: Yang Zhao <yang@yangman.ca>
+
+commit c9d1af91acc579d7930ecf221090ff558cbc2f99
+Author: Yang Zhao <yang@yangman.ca>
+Date: Fri Mar 27 19:46:11 2009 -0700
+
+ Use X MMIO macros instead of own register read/write functions
+
+ The old functions were not portable.
+
+ Signed-off-by: Yang Zhao <yang@yangman.ca>
+
+commit f65014d8dd50eb0d72a1d9da5371db0840c16d7e
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Apr 2 12:11:03 2009 -0400
+
+ Add RV790 (HD 4890) Support
+
+commit 79efc6093f26daea654d3f748ebe3d4aa1229fe4
+Author: Egbert Eich <eich@freedesktop.org>
+Date: Wed Apr 1 09:38:41 2009 +0200
+
+ AtomBIOS: Fixed wrong logic: switch -> if.
+
+commit ecd616670e73d57397cc3e01017c84b9076c9f4f
+Author: Yang Zhao <yang@yangman.ca>
+Date: Sat Mar 21 15:21:50 2009 -0700
+
+ rhd_dump: fix error introduced by LUT dump addition
+
+ 6e71f01f225a0cb13d10c7f7960db9d20c89a7db introduced a bug in rhd_dump
+ where register address is scanned as %d instead of %x.
+
+ Thanks to Rafal for pointing out the regression.
+
+commit 7e4948a3ad80ae0885df89ac7320457cb90f0b55
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Mar 26 14:22:35 2009 -0400
+
+ R6xx/R7xx EXA: rework composite pixel shader
+
+ - move to vram storage
+ - move swizzle logic to tex setup
+
+commit 461701c6abf76eef296a33fbdbda77a3bde2aa62
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Mar 26 14:08:14 2009 -0400
+
+ R6xx/R7xx: clean up bool const code
+
+ 3 regs: 1 bit per bool, 32 bools per ps/vs/gs
+
+commit cc6e6fe4e8b4f4557dd43b97b2b864f6dda76087
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Sun Mar 22 01:31:57 2009 -0400
+
+ add new chip ids
+
+commit f0f640f105da161e7dbb08bdd85f7ff065696e72
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Mar 19 20:49:42 2009 -0400
+
+ R6xx/R7xx EXA: fix maxPitchBytes
+
+ should now allow accel up the hw max of 8192x8192
+
+commit 37da5e5abf7907f9341354732775d45ba88319f0
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Mar 19 20:18:50 2009 -0400
+
+ Add new pci ids
+
+commit 4fa650628d7688045cdda22683d49131f858ed4e
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Mar 19 10:56:04 2009 -0400
+
+ Really disable UTS/DFS on r6xx/r7xx AGP
+
+ typo in the last patch
+
+commit b075ec9cee108061a1abb7c3f786a8b76da99997
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Mar 18 14:37:51 2009 -0400
+
+ R6xx/R7xx AGP: disable gart data transfers
+
+ Doesn't seem to be reliable on AGP.
+
+commit d9c8f9ce4aabc7c1a85e4f015c6b19bde4f96866
+Author: Dave Airlie <airlied@redhat.com>
+Date: Fri Mar 13 10:36:52 2009 -0400
+
+ r600: reload shaders into VRAM on resume
+
+ As VRAM gets zeroed out over s/r, we need to reload the
+ shaders.
+
+commit 12611c8f1b3f6e6b2ed7f6cfb1b7271d9a313bdf
+Author: Yang Zhao <yang@yangman.ca>
+Date: Wed Mar 11 19:29:41 2009 -0700
+
+ R6xx/R7xx shader: Fix OFFSET_[XYZ] macro for TEX_DWORD2 to accept floats
+
+ Values for OFFSET_[XYZ] are 5-bits two's-complement fixed-point with
+ one-bit after decimal point. Values in [-8.0, 7.5] are valid. Inputs
+ that do not exactly land on 0.5 increments are rounded towards 0 to the
+ nearest increment.
+
+commit 70490504ef74069e657daefff4f28a9bd9cb8778
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Mar 12 03:45:24 2009 -0400
+
+ RS600: fix page table size for rs600 as well
+
+commit 10ebf657755b993a09046a664311a8309a0950b9
+Author: Dave Airlie <airlied@redhat.com>
+Date: Thu Mar 12 01:03:43 2009 -0400
+
+ r600: fix sizing of PCI GART table for r600
+
+commit f27383df4a5f3a9349ead2d833142f82ee6acd92
+Author: Yang Zhao <yang@yangman.ca>
+Date: Wed Mar 11 16:20:42 2009 +0100
+
+ R6xx/R7xx: Fix OFFSET_[XYZ] macros for negative values.
+
+commit 827fb141f5be6bf02acb8ab650602c56136433fa
+Author: Matthias Hopf <mhopf@suse.de>
+Date: Tue Mar 10 18:31:17 2009 +0100
+
+ randr: Set use_screen_monitor correctly using helper function.
+
+ Fixes novell bug #370656.
+
+commit 76490dd8d052586f8737babdd8f383dbe39f4291
+Author: Matthias Hopf <mhopf@suse.de>
+Date: Tue Mar 10 17:14:26 2009 +0100
+
+ Enable DRI by default on R5xx chips.
+
+ R[67]xx still need an explicit 'Option "DRI"'.
+
+commit 093e5934a26f784f70b5febf8ae6d50a3459552c
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Mar 5 11:55:54 2009 -0500
+
+ R6xx/R7xx Xv: only stall on vline if the destination pixmap is the scanout buffer
+
+ With composite we may be rendering to an offscreen pixmap.
+
+commit 70c6b680118097cddf72c0c82eabf7dc7e438f2f
+Author: Rafał Miłecki <zajec5@gmail.com>
+Date: Wed Mar 4 20:43:40 2009 +0100
+
+ Fixes to the radeonhd manpage
+
+ Signed-off-by: Christian König <deathsimple@vodafone.de>
+
+commit ad21c9ccc56bfb0957e59eaad152f1c2fcdde73a
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Thu Dec 25 15:24:10 2008 +0100
+
+ Remove no interlaced modes limitation from TMDS outputs.
+
+ This patch removes the limitation of displaying no interlaced modes from
+ the TMDS outputs. Since interlaced modes are just a matter of CRTC
+ programming this makes them work out of the box.
+
+commit 742a4b4e0e68e88bf91c28237675877831f605b0
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Sat Dec 20 23:15:14 2008 +0100
+
+ Randr HDMI property
+
+ Adds an HDMI property to randr and while we are at it rework the
+ property handling a bit. Also adds an RHDOutputAttachConnector function
+ which is called every time an output <-> connection relation is changed.
+
+commit 2013be5c86b11fd05cce25814213f9a2bf0bd704
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Sat Dec 20 23:05:27 2008 +0100
+
+ Cleanup and include true/false as match in RhdParseBooleanOption
+
+ Further improve RhdParseBooleanOption to include true/false as match,
+ since people seems to be used to it because of the behaviour of Boolean
+ options.
+
+commit 54600950219ddb83b73c4ac17546093c36402e36
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Sat Dec 20 23:03:22 2008 +0100
+
+ Update RHDAudioInit to include RS600, RS690 and RS740
+
+ RHDAudioInit decides from the chipset type if there is an audio engine.
+ This commit changes this test to include more chipsets. It should be
+ removed entirely when i figure out how to get this information from
+ atombios.
+
+commit 9c8ab2dfbe61120298c4b46a2b49245c6779dbc2
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Mar 2 16:26:14 2009 -0500
+
+ R6xx/R7xx EXA: cleanup composite texture setup
+
+commit 3826cd76b04664f66b19892b9d937b27a1c69534
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Mar 2 16:16:36 2009 -0500
+
+ R6xx/R7xx: combine Xv packed/planar PS and EXA composite VS
+
+ use bool consts to select the fetch routines
+
+commit 2a06a508dfe64212887192a3126b668415507d34
+Author: Evgeni Golov <sargentd@die-welt.net>
+Date: Mon Mar 2 14:52:27 2009 -0500
+
+ Fix compile with EXA but no DRI
+
+commit b02af166bed7706d6909acd4037af2df646a18a6
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Mar 2 11:23:39 2009 -0500
+
+ R6xx/R7xx: fix build errors in some cases
+
+commit 7338dc0d9d2bff677e9f10bdd0f59d8694fe274d
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Mar 2 11:22:05 2009 -0500
+
+ R6xx/R7xx: fix regression in 347b23d419c877de0ac95b1f2f69d6953dddfebd
+
+ Should fix bug 20426
+
+commit 1935b2aae5cf53fe2777eb31ca39c4ce551b3292
+Author: Luc Verhaegen <libv@skynet.be>
+Date: Mon Mar 2 15:07:43 2009 +0100
+
+ Byebye novell.
+
+commit b35c26fc4a318ec30b76bae6d420a1b73fa14fa6
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Mar 2 00:21:12 2009 -0500
+
+ R6xx/R7xx: write vertexes directly to the IB
+
+ Reduces the vertex buffer setup overhead
+
+commit 347b23d419c877de0ac95b1f2f69d6953dddfebd
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Mar 2 00:07:23 2009 -0500
+
+ R6xx/R7xx: switch emit functions to macros
+
+ This improves performance due to decreased function call
+ overhead.
+
+commit 89a835f03993da087c361de7ee3f6bc13bcb33f8
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Sun Mar 1 23:03:24 2009 -0500
+
+ R6xx/R7xx cleanup: Replace Xv shaders with generated ones
+
+ Replace Xv shaders with generated one fixing some minor typos in the
+ pixel shaders.
+
+commit 2b725913b1a91f2d178e77cd542c35067fc16d7c
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Sun Mar 1 23:01:32 2009 -0500
+
+ R6xx/R7xx cleanup: Move shaders to r600_shader.c
+
+ Move all shaders from r600_exa.c to the new file r600_shader.c
+
+commit 6f9373384d3ebe58333e1ee0c64ddcc11d235a06
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Sun Mar 1 22:38:06 2009 -0500
+
+ R6xx/R7xx cleanup: Fix comments in r600_exa.c
+
+ Replace all C++ comments in r600_exa.c with C ones.
+
+commit 812ff17853d4d8a07418d0b28b2f3f80f6db74ed
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Sun Mar 1 12:22:14 2009 -0500
+
+ Fix R5xx Xv after r6xx/r7xx accel merge
+
+commit df71658688e47614a3f660c28ac1dc77970eb491
+Author: Matthias Hopf <mhopf@suse.de>
+Date: Thu Feb 26 12:24:44 2009 +0100
+
+ EXA: fix for (now compatible) PREPARE_AUX buffers.
+
+ Partially reverts commit 047bd7059bcfec55e06a35db4a2b16d52fe8dbf6.
+
+commit 10c211913de10bb4c7ec0747671f1b3e61231674
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Fri Feb 27 11:34:20 2009 -0500
+
+ Only pad the IB on r6xx+
+
+commit f10c8c797f3a0b53625cf8850b949fb304bcc4da
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Feb 25 22:44:32 2009 -0500
+
+ CloseScreen(): Don't mess with the engine if the xserver isn't active
+
+ This fixes problems with killing X when accel is active and the server
+ is switched away.
+
+commit a900f07b64bebe26d66b02decb146391937ea18d
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Feb 25 09:20:03 2009 -0500
+
+ R6xx/R7xx EXA: same surface and same coords equals nop
+
+commit fdf6150ad9988b2e6e391c54b2f5fb9bc1cda837
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Tue Feb 24 16:57:48 2009 -0500
+
+ R6xx/R7xx: Bugfix for wait_vline_range
+
+ Check if CurrentiMode is set, not if Active is true.
+
+commit c16e74a2d36781fee495a72005a2decfec0d1b91
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue Feb 24 11:06:32 2009 -0500
+
+ R6xx/R7xx EXA: optimize overlapping copy using temp surface
+
+ - allocate temp surface in PrepareCopy()
+ - fallback to old OverlapCopy() path is we're not able to
+ allocate a temp surface
+
+commit 435e159d5c15ff3f6631d038e02860681c541eb5
+Author: Mark van Doesburg <mark.vandoesburg@hetnet.nl>
+Date: Tue Feb 24 11:01:56 2009 -0500
+
+ R6xx/R7xx EXA: use a temp surface for overlapping copies
+
+commit 0de4db723c4d9bd40dcaa7fd79b507f7fe9270aa
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue Feb 24 10:10:08 2009 -0500
+
+ R6xx/R7xx EXA: switch to surface sync packet
+
+commit db97dd5db4f95c0c4e056a4a7c3e9055dce337c1
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue Feb 24 03:11:36 2009 -0500
+
+ r7xx: Fix typo in cmd fifo mask
+
+commit 33a84c9b4fddc5bb396ec90b93e174e0a1a4f91b
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Feb 23 19:06:22 2009 -0500
+
+ R6xx/R7xx: add wait for idle MMIO path
+
+commit c2b2155fcc499a253bef99e2462369162640a37c
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Feb 23 18:35:04 2009 -0500
+
+ R6xx/R7xx: reset 3D state after VT switch
+
+commit ca198357d3f3f9906d35585f3e22bfd00e92d2ec
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Mon Feb 23 10:14:39 2009 -0500
+
+ R6xx/R7xx: Improve wait_vline_range
+
+ Make shure the given crtc is active and the range we are waiting for is
+ in the visible area of this crtc.
+
+commit 793cebe3dccc176da1c326b6be979d63d09b3ba5
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Feb 18 20:23:55 2009 -0500
+
+ R6xx/R7xx EXA/Xv: properly deal with running out of vertex buffer space
+
+ As noted by mhopf, if VGT_MAX/MIN_INDX, etc. regs change, you need to re-emit
+ CB blocks to avoid a hang. So, just set the VGT_MAX_INDX to a reasonably large value
+ in the default state and don't touch them when drawing. When we run out of VB space,
+ just draw the current buffer, grab a new one, and continue.
+
+commit ef9225f75d8376d1f648b1f673ee5f25fe40564c
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Feb 12 17:47:44 2009 -0500
+
+ R6xx/R7xx: switch to drm for wait for idle
+
+ THIS REQUIRES AN UPDATED DRM
+
+commit 1442be75b3a8f72dbbd4c33b4c92d7754999e4b2
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Feb 12 15:16:27 2009 -0500
+
+ R6xx/R7xx EXA: handle running out of vertex space in the copy path
+
+commit e16691af2a4e35b14fbbc39aed1d527d21c80ad6
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Feb 12 15:09:15 2009 -0500
+
+ R6xx/R7xx EXA: properly handle non repeat cases in the texture setup
+
+commit 976d651b7f472ef44eecb8ef07b1ab8675418c19
+Author: Yang Zhao <yang@yangman.ca>
+Date: Thu Feb 12 14:52:22 2009 -0500
+
+ R6xx/R7xx EXA: Further optimizations to overlapping copy
+
+ Diagonal overlapping copies can be reduced to either horizontal- or
+ vertical-only offset, and the one with fewer copies is picked.
+
+commit f02dd7cbc523160aedaa21599234c58c53447dc1
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Wed Feb 11 18:13:47 2009 -0500
+
+ R6xx/R7xx: Cleanup register definitions
+
+ Comment every definition in r600_reg_r6xx.h and r600_reg_r7xx.h which
+ is also in rhd_regs.h, making it possible to include both files at the same
+ time.
+
+commit b9e0ef98ba846d8051e1ee7ad685e98394579493
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Wed Feb 11 18:10:22 2009 -0500
+
+ R6xx/R7xx: Implements wait_vline_range
+
+ Implements wait_vline_range function and use this in
+ R600DisplayTexturedVideo. Also fixes a nasty bug in "ereg".
+
+ Based on radeon patch from Pierre Ossman.
+
+commit 47f375d7dee8a5291b87edc7d14238134be6ae15
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Wed Feb 11 18:09:33 2009 -0500
+
+ R6xx/R7xx: Define WAIT_x constants for IT_WAIT_REG_MEM
+
+ And also fix some compiler warnings.
+
+commit 936838143d5431f6a0b33c6a396ad0ff44cf9c35
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Feb 11 15:25:17 2009 -0500
+
+ R6xx/R7xx Xv: switch packed over to Yang's new shader code
+
+commit e315314c98ae7750fe5107625f35976697e4fa79
+Author: Yang Zhao <yang@yangman.ca>
+Date: Mon Feb 9 22:28:03 2009 -0800
+
+ R6xx/R7xx Xv: Planar - Properly scale Y'CbCr values before converting to RGB
+
+ According to MPEG-2 spec, Y' and Cb/Cr values are scaled to [16, 235]
+ and [16, 240], respectively, when packed into bytes. Properly take care
+ of the reverse scaling before translating to RGB.
+
+ Conversion matrix has been simplified to remove 3rd column, as the fitting
+ to [-0.5, 0.5] can be done with scaling.
+
+ Redundant MOV instructions were also removed, and now only 3 GPRs are
+ required.
+
+commit 8dc7161ce426fb3968bba02d62db0a9980b26197
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Feb 11 13:14:01 2009 -0500
+
+ R6xx/R7xx: be more verbose about what function ran out of VB space
+
+commit 78c0f342282a1105ec30305dc2a44324702b151e
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Feb 11 12:52:33 2009 -0500
+
+ R6xx/R7xx: move engine idle to sync function
+
+commit a04e5b212523d877cd6591c367125745c27049c7
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Feb 11 11:45:18 2009 -0500
+
+ R6xx/R7xx Xv: add support for packed uploads
+
+commit 4205f30ae97c4771078988c6494f82a0d7e1f8de
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Feb 11 11:40:23 2009 -0500
+
+ R6xx/R7xx Xv: Add native support for packed formats
+
+commit d4079f7a68392fe0486c0ea0ddd6f2ca6d376149
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue Feb 10 19:38:12 2009 -0500
+
+ M82: Missed one in the previous commit
+
+commit 7ea3e14f4a3904ab2c5d858d26d23c793f393ade
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue Feb 10 17:21:02 2009 -0500
+
+ R6xx/R7xx: fix M82
+
+ M82 is an RV620
+
+commit 47c57d1d994a9427b3e6068326eeb5971d2664cf
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Feb 9 19:57:30 2009 -0500
+
+ R6xx/R7xx: Add checks to make sure we don't overrun VB space
+
+commit 531de3518857e585c869c1d4c004ff2174984389
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Feb 9 14:09:24 2009 -0500
+
+ R6xx/R7xx Xv: switch to native planar shader and add accelerated planar uploads
+
+commit 4e574120feec720dc1086596bf1b2a315a1f1e0e
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Feb 9 13:33:13 2009 -0500
+
+ R6xx/R7xx UTS: move actual upload to separate function
+
+ So it can be shared with Xv
+
+commit 916a3a08255aeda24987ae32cc1369c0c10b7bcd
+Author: Yang Zhao <yang@yangman.ca>
+Date: Sat Feb 7 13:42:22 2009 -0500
+
+ R6xx/R7xx EXA: Optimize overlapping copy
+
+ Overlapping copy is now done in chunks proportional to the
+ non-overlapping area.
+
+ Diagonal overlaps are also handled properly.
+
+commit 295648454253f98e30e3680e8c9dd94c91bde6bb
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Sat Feb 7 10:34:12 2009 -0500
+
+ R6xx/R7xx Xv: fix typos in cache flushing
+
+commit fab5c673418a44aafb0314766ce0edc25740c51d
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Fri Feb 6 18:31:14 2009 -0500
+
+ R6xx/R7xx EXA: Fix typo in DFS
+
+ noticed by pzad in IRC
+
+commit 8f7fca4bbe8e3d29026f8cf603602e09f00af9e3
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Fri Feb 6 18:04:43 2009 -0500
+
+ R6xx/R7xx EXA: fallback on overlapping blits for now
+
+ Leave this disabled until we get a proper solution.
+
+commit 4120d13a4e1f84a97903c839193b39acbab0b5c9
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Fri Feb 6 17:56:42 2009 -0500
+
+ Revert "r6xx/r7xx EXA: Optimize overlapping copy"
+
+ This reverts commit 262126ef7292a851bcb757462615c015639e50d7.
+
+ This is also not adequate for all cases.
+
+commit f1b9c19683090272a29a3e4c9e2c054b4a32b47c
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Fri Feb 6 11:17:02 2009 -0500
+
+ R6xx/R7xx EXA: add accelerated UTS/DFS hooks
+
+ I'm not sure how much of a win these are. I need to
+ do some benchmarking.
+
+commit 8f90a3432e0f234b4c0f778aed31367b3dc4110d
+Author: Yang Zhao <yang@yangman.ca>
+Date: Fri Feb 6 10:28:39 2009 -0500
+
+ r6xx/r7xx EXA: Optimize overlapping copy
+
+ When source and destination blocks are only offset horizontally, it
+ appears to be unnecessary to perform careful, segment-by-segment copy.
+ The code path that does this is taken out completely.
+
+ For the case where offset is only vertical, copying is now done by
+ height of the non-overlapping area each time, instead of always
+ line-by-line.
+
+commit c725d146e333930e410733073b88849e8fb91bf2
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Feb 5 19:26:12 2009 -0500
+
+ Revert "R6xx/R7xx EXA: improve overlapping copy performance"
+
+ This reverts commit bd28b5817ed96e86a2cb275f72a7233d8fc5eccc.
+
+ THis seems to cause corruption in some cases.
+
+commit 7ef8c0b06522477cc2abcc2c9f1fa65efd2fab02
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Feb 5 17:33:36 2009 -0500
+
+ r6xx/r7xx EXA: fix corruption when doing sw access
+
+ need to wait until the engine is idle. Ideally we wait
+ on a timestamp shadowed in memory, but polling the
+ GRBM_STATUS reg will do for now.
+
+commit f0ac61a002debc29442492229c1465fe55d2a791
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Feb 5 16:25:06 2009 -0500
+
+ R6xx/R7xx EXA: improve overlapping copy performance
+
+ send vertices for each line of the copy, but only draw once
+
+commit 9f160eaadb944bc80a62cc03195a3245cae2df2a
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Feb 5 16:12:28 2009 -0500
+
+ r6xx/r7xx EXA: cleanup overlapping copy
+
+commit 4d20f2ce1b3a248ebf7093b7b8c35f87dd1ec673
+Author: Christian Koenig <deathsimple@vodafone.de>
+Date: Wed Feb 4 19:24:44 2009 -0500
+
+ Fix RHDDRIGARTBaseGet to work with AGP based card
+
+ Remove a check in RHDDRIGARTBaseGet makes AGP based r6xx card working,
+ and also fix a minor debugging output typo.
+
+commit a5c129abb9e9ff9484c468056766f7281d8bc56e
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue Feb 3 18:16:06 2009 -0500
+
+ EXA: fix and re-enable Solid() on R7xx
+
+ last bit was set in final alu instruction.
+
+commit 59fa04881f598602a3163070c62349a3ec65f242
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Feb 2 16:38:05 2009 -0500
+
+ Updates the comments about SPI setup for Solid()
+
+commit ded1312e6478ca205d5b5f0c470e24cc77405436
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Feb 2 16:20:36 2009 -0500
+
+ R7xx: temporarily disable Solid() to prevent hangs
+
+ Something about using a PS constant for color seems to
+ disagree with some r7xx cards.
+
+commit f723ad4a591c3940373566c56f8d03a01ddee67f
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Feb 2 16:08:00 2009 -0500
+
+ EXA solid fixes
+
+ - fix fetch count in solid VS
+ - fix SPI PS input setup (we aren't using any VS outputs)
+ - always have at least one VS export besides position, even if
+ it's not used by the PS (SPI expects at least one).
+
+commit 53c1b328bda7103c06fa4545f72976ab71abce10
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Feb 2 11:34:09 2009 -0500
+
+ R6xx/R7xx: Avoid emitting default state when possible
+
+commit b32618d0c1799ed12ca4c2eaf96dde2700785ef5
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Feb 2 11:08:24 2009 -0500
+
+ Add R6xx/R7xx AGP support
+
+ - Needs latest drm bits
+ - doesn't seem to be as reliable as PCIE
+
+commit 8ae410b1d9a7a19477c00794047eadf5c5400ff6
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Sat Jan 31 15:37:06 2009 -0500
+
+ Fix and enable composite mask
+
+ bad offset into the vertex buffer for the mask coordinates
+
+commit 1a3fe25e9def5fa8f371d3a2c96566318ed4a195
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Fri Jan 30 20:22:07 2009 -0500
+
+ EXA: Remove repeat tile code
+
+ As far as I can tell from documentation and experimentation,
+ all the clamp modes work fine with NPOT or POT textures.
+
+commit 84a7741e21c0293a4ac1c8693fc6010c2ff5c869
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Fri Jan 30 14:30:58 2009 -0500
+
+ EXA: Re-enable a8 solid and copy.
+
+ it's just masks with repeat that are broken.
+
+commit efbd11d434f4b9327effa5792b219c3ba3505abe
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Jan 29 13:50:42 2009 -0500
+
+ R6xx/R7xx: move some VGT setup to drm
+
+ This fixes accel on rs780/rv610/rv620, etc.
+ VGT_OUT_DEALLOC_CNTL and VGT_VERTEX_REUSE_BLOCK_CNTL
+ are set up based on the backend config so set them up
+ in the drm and forget them.
+
+ YOU MUST UPDATE YOUR DRM!
+
+commit 8f4ab199975a76597dcf354996822af8816433d5
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Jan 29 13:06:41 2009 -0500
+
+ Discard command buffers when nothing is drawn
+
+ This fixes hangs on r7xx.
+
+ Changing the same SQ constant (ALU, VTX/TEX, etc.)
+ more than once between draw calls can result in a hang.
+
+commit cea356d9b0b89b34659c729e4781497fd81bee88
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Jan 28 19:33:04 2009 -0500
+
+ switch to R600PitchMatches() due to changes in pitch alignment
+
+ render repeat modes seem the be the last thing left to getting
+ this working properly
+
+commit 381ca1a2a1b9b05d41e07f7d0548da753b66753e
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Jan 28 17:26:09 2009 -0500
+
+ EXA Composite: add a bit of missing state setup
+
+commit 68311d8865152bee1ffe1f1233ccde51a18bf4d3
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Jan 28 02:34:25 2009 -0500
+
+ minor code re-org
+
+commit e6c753f409fbddfbd8f706061743d1d486de672d
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Jan 28 02:31:01 2009 -0500
+
+ removed leftover vertex color param export
+
+commit 16b6e8d30db237acd354fc717d15939c45a6e095
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Jan 28 02:16:44 2009 -0500
+
+ EXA: fix mask coordinate export
+
+commit f808fe852596c9a6d6742bd19d2bb972b2268dec
+Author: Ludovic Aubry <ludovic.aubry@logilab.fr>
+Date: Wed Jan 28 00:37:12 2009 -0500
+
+ use correct mask resource and sampler id
+
+commit c1db8638979e5e47eb580f0ebcf1b2db7043888b
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue Jan 27 11:58:59 2009 -0500
+
+ Remove Xv vertex debugging output
+
+commit a4bfc7f0695db02dcea3bc07bf042b4b08930eb3
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Jan 26 20:46:04 2009 -0500
+
+ R6xx/R7xx: workaround text rendering issues
+
+ - disable a8 acceleration until I figure out why it's not working properly
+ - disable DFS/UTS hooks. they are still SW at the moment anyway.
+ - fix pitch alignment (width has to be a multiple of 8,
+ bytes have to be a multiple of 256)
+ - fix height (height has to be a multiple of 8)
+
+commit 3b692f8ac29562d0b9b73037cd2b4dcf7a715adf
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Fri Jan 23 17:43:57 2009 -0500
+
+ R6xx/R7xx: add missing TEX instruction padding
+
+commit 43f54aa6c5014fcb81871d681b877f20673bccdb
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Jan 22 20:20:45 2009 -0500
+
+ R6xx/R7xx: flush TC on chips without VC
+
+ On chips without a dedicated vertex cache,
+ the texture cache is used for vertexes and textures.
+
+commit f6315d535c0084771030884bad8894008902d318
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Jan 22 19:44:47 2009 -0500
+
+ R6xx/R7xx: get the SQ setup right
+
+ based on info from the hw guys
+
+commit b6351dc4079cc343e865ce6dab8e7dbde552274c
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Jan 22 16:55:31 2009 -0500
+
+ Add missing return in PrepareAccess()
+
+commit a73ed442270077d9b148993ed1061224161c7e2f
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Jan 22 13:04:06 2009 -0500
+
+ R6xx:R7xx: add fine grained cache flushing support
+
+ - also flush HDP caches when doing sw access
+
+commit 5c4b2c38f23076d5f829212c165c207f5140e153
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Sat Jan 17 15:51:34 2009 -0500
+
+ R6xx/R7xx: adjust SQ setup
+
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