xserver-xorg-video-ati: Changes to 'upstream-experimental'
src/ati.c | 2
src/ati.h | 2
src/ati_pciids_gen.h | 6
src/atimodule.c | 2
src/atombios_crtc.c | 13
src/atombios_output.c | 101 ++-
src/legacy_output.c | 2
src/pcidb/ati_pciids.csv | 8
src/radeon.h | 380 +++++++------
src/radeon_atombios.c | 725 +-----------------------
src/radeon_atomwrapper.c | 2
src/radeon_chipinfo_gen.h | 8
src/radeon_chipset_gen.h | 6
src/radeon_crtc.c | 11
src/radeon_cursor.c | 8
src/radeon_driver.c | 80 --
src/radeon_exa.c | 9
src/radeon_exa_funcs.c | 4
src/radeon_exa_render.c | 1103 +++++++++++++++++++++++++++-----------
src/radeon_output.c | 142 +++-
src/radeon_pci_chipset_gen.h | 6
src/radeon_pci_device_match_gen.h | 6
src/radeon_probe.h | 6
src/radeon_reg.h | 187 +++++-
src/radeon_render.c | 9
src/radeon_textured_video.c | 22
src/radeon_textured_videofuncs.c | 100 ++-
src/theatre_detect.c | 1
28 files changed, 1577 insertions(+), 1374 deletions(-)
New commits:
commit 5e3b21284482df9974c9a58f248f0100def2bb0c
Author: Alex Deucher <alex@samba.(none)>
Date: Wed Mar 19 19:15:05 2008 -0400
Disable the setting of HARDWARE_CURSOR_BIT_ORDER_MSBFIRST
See bug 11796
diff --git a/src/radeon_cursor.c b/src/radeon_cursor.c
index 0f7e668..de64dee 100644
--- a/src/radeon_cursor.c
+++ b/src/radeon_cursor.c
@@ -346,14 +346,6 @@ Bool RADEONCursorInit(ScreenPtr pScreen)
return xf86_cursors_init (pScreen, CURSOR_WIDTH, CURSOR_HEIGHT,
(HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- /* this is a lie --
- * HARDWARE_CURSOR_BIT_ORDER_MSBFIRST
- * actually inverts the bit order, so
- * this switches to LSBFIRST
- */
- HARDWARE_CURSOR_BIT_ORDER_MSBFIRST |
-#endif
HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1 |
HARDWARE_CURSOR_ARGB));
commit 17cd42ed31814ba329a6a68edd0d75390a7da40e
Author: Matt Turner <mattst88@gmail.com>
Date: Wed Mar 19 18:17:10 2008 -0400
Enable BSR in Log2 functions
This patch edits RADEONLog2 and ATILog2 to use the x86 BSR instruction instead
of looping through bits. It should provide a somewhat of a speed increase in
this function on x86 and AMD64 architectures.
Note: the BSR instruction was added with the 80386 CPU and is therefore not
compatible with earlier CPUs, though I highly doubt it's even possible to use a
286 in conjunction with a Radeon.
The inline assembly also works with Intel's compiler (icc).
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index 4da4841..a6ededa 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -99,10 +99,17 @@ static __inline__ int
RADEONLog2(int val)
{
int bits;
-
+#if (defined __i386__ || defined __x86_64__) && (defined __GNUC__)
+ __asm volatile("bsrl %1, %0"
+ : "=r" (bits)
+ : "c" (val)
+ );
+ return bits;
+#else
for (bits = 0; val != 0; val >>= 1, ++bits)
;
return bits - 1;
+#endif
}
static __inline__ CARD32 F_TO_DW(float val)
diff --git a/src/radeon_render.c b/src/radeon_render.c
index a80d136..950753c 100644
--- a/src/radeon_render.c
+++ b/src/radeon_render.c
@@ -250,10 +250,17 @@ static __inline__ int
ATILog2(int val)
{
int bits;
-
+#if (defined __i386__ || defined __x86_64__) && (defined __GNUC__)
+ __asm volatile("bsrl %1, %0"
+ : "=r" (bits)
+ : "c" (val)
+ );
+ return bits;
+#else
for (bits = 0; val != 0; val >>= 1, ++bits)
;
return bits - 1;
+#endif
}
static void
commit c83827b4d2b6f03c54429e757a756eb99ff8be6b
Author: Paulo Cesar Pereira de Andrade <pcpa@mandriva.com.br>
Date: Wed Mar 19 17:58:34 2008 -0400
[PATCH] Compile warning fixes.
Minor changes to avoid declarations mixed with code.
Ansified functions with empty prototype to specify they don't
receive arguments.
Added some prototypes to radeon.h, and major reorder on radeon.h
adding prototypes in alphabetical order and specifying to file that
defines it.
diff --git a/src/ati.c b/src/ati.c
index b3f07ca..85da389 100644
--- a/src/ati.c
+++ b/src/ati.c
@@ -102,7 +102,7 @@ ati_device_get_from_busid(int bus, int dev, int func)
}
static struct pci_device*
-ati_device_get_primary()
+ati_device_get_primary(void)
{
struct pci_device *device = NULL;
struct pci_device_iterator *device_iter;
diff --git a/src/ati.h b/src/ati.h
index 828aae1..fa2e45e 100644
--- a/src/ati.h
+++ b/src/ati.h
@@ -31,4 +31,6 @@
#include "xf86_OSproc.h"
+extern void ati_gdev_subdriver(pointer options);
+
#endif /* ___ATI_H___ */
diff --git a/src/atimodule.c b/src/atimodule.c
index c249333..f0eb147 100644
--- a/src/atimodule.c
+++ b/src/atimodule.c
@@ -27,8 +27,6 @@
#include "ati.h"
#include "ativersion.h"
-extern void ati_gdev_subdriver(pointer options);
-
/* Module loader interface */
static XF86ModuleVersionInfo ATIVersionRec =
diff --git a/src/legacy_output.c b/src/legacy_output.c
index 0de13df..9dc7286 100644
--- a/src/legacy_output.c
+++ b/src/legacy_output.c
@@ -675,9 +675,9 @@ RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
unsigned long tmp;
RADEONOutputPrivatePtr radeon_output;
int tv_dac_change = 0, o;
- radeon_output = output->driver_private;
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+ radeon_output = output->driver_private;
for (o = 0; o < xf86_config->num_output; o++) {
if (output == xf86_config->output[o]) {
break;
diff --git a/src/radeon.h b/src/radeon.h
index 8ebb3b3..f3db451 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -766,147 +766,204 @@ do { \
info->fifo_slots -= entries; \
} while (0)
-extern RADEONEntPtr RADEONEntPriv(ScrnInfoPtr pScrn);
-extern void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
-extern void RADEONWaitForIdleMMIO(ScrnInfoPtr pScrn);
+/* legacy_crtc.c */
+extern void legacy_crtc_dpms(xf86CrtcPtr crtc, int mode);
+extern void legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
+ DisplayModePtr adjusted_mode, int x, int y);
+extern void RADEONInitDispBandwidth(ScrnInfoPtr pScrn);
+extern void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn,
+ RADEONSavePtr restore);
+extern void RADEONRestoreCrtcRegisters(ScrnInfoPtr pScrn,
+ RADEONSavePtr restore);
+extern void RADEONRestoreCrtc2Registers(ScrnInfoPtr pScrn,
+ RADEONSavePtr restore);
+extern void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn,
+ RADEONSavePtr restore);
+extern void RADEONRestorePLL2Registers(ScrnInfoPtr pScrn,
+ RADEONSavePtr restore);
+extern void RADEONSaveCommonRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
+extern void RADEONSaveCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
+extern void RADEONSaveCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save);
+extern void RADEONSavePLLRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
+extern void RADEONSavePLL2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save);
+
+/* legacy_output.c */
+extern RADEONMonitorType legacy_dac_detect(ScrnInfoPtr pScrn,
+ xf86OutputPtr output);
+extern void legacy_output_dpms(xf86OutputPtr output, int mode);
+extern void legacy_output_mode_set(xf86OutputPtr output, DisplayModePtr mode,
+ DisplayModePtr adjusted_mode);
+extern I2CDevPtr RADEONDVODeviceInit(I2CBusPtr b, I2CSlaveAddr addr);
+extern Bool RADEONDVOReadByte(I2CDevPtr dvo, int addr, CARD8 *ch);
+extern Bool RADEONDVOWriteByte(I2CDevPtr dvo, int addr, CARD8 ch);
+extern void RADEONRestoreDACRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore);
+extern void RADEONRestoreFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore);
+extern void RADEONRestoreFP2Registers(ScrnInfoPtr pScrn, RADEONSavePtr restore);
+extern void RADEONRestoreLVDSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore);
+extern void RADEONRestoreRMXRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore);
+extern void RADEONSaveDACRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
+extern void RADEONSaveFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
+
+/* radeon_accel.c */
+extern Bool RADEONAccelInit(ScreenPtr pScreen);
+extern void RADEONEngineFlush(ScrnInfoPtr pScrn);
+extern void RADEONEngineInit(ScrnInfoPtr pScrn);
+extern void RADEONEngineReset(ScrnInfoPtr pScrn);
+extern void RADEONEngineRestore(ScrnInfoPtr pScrn);
+extern CARD8 *RADEONHostDataBlit(ScrnInfoPtr pScrn, unsigned int cpp,
+ unsigned int w, CARD32 dstPitchOff,
+ CARD32 *bufPitch, int x, int *y,
+ unsigned int *h, unsigned int *hpass);
+extern void RADEONHostDataBlitCopyPass(ScrnInfoPtr pScrn,
+ unsigned int bpp,
+ CARD8 *dst, CARD8 *src,
+ unsigned int hpass,
+ unsigned int dstPitch,
+ unsigned int srcPitch);
+extern void RADEONCopySwap(CARD8 *dst, CARD8 *src, unsigned int size, int swap);
+extern void RADEONHostDataParams(ScrnInfoPtr pScrn, CARD8 *dst,
+ CARD32 pitch, int cpp,
+ CARD32 *dstPitchOffset, int *x, int *y);
+extern void RADEONInit3DEngine(ScrnInfoPtr pScrn);
+extern void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
#ifdef XF86DRI
-extern int RADEONDRISetParam(ScrnInfoPtr pScrn, unsigned int param, int64_t value);
-extern void RADEONWaitForIdleCP(ScrnInfoPtr pScrn);
+extern drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn);
+extern void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard);
+extern void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn);
+extern int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info);
+# ifdef USE_XAA
+extern Bool RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen);
+# endif
#endif
-extern void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y,
- Bool clone);
-
-extern void RADEONEngineReset(ScrnInfoPtr pScrn);
-extern void RADEONEngineFlush(ScrnInfoPtr pScrn);
-extern void RADEONEngineRestore(ScrnInfoPtr pScrn);
+#ifdef USE_XAA
+/* radeon_accelfuncs.c */
+extern void RADEONAccelInitMMIO(ScreenPtr pScreen, XAAInfoRecPtr a);
+extern Bool RADEONSetupMemXAA(int scrnIndex, ScreenPtr pScreen);
+#endif
-extern unsigned RADEONINPLL(ScrnInfoPtr pScrn, int addr);
-extern void RADEONOUTPLL(ScrnInfoPtr pScrn, int addr, CARD32 data);
+/* radeon_bios.c */
+extern Bool RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10);
+extern Bool RADEONGetClockInfoFromBIOS(ScrnInfoPtr pScrn);
+extern Bool RADEONGetConnectorInfoFromBIOS(ScrnInfoPtr pScrn);
+extern Bool RADEONGetDAC2InfoFromBIOS(xf86OutputPtr output);
+extern Bool RADEONGetExtTMDSInfoFromBIOS(xf86OutputPtr output);
+extern Bool RADEONGetHardCodedEDIDFromBIOS(xf86OutputPtr output);
+extern Bool RADEONGetBIOSInitTableOffsets(ScrnInfoPtr pScrn);
+extern Bool RADEONGetLVDSInfoFromBIOS(xf86OutputPtr output);
+extern Bool RADEONGetTMDSInfoFromBIOS(xf86OutputPtr output);
+extern Bool RADEONGetTVInfoFromBIOS(xf86OutputPtr output);
+extern Bool RADEONInitExtTMDSInfoFromBIOS (xf86OutputPtr output);
+extern Bool RADEONPostCardFromBIOSTables(ScrnInfoPtr pScrn);
+
+/* radeon_commonfuncs.c */
+#ifdef XF86DRI
+extern void RADEONWaitForIdleCP(ScrnInfoPtr pScrn);
+#endif
+extern void RADEONWaitForIdleMMIO(ScrnInfoPtr pScrn);
-extern unsigned RADEONINMC(ScrnInfoPtr pScrn, int addr);
-extern void RADEONOUTMC(ScrnInfoPtr pScrn, int addr, CARD32 data);
+/* radeon_crtc.c */
+extern void radeon_crtc_load_lut(xf86CrtcPtr crtc);
+extern Bool RADEONAllocateControllers(ScrnInfoPtr pScrn, int mask);
+extern void RADEONBlank(ScrnInfoPtr pScrn);
+extern void RADEONComputePLL(RADEONPLLPtr pll, unsigned long freq,
+ CARD32 *chosen_dot_clock_freq,
+ CARD32 *chosen_feedback_div,
+ CARD32 *chosen_reference_div,
+ CARD32 *chosen_post_div, int flags);
+extern DisplayModePtr RADEONCrtcFindClosestMode(xf86CrtcPtr crtc,
+ DisplayModePtr pMode);
+extern void RADEONUnblank(ScrnInfoPtr pScrn);
+extern Bool RADEONSetTiling(ScrnInfoPtr pScrn);
+
+/* radeon_cursor.c */
+extern Bool RADEONCursorInit(ScreenPtr pScreen);
+extern void radeon_crtc_hide_cursor(xf86CrtcPtr crtc);
+extern void radeon_crtc_load_cursor_argb(xf86CrtcPtr crtc, CARD32 *image);
+extern void radeon_crtc_set_cursor_colors(xf86CrtcPtr crtc, int bg, int fg);
+extern void radeon_crtc_set_cursor_position(xf86CrtcPtr crtc, int x, int y);
+extern void radeon_crtc_show_cursor(xf86CrtcPtr crtc);
+
+/* radeon_dga.c */
+extern Bool RADEONDGAInit(ScreenPtr pScreen);
-extern void RADEONWaitForVerticalSync(ScrnInfoPtr pScrn);
-extern void RADEONWaitForVerticalSync2(ScrnInfoPtr pScrn);
+#ifdef XF86DRI
+/* radeon_dri.c */
+extern void RADEONDRIAllocatePCIGARTTable(ScreenPtr pScreen);
+extern void RADEONDRICloseScreen(ScreenPtr pScreen);
+extern Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen);
+extern int RADEONDRIGetPciAperTableSize(ScrnInfoPtr pScrn);
+extern Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn);
+extern void RADEONDRIResume(ScreenPtr pScreen);
+extern Bool RADEONDRIScreenInit(ScreenPtr pScreen);
+extern int RADEONDRISetParam(ScrnInfoPtr pScrn,
+ unsigned int param, int64_t value);
+extern Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on);
+extern void RADEONDRIStop(ScreenPtr pScreen);
+#endif
-extern void RADEONChangeSurfaces(ScrnInfoPtr pScrn);
+/* radeon_driver.c */
+extern void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, Bool clone);
+extern void RADEONChangeSurfaces(ScrnInfoPtr pScrn);
+extern RADEONEntPtr RADEONEntPriv(ScrnInfoPtr pScrn);
+extern int RADEONMinBits(int val);
+extern unsigned RADEONINMC(ScrnInfoPtr pScrn, int addr);
+extern unsigned RADEONINPLL(ScrnInfoPtr pScrn, int addr);
+extern void RADEONOUTMC(ScrnInfoPtr pScrn, int addr, CARD32 data);
+extern void RADEONOUTPLL(ScrnInfoPtr pScrn, int addr, CARD32 data);
+extern void RADEONPllErrataAfterData(RADEONInfoPtr info);
+extern void RADEONPllErrataAfterIndex(RADEONInfoPtr info);
+extern void RADEONWaitForVerticalSync(ScrnInfoPtr pScrn);
+extern void RADEONWaitForVerticalSync2(ScrnInfoPtr pScrn);
-extern Bool RADEONAccelInit(ScreenPtr pScreen);
#ifdef USE_EXA
-extern Bool RADEONSetupMemEXA (ScreenPtr pScreen);
-extern Bool RADEONDrawInitMMIO(ScreenPtr pScreen);
-#ifdef XF86DRI
-extern unsigned long long RADEONTexOffsetStart(PixmapPtr pPix);
-extern Bool RADEONGetDatatypeBpp(int bpp, CARD32 *type);
-extern Bool RADEONGetPixmapOffsetPitch(PixmapPtr pPix,
- CARD32 *pitch_offset);
-extern Bool RADEONDrawInitCP(ScreenPtr pScreen);
-extern void RADEONDoPrepareCopyCP(ScrnInfoPtr pScrn,
- CARD32 src_pitch_offset,
- CARD32 dst_pitch_offset,
- CARD32 datatype, int rop,
- Pixel planemask);
-extern void RADEONCopyCP(PixmapPtr pDst, int srcX, int srcY, int dstX,
- int dstY, int w, int h);
-#endif
+/* radeon_exa.c */
+extern Bool RADEONSetupMemEXA(ScreenPtr pScreen);
+
+/* radeon_exa_funcs.c */
+extern void RADEONCopyCP(PixmapPtr pDst, int srcX, int srcY, int dstX,
+ int dstY, int w, int h);
+extern void RADEONCopyMMIO(PixmapPtr pDst, int srcX, int srcY, int dstX,
+ int dstY, int w, int h);
+extern Bool RADEONDrawInitCP(ScreenPtr pScreen);
+extern Bool RADEONDrawInitMMIO(ScreenPtr pScreen);
+extern void RADEONDoPrepareCopyCP(ScrnInfoPtr pScrn,
+ CARD32 src_pitch_offset,
+ CARD32 dst_pitch_offset,
+ CARD32 datatype, int rop,
+ Pixel planemask);
+extern void RADEONDoPrepareCopyMMIO(ScrnInfoPtr pScrn,
+ CARD32 src_pitch_offset,
+ CARD32 dst_pitch_offset,
+ CARD32 datatype, int rop,
+ Pixel planemask);
#endif
-#ifdef USE_XAA
-extern void RADEONAccelInitMMIO(ScreenPtr pScreen, XAAInfoRecPtr a);
-#endif
-extern void RADEONEngineInit(ScrnInfoPtr pScrn);
-extern Bool RADEONCursorInit(ScreenPtr pScreen);
-extern Bool RADEONDGAInit(ScreenPtr pScreen);
-
-extern void RADEONInit3DEngine(ScrnInfoPtr pScrn);
-
-extern int RADEONMinBits(int val);
-
-extern void RADEONInitVideo(ScreenPtr pScreen);
-extern void RADEONResetVideo(ScrnInfoPtr pScrn);
-extern void R300CGWorkaround(ScrnInfoPtr pScrn);
-
-extern void RADEONPllErrataAfterIndex(RADEONInfoPtr info);
-extern void RADEONPllErrataAfterData(RADEONInfoPtr info);
-
-extern Bool RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10);
-extern Bool RADEONGetConnectorInfoFromBIOS (ScrnInfoPtr pScrn);
-extern Bool RADEONGetClockInfoFromBIOS (ScrnInfoPtr pScrn);
-extern Bool RADEONGetLVDSInfoFromBIOS (xf86OutputPtr output);
-extern Bool RADEONGetTMDSInfoFromBIOS (xf86OutputPtr output);
-extern Bool RADEONGetTVInfoFromBIOS (xf86OutputPtr output);
-extern Bool RADEONGetDAC2InfoFromBIOS (xf86OutputPtr output);
-extern Bool RADEONGetHardCodedEDIDFromBIOS (xf86OutputPtr output);
-
-extern void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn,
- RADEONSavePtr restore);
-extern void RADEONRestoreCrtcRegisters(ScrnInfoPtr pScrn,
- RADEONSavePtr restore);
-extern void RADEONRestoreDACRegisters(ScrnInfoPtr pScrn,
- RADEONSavePtr restore);
-extern void RADEONRestoreFPRegisters(ScrnInfoPtr pScrn,
- RADEONSavePtr restore);
-extern void RADEONRestoreFP2Registers(ScrnInfoPtr pScrn,
- RADEONSavePtr restore);
-extern void RADEONRestoreLVDSRegisters(ScrnInfoPtr pScrn,
- RADEONSavePtr restore);
-extern void RADEONRestoreRMXRegisters(ScrnInfoPtr pScrn,
- RADEONSavePtr restore);
-extern void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn,
- RADEONSavePtr restore);
-extern void RADEONRestoreCrtc2Registers(ScrnInfoPtr pScrn,
- RADEONSavePtr restore);
-extern void RADEONRestorePLL2Registers(ScrnInfoPtr pScrn,
- RADEONSavePtr restore);
-
-extern void RADEONInitDispBandwidth(ScrnInfoPtr pScrn);
-extern Bool RADEONI2cInit(ScrnInfoPtr pScrn);
-extern Bool RADEONSetupConnectors(ScrnInfoPtr pScrn);
-extern void RADEONPrintPortMap(ScrnInfoPtr pScrn);
-extern void RADEONDisableDisplays(ScrnInfoPtr pScrn);
-extern void RADEONGetPanelInfo(ScrnInfoPtr pScrn);
-extern void RADEONUnblank(ScrnInfoPtr pScrn);
-extern void RADEONUnblank(ScrnInfoPtr pScrn);
-extern void RADEONBlank(ScrnInfoPtr pScrn);
-extern Bool RADEONSetTiling(ScrnInfoPtr pScrn);
-extern Bool RADEONAllocateControllers(ScrnInfoPtr pScrn, int mask);
-extern Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn);
-extern void RADEONSetPitch (ScrnInfoPtr pScrn);
-extern void RADEONUpdateHVPosition(xf86OutputPtr output, DisplayModePtr mode);
-
-extern DisplayModePtr
-RADEONProbeOutputModes(xf86OutputPtr output);
-
-extern Bool
-RADEONDVOReadByte(I2CDevPtr dvo, int addr, CARD8 *ch);
-extern Bool
-RADEONDVOWriteByte(I2CDevPtr dvo, int addr, CARD8 ch);
-extern Bool
-RADEONGetExtTMDSInfoFromBIOS (xf86OutputPtr output);
-extern Bool
-RADEONInitExtTMDSInfoFromBIOS (xf86OutputPtr output);
-
-extern RADEONI2CBusRec
-legacy_setup_i2c_bus(int ddc_line);
-extern RADEONI2CBusRec
-atom_setup_i2c_bus(int ddc_line);
-
-extern void
-radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y);
-extern void
-radeon_crtc_show_cursor (xf86CrtcPtr crtc);
-extern void
-radeon_crtc_hide_cursor (xf86CrtcPtr crtc);
-extern void
-radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y);
-extern void
-radeon_crtc_set_cursor_colors (xf86CrtcPtr crtc, int bg, int fg);
-extern void
-radeon_crtc_load_cursor_argb (xf86CrtcPtr crtc, CARD32 *image);
-extern void
-radeon_crtc_load_lut(xf86CrtcPtr crtc);
+#if defined(XF86DRI) && defined(USE_EXA)
+/* radeon_exa.c */
+extern Bool RADEONGetDatatypeBpp(int bpp, CARD32 *type);
+extern Bool RADEONGetPixmapOffsetPitch(PixmapPtr pPix,
+ CARD32 *pitch_offset);
+extern unsigned long long RADEONTexOffsetStart(PixmapPtr pPix);
+#endif
+/* radeon_modes.c */
+extern void RADEONSetPitch(ScrnInfoPtr pScrn);
+extern DisplayModePtr RADEONProbeOutputModes(xf86OutputPtr output);
+
+/* radeon_output.c */
+extern RADEONI2CBusRec atom_setup_i2c_bus(int ddc_line);
+extern RADEONI2CBusRec legacy_setup_i2c_bus(int ddc_line);
+extern void RADEONConnectorFindMonitor(ScrnInfoPtr pScrn, xf86OutputPtr output);
+extern void RADEONGetPanelInfo(ScrnInfoPtr pScrn);
+extern void RADEONInitConnector(xf86OutputPtr output);
+extern void RADEONPrintPortMap(ScrnInfoPtr pScrn);
+extern void RADEONSetOutputType(ScrnInfoPtr pScrn,
+ RADEONOutputPrivatePtr radeon_output);
+extern Bool RADEONSetupConnectors(ScrnInfoPtr pScrn);
+
+/* radeon_tv.c */
+extern void RADEONSaveTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
extern void RADEONAdjustCrtcRegistersForTV(ScrnInfoPtr pScrn, RADEONSavePtr save,
DisplayModePtr mode, xf86OutputPtr output);
extern void RADEONAdjustPLLRegistersForTV(ScrnInfoPtr pScrn, RADEONSavePtr save,
@@ -917,47 +974,18 @@ extern void RADEONAdjustPLL2RegistersForTV(ScrnInfoPtr pScrn, RADEONSavePtr save
DisplayModePtr mode, xf86OutputPtr output);
extern void RADEONInitTVRegisters(xf86OutputPtr output, RADEONSavePtr save,
DisplayModePtr mode, BOOL IsPrimary);
-
extern void RADEONRestoreTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore);
+extern void RADEONUpdateHVPosition(xf86OutputPtr output, DisplayModePtr mode);
-extern void RADEONComputePLL(RADEONPLLPtr pll, unsigned long freq, CARD32 *chosen_dot_clock_freq,
- CARD32 *chosen_feedback_div, CARD32 *chosen_reference_div,
- CARD32 *chosen_post_div, int flags);
+/* radeon_video.c */
+extern void RADEONInitVideo(ScreenPtr pScreen);
+extern void RADEONResetVideo(ScrnInfoPtr pScrn);
#ifdef XF86DRI
-#ifdef USE_XAA
-extern void RADEONAccelInitCP(ScreenPtr pScreen, XAAInfoRecPtr a);
-#endif
-extern Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn);
-extern Bool RADEONDRIScreenInit(ScreenPtr pScreen);
-extern void RADEONDRICloseScreen(ScreenPtr pScreen);
-extern void RADEONDRIResume(ScreenPtr pScreen);
-extern Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen);
-extern void RADEONDRIAllocatePCIGARTTable(ScreenPtr pScreen);
-extern int RADEONDRIGetPciAperTableSize(ScrnInfoPtr pScrn);
-extern void RADEONDRIStop(ScreenPtr pScreen);
-
-extern drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn);
-extern void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard);
-extern void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn);
-extern int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info);
-extern Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on);
-
-extern void RADEONHostDataParams(ScrnInfoPtr pScrn, CARD8 *dst,
- CARD32 pitch, int cpp,
- CARD32 *dstPitchOffset, int *x, int *y);
-extern CARD8* RADEONHostDataBlit(ScrnInfoPtr pScrn, unsigned int cpp,
- unsigned int w, CARD32 dstPitchOff,
- CARD32 *bufPitch, int x, int *y,
- unsigned int *h, unsigned int *hpass);
-extern void RADEONHostDataBlitCopyPass(ScrnInfoPtr pScrn,
- unsigned int bpp,
- CARD8 *dst, CARD8 *src,
- unsigned int hpass,
- unsigned int dstPitch,
- unsigned int srcPitch);
-extern void RADEONCopySwap(CARD8 *dst, CARD8 *src, unsigned int size,
- int swap);
+# ifdef USE_XAA
+/* radeon_accelfuncs.c */
+extern void RADEONAccelInitCP(ScreenPtr pScreen, XAAInfoRecPtr a);
+# endif
#define RADEONCP_START(pScrn, info) \
do { \
diff --git a/src/radeon_atomwrapper.c b/src/radeon_atomwrapper.c
index 259366c..3e7ae01 100644
--- a/src/radeon_atomwrapper.c
+++ b/src/radeon_atomwrapper.c
@@ -27,7 +27,7 @@
# include "config.h"
#endif
-//#include "radeon_atomwrapper.h"
+#include "radeon_atomwrapper.h"
#define INT32 INT32
#include "CD_Common_Types.h"
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index b2c6e13..e2d31eb 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -57,12 +57,7 @@ extern void atombios_crtc_mode_set(xf86CrtcPtr crtc,
DisplayModePtr mode,
DisplayModePtr adjusted_mode,
int x, int y);
-extern void legacy_crtc_mode_set(xf86CrtcPtr crtc,
- DisplayModePtr mode,
- DisplayModePtr adjusted_mode,
- int x, int y);
extern void atombios_crtc_dpms(xf86CrtcPtr crtc, int mode);
-extern void legacy_crtc_dpms(xf86CrtcPtr crtc, int mode);
static void
radeon_crtc_dpms(xf86CrtcPtr crtc, int mode)
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index bf7ef8c..3d33d47 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -128,35 +128,6 @@ static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
static void
RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore);
-extern DisplayModePtr
-RADEONCrtcFindClosestMode(xf86CrtcPtr crtc, DisplayModePtr pMode);
-
-extern void
-RADEONSaveCommonRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
-extern void
-RADEONSaveCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
-extern void
-RADEONSaveCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save);
-extern void
-RADEONSavePLLRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
-extern void
-RADEONSavePLL2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save);
-extern void
-RADEONSaveFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
-extern void
-RADEONSaveDACRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
-extern void
-RADEONSaveTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
-
-#ifdef USE_XAA
-#ifdef XF86DRI
-extern Bool
-RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen);
-#endif /* XF86DRI */
-extern Bool
-RADEONSetupMemXAA(int scrnIndex, ScreenPtr pScreen);
-#endif /* USE_XAA */
-
static const OptionInfoRec RADEONOptions[] = {
{ OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE },
@@ -440,6 +411,9 @@ static Bool RADEONUnmapMMIO(ScrnInfoPtr pScrn)
/* Memory map the frame buffer. Used by RADEONMapMem, below. */
static Bool RADEONMapFB(ScrnInfoPtr pScrn)
{
+#ifdef XSERVER_LIBPCIACCESS
+ int err;
+#endif
RADEONInfoPtr info = RADEONPTR(pScrn);
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
@@ -457,7 +431,7 @@ static Bool RADEONMapFB(ScrnInfoPtr pScrn)
#else
- int err = pci_device_map_range(info->PciInfo,
+ err = pci_device_map_range(info->PciInfo,
info->LinearAddr,
info->FbMapSize,
PCI_DEV_MAP_FLAG_WRITABLE |
@@ -637,7 +611,7 @@ void RADEONOUTMC(ScrnInfoPtr pScrn, int addr, CARD32 data)
}
}
-Bool avivo_get_mc_idle(ScrnInfoPtr pScrn)
+static Bool avivo_get_mc_idle(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -665,7 +639,7 @@ Bool avivo_get_mc_idle(ScrnInfoPtr pScrn)
#define LOC_FB 0x1
#define LOC_AGP 0x2
-void radeon_write_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, CARD32 fb_loc, CARD32 agp_loc, CARD32 agp_loc_hi)
+static void radeon_write_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, CARD32 fb_loc, CARD32 agp_loc, CARD32 agp_loc_hi)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
@@ -703,7 +677,7 @@ void radeon_write_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, CARD32 fb_loc,
}
}
-void radeon_read_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, CARD32 *fb_loc, CARD32 *agp_loc, CARD32 *agp_loc_hi)
+static void radeon_read_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, CARD32 *fb_loc, CARD32 *agp_loc, CARD32 *agp_loc_hi)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
@@ -3143,12 +3117,14 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
RADEONRestoreMemMapRegisters(pScrn, info->ModeReg);
/* empty the surfaces */
- unsigned char *RADEONMMIO = info->MMIO;
- unsigned int j;
- for (j = 0; j < 8; j++) {
- OUTREG(RADEON_SURFACE0_INFO + 16 * j, 0);
- OUTREG(RADEON_SURFACE0_LOWER_BOUND + 16 * j, 0);
- OUTREG(RADEON_SURFACE0_UPPER_BOUND + 16 * j, 0);
+ {
+ unsigned char *RADEONMMIO = info->MMIO;
+ unsigned int j;
+ for (j = 0; j < 8; j++) {
+ OUTREG(RADEON_SURFACE0_INFO + 16 * j, 0);
+ OUTREG(RADEON_SURFACE0_LOWER_BOUND + 16 * j, 0);
+ OUTREG(RADEON_SURFACE0_UPPER_BOUND + 16 * j, 0);
+ }
}
#ifdef XF86DRI
@@ -4031,7 +4007,7 @@ static void RADEONSavePalette(ScrnInfoPtr pScrn, RADEONSavePtr save)
}
#endif
-void
+static void
avivo_save(ScrnInfoPtr pScrn, RADEONSavePtr save)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -4336,7 +4312,7 @@ avivo_save(ScrnInfoPtr pScrn, RADEONSavePtr save)
}
-void
+static void
avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -4636,7 +4612,7 @@ avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
OUTREG(AVIVO_D2VGA_CONTROL, state->vga2_cntl);
}
-void avivo_restore_vga_regs(ScrnInfoPtr pScrn, RADEONSavePtr restore)
+static void avivo_restore_vga_regs(ScrnInfoPtr pScrn, RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
@@ -4760,7 +4736,7 @@ static void RADEONSave(ScrnInfoPtr pScrn)
}
/* Restore the original (text) mode */
-void RADEONRestore(ScrnInfoPtr pScrn)
+static void RADEONRestore(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 57d3bc1..19ce36d 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -178,15 +178,9 @@ static Bool AVIVOI2CDoLock(xf86OutputPtr output, int lock_state);
extern void atombios_output_mode_set(xf86OutputPtr output,
DisplayModePtr mode,
DisplayModePtr adjusted_mode);
-extern void legacy_output_mode_set(xf86OutputPtr output,
- DisplayModePtr mode,
- DisplayModePtr adjusted_mode);
extern void atombios_output_dpms(xf86OutputPtr output, int mode);
-extern void legacy_output_dpms(xf86OutputPtr output, int mode);
extern RADEONMonitorType atombios_dac_detect(ScrnInfoPtr pScrn, xf86OutputPtr output);
-extern RADEONMonitorType legacy_dac_detect(ScrnInfoPtr pScrn, xf86OutputPtr output);
extern int atombios_external_tmds_setup(xf86OutputPtr output, DisplayModePtr mode);
-extern I2CDevPtr RADEONDVODeviceInit(I2CBusPtr b, I2CSlaveAddr addr);
static void
radeon_bios_output_dpms(xf86OutputPtr output, int mode);
static void
@@ -2807,11 +2801,12 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn)
for (i = 0 ; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
if (info->BiosConnector[i].valid) {
+ RADEONOutputPrivatePtr radeon_output;
if (info->BiosConnector[i].ConnectorType == CONNECTOR_NONE)
continue;
- RADEONOutputPrivatePtr radeon_output = xnfcalloc(sizeof(RADEONOutputPrivateRec), 1);
+ radeon_output = xnfcalloc(sizeof(RADEONOutputPrivateRec), 1);
if (!radeon_output) {
return FALSE;
}
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index 7702591..d4a3343 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -80,10 +80,9 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
CARD32 txenable, colorpitch;
CARD32 blendcntl;
int dstxoff, dstyoff, pixel_shift;
- VIDEO_PREAMBLE();
-
BoxPtr pBox = REGION_RECTS(&pPriv->clip);
int nBox = REGION_NUM_RECTS(&pPriv->clip);
+ VIDEO_PREAMBLE();
pixel_shift = pPixmap->drawable.bitsPerPixel >> 4;
diff --git a/src/theatre_detect.c b/src/theatre_detect.c
index d4c6ce8..79dcfe4 100644
--- a/src/theatre_detect.c
+++ b/src/theatre_detect.c
@@ -43,6 +43,7 @@
#include "generic_bus.h"
#include "theatre.h"
#include "theatre_reg.h"
+#include "theatre_detect.h"
static Bool theatre_read(TheatrePtr t,CARD32 reg, CARD32 *data)
{
commit 55e446b5bc091e6c7b3c2e9ae20b45130555c246
Author: Alex Deucher <alex@samba.(none)>
Date: Wed Mar 19 13:15:32 2008 -0400
R3xx/R5xx: Make sure to clamp the output of the FS
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index c881a28..707e9fc 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -1540,7 +1540,8 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
R300_ALU_RGB_SEL_C(R300_ALU_RGB_0_0) |
R300_ALU_RGB_MOD_C(R300_ALU_RGB_MOD_NOP) |
R300_ALU_RGB_OP(R300_ALU_RGB_OP_MAD) |
- R300_ALU_RGB_OMOD(R300_ALU_RGB_OMOD_NONE)));
+ R300_ALU_RGB_OMOD(R300_ALU_RGB_OMOD_NONE) |
+ R300_ALU_RGB_CLAMP));
OUT_ACCEL_REG(R300_US_ALU_ALPHA_ADDR_0,
(R300_ALU_ALPHA_ADDR0(0) |
R300_ALU_ALPHA_ADDR1(1) |
@@ -1557,7 +1558,8 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
R300_ALU_ALPHA_SEL_C(R300_ALU_ALPHA_0_0) |
R300_ALU_ALPHA_MOD_C(R300_ALU_ALPHA_MOD_NOP) |
R300_ALU_ALPHA_OP(R300_ALU_ALPHA_OP_MAD) |
- R300_ALU_ALPHA_OMOD(R300_ALU_ALPHA_OMOD_NONE)));
+ R300_ALU_ALPHA_OMOD(R300_ALU_ALPHA_OMOD_NONE) |
+ R300_ALU_ALPHA_CLAMP));
FINISH_ACCEL();
} else {
CARD32 output_fmt;
@@ -1771,7 +1773,9 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
R500_INST_RGB_WMASK_R |
R500_INST_RGB_WMASK_G |
R500_INST_RGB_WMASK_B |
- R500_INST_ALPHA_WMASK));
+ R500_INST_ALPHA_WMASK |
+ R500_INST_RGB_CLAMP |
+ R500_INST_ALPHA_CLAMP));
OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
R500_TEX_INST_LD |
@@ -1803,7 +1807,9 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
R500_INST_RGB_WMASK_R |
R500_INST_RGB_WMASK_G |
R500_INST_RGB_WMASK_B |
- R500_INST_ALPHA_WMASK));
+ R500_INST_ALPHA_WMASK |
+ R500_INST_RGB_CLAMP |
+ R500_INST_ALPHA_CLAMP));
OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(1) |
R500_TEX_INST_LD |
@@ -1838,7 +1844,9 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
R500_INST_RGB_WMASK_R |
R500_INST_RGB_WMASK_G |
R500_INST_RGB_WMASK_B |
- R500_INST_ALPHA_WMASK));
+ R500_INST_ALPHA_WMASK |
+ R500_INST_RGB_CLAMP |
+ R500_INST_ALPHA_CLAMP));
OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
R500_TEX_INST_LD |
@@ -1873,7 +1881,9 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
R500_INST_RGB_OMASK_R |
R500_INST_RGB_OMASK_G |
R500_INST_RGB_OMASK_B |
- R500_INST_ALPHA_OMASK));
+ R500_INST_ALPHA_OMASK |
+ R500_INST_RGB_CLAMP |
+ R500_INST_ALPHA_CLAMP));
OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
R500_RGB_ADDR1(1) |
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index 6a2b8e1..7702591 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -414,7 +414,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R300_ALU_RGB_SEL_C(R300_ALU_RGB_0_0) |
R300_ALU_RGB_MOD_C(R300_ALU_RGB_MOD_NOP) |
R300_ALU_RGB_OP(R300_ALU_RGB_OP_MAD) |
- R300_ALU_RGB_OMOD(R300_ALU_RGB_OMOD_NONE)));
+ R300_ALU_RGB_OMOD(R300_ALU_RGB_OMOD_NONE) |
+ R300_ALU_RGB_CLAMP));
OUT_VIDEO_REG(R300_US_ALU_ALPHA_ADDR_0,
(R300_ALU_ALPHA_ADDR0(0) |
R300_ALU_ALPHA_ADDR1(0) |
@@ -432,7 +433,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R300_ALU_ALPHA_SEL_C(R300_ALU_ALPHA_0_0) |
R300_ALU_ALPHA_MOD_C(R300_ALU_ALPHA_MOD_NOP) |
R300_ALU_ALPHA_OP(R300_ALU_ALPHA_OP_MAD) |
- R300_ALU_ALPHA_OMOD(R300_ALU_ALPHA_OMOD_NONE)));
+ R300_ALU_ALPHA_OMOD(R300_ALU_ALPHA_OMOD_NONE) |
+ R300_ALU_ALPHA_CLAMP));
FINISH_VIDEO();
} else {
BEGIN_VIDEO(23);
@@ -461,7 +463,9 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R500_INST_RGB_WMASK_R |
R500_INST_RGB_WMASK_G |
R500_INST_RGB_WMASK_B |
- R500_INST_ALPHA_WMASK));
+ R500_INST_ALPHA_WMASK |
+ R500_INST_RGB_CLAMP |
+ R500_INST_ALPHA_CLAMP));
OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
R500_TEX_INST_LD |
@@ -496,7 +500,9 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R500_INST_RGB_OMASK_R |
R500_INST_RGB_OMASK_G |
R500_INST_RGB_OMASK_B |
- R500_INST_ALPHA_OMASK));
+ R500_INST_ALPHA_OMASK |
+ R500_INST_RGB_CLAMP |
+ R500_INST_ALPHA_CLAMP));
OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
R500_RGB_ADDR1(0) |
commit b6aa4279cbe68cc8e4523795e9714fb798b62d98
Author: Alex Deucher <alex@samba.(none)>
Date: Wed Mar 19 12:45:01 2008 -0400
R5xx: bump textured video limits to 4096
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index f2f38c3..c881a28 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -345,7 +345,7 @@ RADEONGetDrawablePixmap(DrawablePtr pDrawable)
return pDrawable->pScreen->GetWindowPixmap((WindowPtr)pDrawable);
else
return (PixmapPtr)pDrawable;
-}
+}
static Bool R100CheckComposite(int op, PicturePtr pSrcPicture,
PicturePtr pMaskPicture, PicturePtr pDstPicture)
@@ -435,7 +435,7 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op,
RADEONInit3DEngine(pScrn);
if (!RADEONGetDestFormat(pDstPicture, &dst_format))
- return FALSE;
+ return FALSE;
pixel_shift = pDst->drawable.bitsPerPixel >> 4;
diff --git a/src/radeon_textured_video.c b/src/radeon_textured_video.c
index 05dd20e..0a6598d 100644
--- a/src/radeon_textured_video.c
+++ b/src/radeon_textured_video.c
@@ -46,6 +46,9 @@
#define IMAGE_MAX_WIDTH 2048
#define IMAGE_MAX_HEIGHT 2048
+#define IMAGE_MAX_WIDTH_R500 4096
+#define IMAGE_MAX_HEIGHT_R500 4096
+
static Bool
RADEONTilingEnabled(ScrnInfoPtr pScrn, PixmapPtr pPix)
{
@@ -300,6 +303,16 @@ static XF86VideoEncodingRec DummyEncoding[1] =
}
};
+static XF86VideoEncodingRec DummyEncodingR500[1] =
+{
+ {
+ 0,
+ "XV_IMAGE",
+ IMAGE_MAX_WIDTH_R500, IMAGE_MAX_HEIGHT_R500,
+ {1, 1}
+ }
+};
+
#define NUM_FORMATS 3
static XF86VideoFormatRec Formats[NUM_FORMATS] =
@@ -326,6 +339,8 @@ static XF86ImageRec Images[NUM_IMAGES] =
XF86VideoAdaptorPtr
RADEONSetupImageTexturedVideo(ScreenPtr pScreen)
Reply to: