Package: libgl1-mesa-dri
Version: 7.0.1-1
Severity: wishlist
Tags: patch
*** Please type your report below this line ***
Using any gl command (like glxinfo, glxgears) on kernel 2.6.22.x and mesa
6.5.2-7/ 7.0.1-1 results in X.org crashing with an Intel G33 onboard graphics
card (driver "i810" and "intel" produce the same issues).
00:02.0 VGA compatible controller [0300]: Intel Corporation Unknown device [8086:29c2] (rev 02) (prog-if 00 [VGA])
Subsystem: Giga-byte Technology Unknown device [1458:d000]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 0: Memory at f2200000 (32-bit, non-prefetchable) [size=512K]
Region 1: I/O ports at e200 [size=8]
The following backtrace appears in Xorg.log [1], on a kernel (2.6.22) whose
drm already supports dri for Intel G33 PCI IDs [2]:
[...]
Backtrace:
0: /usr/bin/X(xf86SigHandler+0x6d) [0x48586d]
1: /lib/libc.so.6 [0x2ba18ccf0680]
2: /usr/lib/dri/i915_dri.so [0x2ba19f78ab8e]
3: /usr/lib/xorg/modules/extensions//libglx.so [0x2ba18dee6ff1]
4: /usr/lib/xorg/modules/extensions//libglx.so(DoMakeCurrent+0x369) [0x2ba18deb7259]
5: /usr/lib/xorg/modules/extensions//libglx.so [0x2ba18deb8f3d]
6: /usr/bin/X(Dispatch+0x1cb) [0x450dab]
7: /usr/bin/X(main+0x45d) [0x439e8d]
8: /lib/libc.so.6(__libc_start_main+0xf4) [0x2ba18ccdcb24]
9: /usr/bin/X(FontFileCompleteXLFD+0x229) [0x439189]
Fatal server error:
Caught signal 11. Server aborting
[...]
stracing glxinfo results in the following output [3]:
[...]
stat64("/dev/dri", {st_mode=S_IFDIR|0755, st_size=60, ...}) = 0
stat64("/dev/dri/card0", {st_mode=S_IFCHR|0666, st_rdev=makedev(226, 0), ...}) = 0
open("/dev/dri/card0", O_RDWR|O_LARGEFILE) = 4
ioctl(4, DECODER_SET_PICTURE, 0xbfd0eba0) = -1 EACCES (Permission denied)
ioctl(4, DECODER_GET_CAPABILITIES, 0xbfd0eba4) = 0
ioctl(4, DECODER_GET_CAPABILITIES, 0xbfd0eba4) = 0
ioctl(4, DECODER_GET_STATUS or DEVFSDIOC_SET_EVENT_MASK, 0xbfd0eeec) = 0
ioctl(4, DEVFSDIOC_GET_PROTO_REV, 0x8056a40) = 0
ioctl(4, DEVFSDIOC_GET_PROTO_REV, 0x8056a40) = 0
write(3, "\200\v\3\0\0\0\0\0\35\0\0\0", 12) = 12
read(3, "\1$\21\0\0\0\0\0\1\0\0\0000$\322\277\0\20\0\0\0\0\0\0\0"..., 32) = 32
write(3, "\200\4\2\0\0\0\0\0", 8) = 8
read(3, "\1$\22\0\1\0\0\0\1\0\0\0\10\0\0\0\0\0\0\0\4\0\0\0\0\0\0"..., 32) = 32
readv(3, [{"i915", 4}, {"", 0}], 2) = 4
write(3, "\200\n\2\0\0\0\0\0", 8) = 8
read(3, "\1$\23\0\36\0\0\0\0\0\4\340\0\0\0\0\0\0\0\0\0\0\0\1\0 "..., 32) = 32
read(3, "\0\0 \362\0\0\10\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0"..., 120) = 120
mmap2(NULL, 16777216, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0xe0040) = 0xb696a000
mmap2(NULL, 8192, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0xf8d92) = 0xb7eec000
mmap2(NULL, 16777216, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0x2c008) = 0xb596a000
mmap2(NULL, 16777216, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0xe5000) = 0xb496a000
mmap2(NULL, 16777216, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0xe6000) = 0xb396a000
mmap2(NULL, 33554432, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0xe9000) = 0xb196a000
ioctl(4, 0xc0086446, 0xbfd0ee64) = 0
ioctl(4, 0xc0086446, 0xbfd0ee64) = 0
futex(0xb7ee3a44, FUTEX_WAKE, 2147483647) = 0
mmap2(NULL, 262144, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0xb192a000
write(3, "\220\24\f\3\1\0\0\0\4\0\0\0\36\f\0\0GL_ARB_depth_tex"..., 3200) = 3200
read(3, 0xbfd0f16c, 32) = -1 EAGAIN (Resource temporarily unavailable)
poll([{fd=3, events=POLLIN, revents=POLLIN}], 1, -1) = 1
read(3, "\1$\27\0\0\0\0\0\2\0\0\0000$\322\277\30\0\0\0000\262I\10"..., 32) = 32
write(2, "Unrecognized deviceID 29c2\n", 27) = 27
write(3, "\200\6\3\0\0\0\0\0\3\0`\2\220\3\6\0\4\0`\2$\0\0\0\0\0\0"..., 52) = 52
read(3, 0xbfd0f1dc, 32) = -1 EAGAIN (Resource temporarily unavailable)
poll([{fd=3, events=POLLIN, revents=POLLIN|POLLHUP}], 1, -1) = 1
read(3, "", 32) = 0
write(2, "X connection to :0.0 broken (exp"..., 65) = 65
exit_group(1)
The required support for Intel 945GME, G33, Q33 and Q35 chipset has been
added to upstream mesa after 7.0.1 was released, a git diff which applies
to mesa 7.0.1-1 can be found in the mesa upstream git at freedesktop.org.
The 945GME [4] support is a precondition for applying the G33, Q33, and
Q35 [5] patch, as it affects the same lines and because of slight
reformatting of the affected hunks.
commit ad6351a994fd14af9d07da4f06837a7f9b9d0de4
Author: Wang Zhenyu <zhenyu.z.wang@intel.com>
Date: Wed May 30 16:18:26 2007 +0800
i915tex: Add support for 945GME
and
commit 8331d9d7aa7cde7126d38d4e1eb5fe8a168077f3
Author: Wang Zhenyu <zhenyu.z.wang@intel.com>
Date: Tue Jun 5 11:42:43 2007 -0700
Add PCI IDs for the G33, Q33, and Q35 chipsets.
As it just adds the PCI ID definitions to mesa and doesn't actually change
the code, the impact on general mesa stability seems to be minimal, closer
inspections between mesa 7.0.1 and the affected commits don't suggest
further problems.
Most of the debugging has been conducted on mesa 6.5.2-7, but was confirmed
to be still present in mesa 7.0.1~rc2-1 and the final 7.0.1-1 from unstable,
further raw logs can be found here [6]. Adding the mentioned patches and
rebuilding mesa 7.0.1-1 fixes the mentioned issues and using OpenGL becomes
stable on i386 and x86_64.
Thanks a lot for your efforts
Stefan Lippers-Hollmann
[1] http://sidux.com/slh/mesa/Xorg.0.log
[2] http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=dc7a93190c21edbf3ed23e678ad04f852b9cff28
[3] http://sidux.com/slh/mesa/strace_glxinfo.log
[4] http://gitweb.freedesktop.org/?p=mesa/mesa.git;a=commit;h=a74eec5af5397b612d60dd4b0d81666027f19bb0
(i915tex: Add support for 945GME)
[5] http://gitweb.freedesktop.org/?p=mesa/mesa.git;a=commit;h=8331d9d7aa7cde7126d38d4e1eb5fe8a168077f3
(Add PCI IDs for the G33, Q33, and Q35 chipsets)
[6] http://sidux.com/slh/mesa/
-- System Information:
Debian Release: lenny/sid
APT prefers unstable
APT policy: (500, 'unstable')
Architecture: amd64 (x86_64)
Kernel: Linux 2.6.22.2-slh64-smp-1 (SMP w/2 CPU cores; PREEMPT)
Locale: LANG=de_DE.UTF-8, LC_CTYPE=de_DE.UTF-8 (charmap=UTF-8)
Shell: /bin/sh linked to /bin/bash
Versions of packages libgl1-mesa-dri depends on:
ii libc6 2.6.1-1 GNU C Library: Shared libraries
ii libdrm2 2.3.0-4 Userspace interface to kernel DRM
ii libexpat1 1.95.8-4 XML parsing C library - runtime li
ii libgl1-mesa-glx 7.0.1-1 A free implementation of the OpenG
libgl1-mesa-dri recommends no packages.
-- no debconf information
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index 9f0c949..a19d4b6 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -491,12 +491,19 @@ static void i915SetTexImages( i915ContextPtr i915,
abort();
}
-
- if (i915->intel.intelScreen->deviceID == PCI_CHIP_I945_G ||
- i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GM)
- i945LayoutTextureImages( i915, tObj );
- else
- i915LayoutTextureImages( i915, tObj );
+ switch (i915->intel.intelScreen->deviceID) {
+ case PCI_CHIP_I945_G:
+ case PCI_CHIP_I945_GM:
+ case PCI_CHIP_I945_GME:
+ case PCI_CHIP_G33_G:
+ case PCI_CHIP_Q33_G:
+ case PCI_CHIP_Q35_G:
+ i945LayoutTextureImages( i915, tObj );
+ break;
+ default:
+ i915LayoutTextureImages( i915, tObj );
+ break;
+ }
t->Setup[I915_TEXREG_MS3] =
(((tObj->Image[0][t->intel.base.firstLevel]->Height - 1) << MS3_HEIGHT_SHIFT) |
diff --git a/src/mesa/drivers/dri/i915/intel_context.c b/src/mesa/drivers/dri/i915/intel_context.c
index e747fc6..11c23f2 100644
--- a/src/mesa/drivers/dri/i915/intel_context.c
+++ b/src/mesa/drivers/dri/i915/intel_context.c
@@ -123,6 +123,14 @@ const GLubyte *intelGetString( GLcontext *ctx, GLenum name )
chipset = "Intel(R) 945G"; break;
case PCI_CHIP_I945_GM:
chipset = "Intel(R) 945GM"; break;
+ case PCI_CHIP_I945_GME:
+ chipset = "Intel(R) 945GME"; break;
+ case PCI_CHIP_G33_G:
+ chipset = "Intel(R) G33"; break;
+ case PCI_CHIP_Q35_G:
+ chipset = "Intel(R) Q35"; break;
+ case PCI_CHIP_Q33_G:
+ chipset = "Intel(R) Q33"; break;
default:
chipset = "Unknown Intel Chipset"; break;
}
diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h
index c48b074..3b50107 100644
--- a/src/mesa/drivers/dri/i915/intel_context.h
+++ b/src/mesa/drivers/dri/i915/intel_context.h
@@ -454,6 +454,10 @@ extern int INTEL_DEBUG;
#define PCI_CHIP_I915_GM 0x2592
#define PCI_CHIP_I945_G 0x2772
#define PCI_CHIP_I945_GM 0x27A2
+#define PCI_CHIP_I945_GME 0x27AE
+#define PCI_CHIP_G33_G 0x29C2
+#define PCI_CHIP_Q35_G 0x29B2
+#define PCI_CHIP_Q33_G 0x29D2
/* ================================================================
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index 67e176a..ca8610b 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -514,6 +514,10 @@ static GLboolean intelCreateContext( const __GLcontextModes *mesaVis,
case PCI_CHIP_I915_GM:
case PCI_CHIP_I945_G:
case PCI_CHIP_I945_GM:
+ case PCI_CHIP_I945_GME:
+ case PCI_CHIP_G33_G:
+ case PCI_CHIP_Q35_G:
+ case PCI_CHIP_Q33_G:
return i915CreateContext( mesaVis, driContextPriv,
sharedContextPrivate );
diff --git a/src/mesa/drivers/dri/i915/intel_tex.c b/src/mesa/drivers/dri/i915/intel_tex.c
index 98ddc79..5bd2806 100644
--- a/src/mesa/drivers/dri/i915/intel_tex.c
+++ b/src/mesa/drivers/dri/i915/intel_tex.c
@@ -677,7 +677,11 @@ static void intelUploadTexImage( intelContextPtr intel,
/* Time for another vtbl entry:
*/
else if (intel->intelScreen->deviceID == PCI_CHIP_I945_G ||
- intel->intelScreen->deviceID == PCI_CHIP_I945_GM) {
+ intel->intelScreen->deviceID == PCI_CHIP_I945_GM ||
+ intel->intelScreen->deviceID == PCI_CHIP_I945_GME ||
+ intel->intelScreen->deviceID == PCI_CHIP_G33_G ||
+ intel->intelScreen->deviceID == PCI_CHIP_Q33_G ||
+ intel->intelScreen->deviceID == PCI_CHIP_Q35_G) {
GLuint row_len = image->Width * image->TexFormat->TexelBytes;
GLubyte *dst = (GLubyte *)(t->BufAddr + offset);
GLubyte *src = (GLubyte *)image->Data;
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