Re: XFree86 on mips cleanup patch
On Wed, Jul 25, 2001 at 09:38:13PM +0200, Guido Guenther wrote:
> Hi,
> the attached patch removes some previous workarounds by adding proper
> functions to compiler.h for mips(el). This obsoletes the disabling of
> the ati driver on mips(351) and the int10 module(350) on mipsel as well
> as the mem_barrier patch(353). I've also attached the newport range fix
> for completeness - both are against pre5. So these should be the only
> patches needed to get XFree86 going on mips/mipsel for now.
> -- Guido
Are the below asm functions going to affect other architectures? I don't
see them wrapped in any sort of arch specific defines.
> +#if X_BYTE_ORDER == X_BIG_ENDIAN
> +static __inline__ unsigned int
> +xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
> +{
> + unsigned long addr = ((unsigned long)base) + offset;
> + unsigned int ret;
> +
> + __asm__ __volatile__("lw %0, 0(%1)"
> + : "=r" (ret)
> + : "r" (addr));
> + return ret;
> +}
> +
> +static __inline__ void
> +xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
> + const unsigned int val)
> +{
> + unsigned long addr = ((unsigned long)base) + offset;
> +
> + __asm__ __volatile__("sw %0, 0(%1)"
> + : /* No outputs */
> + : "r" (val), "r" (addr));
> +}
> +#endif
> +__asm__ __volatile__( \
> + "# prevent instructions being moved around\n\t" \
> + ".set\tnoreorder\n\t" \
> + "# 8 nops to fool the R4400 pipeline\n\t" \
> + "nop;nop;nop;nop;nop;nop;nop;nop\n\t" \
> + ".set\treorder" \
> + : /* no output */ \
> + : /* no input */ \
> + : "memory")
> +#define write_mem_barrier() mem_barrier()
--
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/ Ben Collins -- ...on that fantastic voyage... -- Debian GNU/Linux \
` bcollins@debian.org -- bcollins@openldap.org -- bcollins@linux.com '
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