Bug#686949: ITP: fpgatools -- A small independent command line FPGA utilities, no GUI plain C, text-based file formats. convert floorplan from/to bitstream.

To: Wolfgang Spraul <wspraul@q-ag.de>
Cc: 686949@bugs.debian.org, "Peter 'p2' De Schrijver" <p2@debian.org>, Xiangfu Liu <xiangfu@sharism.cc>, timo.lindfors@iki.fi
Subject: Bug#686949: ITP: fpgatools -- A small independent command line FPGA utilities, no GUI plain C, text-based file formats. convert floorplan from/to bitstream.
From: Timo Juhani Lindfors <timo.lindfors@iki.fi>
Date: Tue, 18 Sep 2012 16:01:25 +0300
Message-id: <[🔎] 84sjafmqmy.fsf@sauna.l.org>
Reply-to: Timo Juhani Lindfors <timo.lindfors@iki.fi>, 686949@bugs.debian.org

Hi,

> I had a quick look at the tools. They convert a floorplan description
> into a bitstream and back. However for a complete workflow the
> following bits are missing:
>
> * VHDL/verilog compiler to netlist
> * place and route tool to turn the netlist into a floorplan
>
> Is this correct?

Wolfgang, can you comment on this? You can read the full discussion at

http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=686949


best regards,
Timo Lindfors

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