Re: Makefile question??

[Bob McGowan <bob_mcgowan@symantec.com>]

ISHWAR RATTAN wrote:
> CC   = gcc
> SRCS = a.c b1.c c1.c
> OBJS = $(addsuffix .o, $(basename $(SRCS) .c))
>
> target: $(OBJS)
>     $(CC) $(LDFLAGS) $(OBJS) -o target
>
> somehow make does not like the line that sets up OBJS
> says that no rules to make target found but if replaced
> as
> OBJS = a.o b1.o c1.o
>
> it works!
>
> Any pointers?
> -ishwar

$ basename a.c b1.c c1.c .c
basename: extra operand `c1.c'
Try `basename --help' for more information.
$
$ basename a.c .c
a
$ basename b1.c .c
b1
$ basename c1.c .c
c1

The 'basename' command fails, 'addsufix' gets no arguments, hence 
nothing is in the OBJS variable.

--
Bob McGowan
Symantec, Inc.