On Mon, Oct 20, 2003 at 11:35:13AM -0600, Bob Proulx wrote: > > It isn't right. What it means is that an interrupt was asserted, but by > > the time the hardware got around to telling the CPU, it wasn't there any > > more. IRQ7 is the lowest priority interrupt, and that's where the service > > routine ends up. > > That isn't right either. IRQ7 is not the lowest priority interrupt > and neither do routines just end up there. At least we are both > posting what appears to be bogus information. :-) How do you figure that IRQ7 isn't the lowest priority interrupt? IRQ0 timer tick IRQ1 keyboard IRQ2 chained to IRQ9 | IRQ8 RTC |______IRQ9 chained to IRQ2 IRQ10 free IRQ11 free IRQ12 usually PS/2 port IRQ13 free (used to be the numeric coprocessor) IRQ14 primary IDE IRQ15 secondary IDE IRQ3 secondary serial IRQ4 primary serial IRQ5 free (was the HD interrupt on the XT) IRQ6 floppy disk IRQ7 lpt The whole reason that the architecture has this weirdo interrupt structure is that for the AT, IBM had to get the HD interrupt up to a higher priority than the serial ports. You have to daisy-chain the two 8259's SOMEWHERE. Of course, we don't have motherboards that use 8259A interrupt controllers any more, but the same idea holds. I shouldn't have said that the routine "just ended up there"... that's idiot-level speak. The hardware had an interrupt asserted, but it's not there any more by the time the logic tried to route it. Remember, chained 8259's. So it fell to the bottom of the logic. The kernel, on the other hand, is sitting there saying "huh, there was no interrupt for IRQ7 asserted." -- Marc Wilson | QOTD: "The baby was so ugly they had to hang a pork email@example.com | chop around its neck to get the dog to play with it."
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