Re: non-SMP Kernel on Sparc machines using dual-cpu boards
Martin wrote:
> On Sun, 2007-09-23 at 02:48 +0200, Bernd Zeimetz wrote:
> <snip>
>> On which machines does the kernel boot properly?
>> Remember that UltraSPARC II processors have a different architecture
>> and UltraSPARC IIi and IIIi also are different!
> Please forgive me if I am stating the obvious but (as I understand it)
> the main difference between the II and IIi (and respectively the III and
> IIIi) is that the i series are for single processor machines and have a
> lot of the cache control and memory consistancy hardware removed as it
> is not needed. Thus running an UltraSPARC III and an UltraSPARC IIIi
> with non SMP kernels are fundamentally different propositions.
Right, but we're talking mainly about the US III (aka Cheetah) here. And
that's where it starts to become complicated:
- there're machines using 1-x US III CPUs, similar to runing US II CPUs
in older machines (the non-SMP Kernel should boot there, we'll test that)
- there're machines which are using cpu boards with 2 cpus, using an
architecture which is a lookahead of the US IV CPU. The CPUs are using
chaining mechanism so they should look like one CPU to the outside.
Machines larger than the v880 (4800, 5800, 6800....) are using seperate
repeater chips (with 2 levels) to hookup the CPUs (the E15k uses 3
levels of repeater chips).
- then we have the Blade 1000 and 2000 which are able to hookup 2 CPUs,
but they also provide a special slot for one CPU in the case you want to
run the machine with only one CPU installed.
Hope that explains it a bit better!
Bernd
--
Bernd Zeimetz
<bernd@bzed.de> <http://bzed.de/>
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