Hello, > I posted a patch at <http://penguinppc.org/~benh/new_sleep.diff> Thank you very much for your great work, ben! But I'm sorry having to tell you that it does not work properly for me... I have a TiBook III with M7 LW. Sleep/wake seems to work fine in text mode, but under X, it goes to sleep, awakes but the display stays black (harddrive spins). If I putted it to sleep under text, the same effect comes when I try to startx. Did I do something wrong? I've rsynced at 11 am. Applied the patch with: titanium:/usr/src/linux# patch -p1 < new_sleep.diff Sorry if I did something stupid raph titanium:~# cat /proc/cpuinfo cpu : 7455, altivec supported clock : 667MHz revision : 2.1 (pvr 8001 0201) bogomips : 665.19 machine : PowerBook3,4 motherboard : PowerBook3,4 MacRISC2 MacRISC Power Macintosh detected as : 73 (PowerBook Titanium III) pmac flags : 0000000b L2 cache : 256K unified memory : 1024MB pmac-generation : NewWorld lspci -vv: 00:0b.0 Host bridge: Apple Computer Inc.: Unknown device 002d Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- Latency: 16, cache line size 08 Capabilities: [80] AGP version 1.0 Status: RQ=7 SBA+ 64bit- FW+ Rate=x1,x2 Command: RQ=0 SBA+ AGP+ 64bit- FW- Rate=x1 00:10.0 VGA compatible controller: ATI Technologies Inc Radeon Mobility M6 LW (prog-if 00 [VGA]) Subsystem: ATI Technologies Inc Radeon Mobility M6 LW Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 255 (2000ns min), cache line size 08 Interrupt: pin A routed to IRQ 48 Region 0: Memory at b8000000 (32-bit, prefetchable) [size=128M] Region 1: I/O ports at 802400 [size=256] Region 2: Memory at b0000000 (32-bit, non-prefetchable) [size=64K] Expansion ROM at b0020000 [disabled] [size=128K] Capabilities: [58] AGP version 2.0 Status: RQ=47 SBA+ 64bit- FW- Rate=x1,x2 Command: RQ=7 SBA+ AGP+ 64bit- FW- Rate=x1 Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 10:0b.0 Host bridge: Apple Computer Inc.: Unknown device 002e Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- Latency: 16, cache line size 08 10:17.0 Class ff00: Apple Computer Inc. KeyLargo Mac I/O (rev 03) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 16, cache line size 08 Region 0: Memory at 80000000 (32-bit, non-prefetchable) [size=512K] 10:18.0 USB Controller: Apple Computer Inc. KeyLargo USB (prog-if 10 [OHCI]) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 16 (750ns min, 21500ns max) Interrupt: pin A routed to IRQ 27 Region 0: Memory at a0002000 (32-bit, non-prefetchable) [size=4K] 10:19.0 USB Controller: Apple Computer Inc. KeyLargo USB (prog-if 10 [OHCI]) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 16 (750ns min, 21500ns max) Interrupt: pin A routed to IRQ 28 Region 0: Memory at a0001000 (32-bit, non-prefetchable) [size=4K] 10:1a.0 CardBus bridge: Texas Instruments PCI1410 PC card Cardbus Controller (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 16, cache line size 08 Interrupt: pin A routed to IRQ 58 Region 0: Memory at a0000000 (32-bit, non-prefetchable) [size=4K] Bus: primary=10, secondary=11, subordinate=14, sec-latency=32 Memory window 0: 90000000-9ffff000 I/O window 0: 00001000-00008fff I/O window 1: 00000000-00000003 BridgeCtl: Parity- SERR- ISA- VGA- MAbort- >Reset+ 16bInt- PostWrite+ 16-bit legacy interface ports at 0001 24:0b.0 Host bridge: Apple Computer Inc.: Unknown device 002f Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- Latency: 16, cache line size 08 24:0e.0 Class ffff: Lucent Microelectronics: Unknown device 5811 (rev ff) (prog-if ff) !!! Unknown header type 7f 24:0f.0 Ethernet controller: Apple Computer Inc. UniNorth GMAC (rev 01) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR+ Latency: 6 (16000ns min, 16000ns max), cache line size 08 Interrupt: pin A routed to IRQ 41 Region 0: Memory at f5200000 (32-bit, non-prefetchable) [size=2M] Expansion ROM at f5100000 [disabled] [size=1M] <---------> clef publique : http://www.informatik.uni-freiburg.de/~proust/raph-pub-key.txt S'il vous plaît, évitez de m'envoyer des attachements au format Word ou PowerPoint. Voir http://www.fsf.org/philosophy/no-word-attachments.fr.html
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