Re: Hardware clock on dual G4 highly inaccurate?
On Thu, Jan 30, 2003 at 09:19:44AM +0100, Benjamin Herrenschmidt wrote:
> On Thu, 2003-01-30 at 01:35, Kevin B.Hendricks wrote:
> > Hi,
> >
> > FWIW on my dual G4 the hardware clock loses between 3 and 5 minutes per
> > 24 hour period.
> >
> > I finally set up an hourly cron job to try to keep my clock current.
>
> There are 2 different things:
>
> - The software clock maintained by the kernel. This one requires proper
> bus speed calibration, which can be an issue on recent machine, thus
> causing significant drifts. I'm working on a fix for this.
Is the value taken from OF or from self calibration at boot? In the
latter case increasing the time always improves precision. On PreP we
wait for the seconds to roll over in the RTC to calibrate the decrementer and
even then I see disturbingly large variations in the duration of a second.
I have not tested more recent code, which has been optimized to avoid
rereading the whole set of RTC fields when you need only the seconds.
Having a cursory look there are a few things that I don't understand,
a lot of outdated comments (many of which were originally mine) and so on.
The one thing I sure don't understand is the check for rollover of
tbu in arch/ppc/kernel/todc_time.c(todc_calibrate_decr). Unless you
have a 601 (and in this case processor specific code should have taken
care of it), the computation of the duration of a second is done
modulo 2^32 and is unaffected by a change of the TBU.
>
> - The hardware clock (hwclock output) is maintained by the PMU and is
> _supposed_ to be relatively accurate. However, I noticed some recent
> machines appear to show an "i2c-hwclock" node below the PMU node, and
> I'm wondering if Apple added a stock hwclock chip on the PMU i2c bus in
> order to replace the PMU's own (if any) or if this is just making an old
> stuff visible in the device-tree. I'll investigate that when I get one
> of the new machine.
It is supposed to be relatively accurate, but you have a problem with
some of the RTC chips which have a correction factor register. I don't
remember the details, but instead of trying to spread out the correction
evenly, they concentrate them in some sorts of bursts with occasionnally
long or short seconds.
Regards,
Gabriel.
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