XFree86 on mips cleanup patch
Hi,
the attached patch removes some previous workarounds by adding proper
functions to compiler.h for mips(el). This obsoletes the disabling of
the ati driver on mips(351) and the int10 module(350) on mipsel as well
as the mem_barrier patch(353). I've also attached the newport range fix
for completeness - both are against pre5. So these should be the only
patches needed to get XFree86 going on mips/mipsel for now.
-- Guido
--- xc/programs/Xserver/hw/xfree86/common/compiler.h.orig Tue Jul 24 22:33:42 2001
+++ xc/programs/Xserver/hw/xfree86/common/compiler.h Tue Jul 24 22:37:37 2001
@@ -862,6 +862,67 @@
return r1;
}
+#ifdef linux /* don't mess with other OSs */
+
+/*
+ * EGCS 1.1 knows about arbitrary unaligned loads (and we don't support older
+ * versions anyway. Define some packed structures to talk about such things
+ * with.
+ */
+
+struct __una_u32 { unsigned int x __attribute__((packed)); };
+struct __una_u16 { unsigned short x __attribute__((packed)); };
+
+static __inline__ void stw_u(unsigned long val, unsigned short *p)
+{
+ struct __una_u16 *ptr = (struct __una_u16 *) p;
+ ptr->x = val;
+}
+
+static __inline__ void stl_u(unsigned long val, unsigned int *p)
+{
+ struct __una_u32 *ptr = (struct __una_u32 *) p;
+ ptr->x = val;
+}
+
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+static __inline__ unsigned int
+xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
+{
+ unsigned long addr = ((unsigned long)base) + offset;
+ unsigned int ret;
+
+ __asm__ __volatile__("lw %0, 0(%1)"
+ : "=r" (ret)
+ : "r" (addr));
+ return ret;
+}
+
+static __inline__ void
+xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
+ const unsigned int val)
+{
+ unsigned long addr = ((unsigned long)base) + offset;
+
+ __asm__ __volatile__("sw %0, 0(%1)"
+ : /* No outputs */
+ : "r" (val), "r" (addr));
+}
+#endif
+
+#define mem_barrier() \
+__asm__ __volatile__( \
+ "# prevent instructions being moved around\n\t" \
+ ".set\tnoreorder\n\t" \
+ "# 8 nops to fool the R4400 pipeline\n\t" \
+ "nop;nop;nop;nop;nop;nop;nop;nop\n\t" \
+ ".set\treorder" \
+ : /* no output */ \
+ : /* no input */ \
+ : "memory")
+#define write_mem_barrier() mem_barrier()
+
+#else /* !linux */
#define stq_u(v,p) stl_u(v,p)
#define stl_u(v,p) (*(unsigned char *)(p)) = (v); \
(*(unsigned char *)(p)+1) = ((v) >> 8); \
@@ -872,6 +934,7 @@
(*(unsigned char *)(p)+1) = ((v) >> 8)
#define mem_barrier() /* NOP */
+#endif /* !linux */
#endif /* __mips__ */
#if defined(__arm32__)
--- xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c.orig Thu Jul 19 14:53:15 2001
+++ xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c Thu Jul 19 14:53:29 2001
@@ -247,7 +247,7 @@
entity = xf86ClaimIsaSlot(drv, 0, dev, TRUE);
base = (NEWPORT_BASE_ADDR0 + busID * NEWPORT_BASE_OFFSET);
RANGE(range[0], base, base + sizeof(NewportRegs),\
- ResExcMemBlock);
+ ResExcMemBlock,0);
pScrn = xf86ConfigIsaEntity(pScrn, 0, entity, NULL, range, \
NULL, NULL, NULL, NULL);
/* Allocate a ScrnInfoRec */
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