[Date Prev][Date Next] [Thread Prev][Thread Next] [Date Index] [Thread Index]

Bug#834505: arm64 boot failure with large physical memory range



On Mon, 2016-08-22 at 11:03 +0100, Leif Lindholm wrote:
> 
> > I thought there was a control bit on ARMv8 too which made it cause a
> > fault if the code loaded through, stored via, branched to etc an
> > address with bits set between the maximum physical address bit and the
> > bits architecturally reserved for tagging at the top end of the word,
> > but perhaps my memory has simply fabricated that out of thing air?
> 
> I don't remember if there's a dedicated bit for that, but certainly
> > judicious use of TTBCR/TTBRn should be able to achieve the same.

If it's possible then that seems like a good thing to do to me, to
avoid surprises and to be consistent with other arches.

OTOH as I now understand from Ard's response the problem here is not
lack of masking, but rather too much masking.

Ian.


Reply to: