Bug#324526: Compiling and linking Verilog simulations with VCS 7.2 does not work after libc6 upgrade

[Ravi Nanavati <ravi@bluespec.com>]

Package: libc6
Version: 2.3.5-3
Severity: normal

After upgrading libc6 (from 2.3.2.ds1-22) to 2.3.5-3 I am no longer able to compile and link Verilog simulations with Synopsys VCS. The problem appears to be missing symbols in libc6. The error messages I get are as follows:
gcc   -o ../simv  5NrI_d.o 5NrIB_d.o KDF7_1_d.o SIM_l.o   /tools/vcs7.2.new/vcs7.2/gui/virsim/linux/vcdplus/vcs7_2/libvirsim.a     /tools/vcs7.2.new/vcs7.2/linux/lib/libvcsnew.so     -ldl  -lc -lm -ldl
/tools/vcs7.2.new/vcs7.2/gui/virsim/linux/vcdplus/vcs7_2/libvirsim.a(vcspli.o): In function `vs_clStrCmpCI(char *, char *)':
: undefined reference to `__ctype_toupper'
/tools/vcs7.2.new/vcs7.2/gui/virsim/linux/vcdplus/vcs7_2/libvirsim.a(vcspli.o): In function `vs_clStrCmpCI(char *, char *)':
: undefined reference to `__ctype_toupper'
/tools/vcs7.2.new/vcs7.2/gui/virsim/linux/vcdplus/vcs7_2/libvirsim.a(vcspli.o): In function `vs_clStrCmpCI(char *, char *)':
: undefined reference to `__ctype_toupper'
/tools/vcs7.2.new/vcs7.2/gui/virsim/linux/vcdplus/vcs7_2/libvirsim.a(vcspli.o): In function `vs_clStrToLower(char *)':
: undefined reference to `__ctype_tolower'
/tools/vcs7.2.new/vcs7.2/gui/virsim/linux/vcdplus/vcs7_2/libvirsim.a(vcspli.o): In function `vs_clStrToUpper(char *)':
: undefined reference to `__ctype_toupper'

Downgrading libc6 (and reverting most of my system to testing to fix dependencies)
works around the problem, but that does not seem like a long-term solution.

-- System Information:
Debian Release: testing/unstable
  APT prefers testing
  APT policy: (1060, 'testing'), (500, 'stable'), (50, 'unstable')
Architecture: i386 (i686)
Shell:  /bin/sh linked to /bin/bash
Kernel: Linux 2.4.27-1-686
Locale: LANG=C, LC_CTYPE=C (charmap=ANSI_X3.4-1968)

-- no debconf information