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Re: [DRAFT] resolving DFSG violations



On Mon, 2008-10-27 at 20:30 -0700, Jeff Carr wrote:
[...]
> For example, lets say you have a pci device. If you don't load the
> firmware blob, the pins will just remain in an uninitialized state.
> That is; the chip default. Programming in the firmware blob will tell
> the chip how to work as a pci bus.
[...]

How exactly do you propose to load the firmware, if not through a JTAG
port?  Back in the world of production hardware which Debian runs on,
ASICs tend to have power-on-reset logic built-in...

Ben.

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