Bug#387693: ITP: myhdl -- Python module to use Python as a Hardware Description Language
Package: wnpp
Severity: wishlist
Owner: Oscar Daniel Diaz <oscar.dc0@gmail.com>
* Package name : myhdl
Version : 0.5.1
Upstream Author : Jan Decaluwe <jan@jandecaluwe.com>
* URL : http://myhdl.jandecaluwe.com/
* License : LGPL
Programming Lang: Python
Description : Python module to use Python as a Hardware Description Language
MyHDL is an open source Python package that lets you go from Python
to silicon. With MyHDL, you can use Python as a hardware description
and verification language. Furthermore, you can convert
implementation-oriented MyHDL code to Verilog automatically, and
take it to a silicon implementation from there. MyHDL also offers
all the Python power to make simulations and verifications beyond
the conventional way.
-- System Information:
Debian Release: testing/unstable
APT prefers testing
APT policy: (990, 'testing'), (500, 'unstable')
Architecture: amd64 (x86_64)
Shell: /bin/sh linked to /bin/bash
Kernel: Linux 2.6.16-athlon64
Locale: LANG=es_CO, LC_CTYPE=es_CO (charmap=ISO-8859-1)
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