Re: exported shell variables and scope
(Please don't Cc: me on list replies :)
On Wed, Jul 25, 2001 at 04:27:25PM -0400, Dale Scheetz <dwarf@polaris.net> spake forth:
> If I explicity place the variable declaration (without export!) before any
> target in the makefile, this variable is visible to other commands in the
> makefile. Why does "sourcing" those declarations change their scope, or is
> it their placement within a target?
When you define a variable in a Makefile, it's defined within that make
instance. When make spawns off other programs, it sticks those variables
into the subshells' environments. So, when you do a "FOO = bar" in your
makefile, then a "cp foo $FOO" in a rule, make inserts the variable FOO
into the subshell running the "cp".
> I've been at the point of being able to make this work for several
> postings now, but I still don't understand well enough to see the big
> picture. It seems I get into this confusion whenever I try to port shell
> logic to makefile logic...
In general, shell stuff which needs to get output or environment info or
settings from other shell stuff should all be in the same subshell - i.e. in
()'s.
--
Mike Markley <mike@markley.org>
GPG: 0x3B047084 7FC7 0DC0 EF31 DF83 7313 FE2B 77A8 F36A 3B04 7084
Too much of anything, even love, isn't necessarily a good thing.
- Kirk, "The Trouble with Tribbles", stardate 4525.6
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