Accepted intel-microcode 3.20180312.1~bpo8+1 (amd64 i386 source) into jessie-backports-sloppy
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Hash: SHA512
Format: 1.8
Date: Thu, 15 Mar 2018 00:00:33 -0300
Source: intel-microcode
Binary: intel-microcode
Architecture: amd64 i386 source
Version: 3.20180312.1~bpo8+1
Distribution: jessie-backports-sloppy
Urgency: critical
Maintainer: Henrique de Moraes Holschuh <hmh@debian.org>
Changed-By: Henrique de Moraes Holschuh <hmh@debian.org>
Closes: 886367 886368 886998
Description:
intel-microcode - Processor microcode firmware for Intel CPUs
Changes:
intel-microcode (3.20180312.1~bpo8+1) jessie-backports-sloppy; urgency=medium
.
* Rebuild for jessie-backports-sloppy (no changes)
.
intel-microcode (3.20180312.1) unstable; urgency=medium
.
* New upstream microcode data file 20180312 (closes: #886367)
+ New Microcodes:
sig 0x00050653, pf_mask 0x97, 2018-01-29, rev 0x1000140, size 30720
sig 0x00050665, pf_mask 0x10, 2018-01-22, rev 0xe000009, size 18432
+ Updated Microcodes:
sig 0x000206a7, pf_mask 0x12, 2018-02-07, rev 0x002d, size 12288
sig 0x000206d6, pf_mask 0x6d, 2018-01-30, rev 0x061c, size 18432
sig 0x000206d7, pf_mask 0x6d, 2018-01-26, rev 0x0713, size 19456
sig 0x000306a9, pf_mask 0x12, 2018-02-07, rev 0x001f, size 13312
sig 0x000306c3, pf_mask 0x32, 2018-01-21, rev 0x0024, size 23552
sig 0x000306d4, pf_mask 0xc0, 2018-01-18, rev 0x002a, size 18432
sig 0x000306e4, pf_mask 0xed, 2018-01-25, rev 0x042c, size 15360
sig 0x000306e7, pf_mask 0xed, 2018-02-16, rev 0x0713, size 16384
sig 0x000306f2, pf_mask 0x6f, 2018-01-19, rev 0x003c, size 33792
sig 0x000306f4, pf_mask 0x80, 2018-01-22, rev 0x0011, size 17408
sig 0x00040651, pf_mask 0x72, 2018-01-18, rev 0x0023, size 21504
sig 0x00040661, pf_mask 0x32, 2018-01-21, rev 0x0019, size 25600
sig 0x00040671, pf_mask 0x22, 2018-01-21, rev 0x001d, size 12288
sig 0x000406e3, pf_mask 0xc0, 2017-11-16, rev 0x00c2, size 99328
sig 0x00050654, pf_mask 0xb7, 2018-01-26, rev 0x2000043, size 28672
sig 0x00050662, pf_mask 0x10, 2018-01-22, rev 0x0015, size 31744
sig 0x00050663, pf_mask 0x10, 2018-01-22, rev 0x7000012, size 22528
sig 0x00050664, pf_mask 0x10, 2018-01-22, rev 0xf000011, size 22528
sig 0x000506e3, pf_mask 0x36, 2017-11-16, rev 0x00c2, size 99328
sig 0x000806e9, pf_mask 0xc0, 2018-01-21, rev 0x0084, size 98304
sig 0x000806ea, pf_mask 0xc0, 2018-01-21, rev 0x0084, size 97280
sig 0x000906e9, pf_mask 0x2a, 2018-01-21, rev 0x0084, size 98304
sig 0x000906ea, pf_mask 0x22, 2018-01-21, rev 0x0084, size 96256
sig 0x000906eb, pf_mask 0x02, 2018-01-21, rev 0x0084, size 98304
+ Implements IBRS/IBPB/STIPB support, Spectre-v2 mitigation for:
Sandybridge, Ivy Bridge, Haswell, Broadwell, Skylake, Kaby Lake,
Coffee Lake
+ Missing production updates:
+ Broadwell-E/EX Xeons (sig 0x406f1)
+ Anniedale/Morefield, Apollo Lake, Avoton, Cherry Trail, Braswell,
Gemini Lake, Denverton
* Update past changelog entries with new information:
Intel already had all necessary semanthics in LFENCE, so the
Spectre-related Intel microcode changes did not need to enhance LFENCE.
* debian/control: update Vcs-* fields for the move to salsa.debian.org
.
intel-microcode (3.20180108.1+really20171117.1) unstable; urgency=critical
.
* Revert to release 20171117, as per Intel instructions issued to
the public in 2018-01-22 (closes: #886998)
* This effectively removes IBRS/IBPB/STIPB microcode support for
Spectre variant 2 mitigation.
.
intel-microcode (3.20180108.1) unstable; urgency=high
.
* New upstream microcode data file 20180108 (closes: #886367)
+ Updated Microcodes:
sig 0x000306c3, pf_mask 0x32, 2017-11-20, rev 0x0023, size 23552
sig 0x000306d4, pf_mask 0xc0, 2017-11-17, rev 0x0028, size 18432
sig 0x000306e4, pf_mask 0xed, 2017-12-01, rev 0x042a, size 15360
sig 0x000306f2, pf_mask 0x6f, 2017-11-17, rev 0x003b, size 33792
sig 0x000306f4, pf_mask 0x80, 2017-11-17, rev 0x0010, size 17408
sig 0x00040651, pf_mask 0x72, 2017-11-20, rev 0x0021, size 22528
sig 0x00040661, pf_mask 0x32, 2017-11-20, rev 0x0018, size 25600
sig 0x00040671, pf_mask 0x22, 2017-11-17, rev 0x001b, size 13312
sig 0x000406e3, pf_mask 0xc0, 2017-11-16, rev 0x00c2, size 99328
sig 0x00050654, pf_mask 0xb7, 2017-12-08, rev 0x200003c, size 27648
sig 0x00050662, pf_mask 0x10, 2017-12-16, rev 0x0014, size 31744
sig 0x00050663, pf_mask 0x10, 2017-12-16, rev 0x7000011, size 22528
sig 0x000506e3, pf_mask 0x36, 2017-11-16, rev 0x00c2, size 99328
sig 0x000706a1, pf_mask 0x01, 2017-12-26, rev 0x0022, size 73728
sig 0x000806e9, pf_mask 0xc0, 2018-01-04, rev 0x0080, size 98304
sig 0x000806ea, pf_mask 0xc0, 2018-01-04, rev 0x0080, size 98304
sig 0x000906e9, pf_mask 0x2a, 2018-01-04, rev 0x0080, size 98304
sig 0x000906ea, pf_mask 0x22, 2018-01-04, rev 0x0080, size 97280
sig 0x000906eb, pf_mask 0x02, 2018-01-04, rev 0x0080, size 98304
+ Implements IBRS/IBPB support: mitigation against Spectre (CVE-2017-5715)
+ Very likely fixes several other errata on some of the processors
* supplementary-ucode-CVE-2017-5715.d/: remove.
+ Downgraded microcodes:
sig 0x000406f1, pf_mask 0xef, 2017-03-01, rev 0xb000021, size 26624
sig 0x000506c9, pf_mask 0x03, 2017-03-25, rev 0x002c, size 16384
+ Recall related to bug #886998
* source: remove superseded upstream data file: 20171117
* README.Debian, copyright: update download URLs (closes: #886368)
.
intel-microcode (3.20171215.1) unstable; urgency=high
.
* Add supplementary-ucode-CVE-2017-5715.d/: (closes: #886367)
New upstream microcodes to partially address CVE-2017-5715
+ Updated Microcodes:
sig 0x000306c3, pf_mask 0x32, 2017-11-20, rev 0x0023, size 23552
sig 0x000306d4, pf_mask 0xc0, 2017-11-17, rev 0x0028, size 18432
sig 0x000306f2, pf_mask 0x6f, 2017-11-17, rev 0x003b, size 33792
sig 0x00040651, pf_mask 0x72, 2017-11-20, rev 0x0021, size 22528
sig 0x000406e3, pf_mask 0xc0, 2017-11-16, rev 0x00c2, size 99328
sig 0x000406f1, pf_mask 0xef, 2017-11-18, rev 0xb000025, size 27648
sig 0x00050654, pf_mask 0xb7, 2017-11-21, rev 0x200003a, size 27648
sig 0x000506c9, pf_mask 0x03, 2017-11-22, rev 0x002e, size 16384
sig 0x000806e9, pf_mask 0xc0, 2017-12-03, rev 0x007c, size 98304
sig 0x000906e9, pf_mask 0x2a, 2017-12-03, rev 0x007c, size 98304
* Implements IBRS and IBPB support via new MSR (Spectre variant 2
mitigation, indirect branches). Support is exposed through cpuid(7).EDX.
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Checksums-Sha256:
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Files:
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