Le 9 mai 10 à 14:03, Martin Michlmayr a écrit :
* Luca Niccoli <firstname.lastname@example.org> [2010-05-07 11:21]:This is the info I got from Stephen Gran on d-admin: Processor : Feroceon rev 0 (v5l) Hardware : Marvell DB-78x00-BP Development BoardProcessor : Feroceon 88FR131 rev 1 (v5l) Hardware : Marvell OpenRD Base BoardProcessor bug that was corrected in a later revision?The OpenRD uses a Kirkwood SoC while the DB-78x00-BP Development Board uses an MV78xx0 SoC. While they both use the Feroceon core, there are notable differences. For example, the Kirkwood has no FPU while the MV78xx0 has one IIRC. In any case, we have pretty good contacts at Marvell so if anyone has a testcase (ideally a smaller one than "run yorick") we can forward it to them.
Hi,Porting issues with Yorick are often (always?) related to FPE trapping. Since you mention that one of those has an FPU while the other does not, the problem must lie there again, perhaps at "feenableexcept()".
I attach a short test-case which I have used already to demonstrate buggy SIGFPE handling on another arch. Usage is documented in the file. Can you check whether this test case:
- runs fine; - triggers SIGFPE; - triggers SIGILL? Best regards, Thibaut.
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