Jo Shields wrote:
Wrong. IA-32 processors have had 36 address lines since PAE was added. That's what CONFIG_HIGHMEM64G does for IA-32 kernels, BTW. It turns on PAE support.32-bit OSen have a theoretical limit of 4GiB addressable memory.
This is also wrong. PCI devices with 64-bit BARs can obviously use a 64-bit address. However, most devices have a 32-bit BAR, requiring that the address be below the 4GiB boundary. Obviously then, physically memory has to remapped to accommodate[1].However, there's an additional limitation as all expansion cards (e.g. graphics cards) need to have their memory regions mapped within that 4GiB area, lowering the overall amount of "system" memory you canaddress.
64-bit OSen don't have that limitation,No, they still do. The width of the virtual address space has nothing to do with physical addressing limitations. If the PCI device has a 32-bit BAR, then the mapping for its I/O space must occur below 4GiB. If RAM wants to be there, then it must be remapped, regardless of whether your OS is 32-bits or 64-bits or 1024-bits virtual address space.
It's worth nothing that no AMD64 processor on the market has 64-bit physical lines or 64-bits of v.a.s.
Current processors have 40 physical lines (some early EM64T have 36). The maximum limit is 52-bits. Virtual address space is fixed at 48-bits presently but can be extended to the 64-bit limit.
Remember that limitations on physical addressing usually have physical reasons. So if a remapping option exists, it's likely for a damn good physical reason that the OS has nothing to do with whatsoever. Nor has any control over.
Thanks, Adam