-
ff386eba
by Eric Engestrom at 2025-04-02T18:52:26+02:00
docs: add sha sum for 25.0.3
-
2bde9b1e
by Eric Engestrom at 2025-04-10T17:12:23+02:00
[25.0 only] update more ci expectations
These changes happened with no mesa code change, only infrastructure
changes, which is really weird, but to be able to move on, let's simply
document the "new normal".
(Was missed in 69d6923cdb6291c271c0)
-
8202aa08
by Eric Engestrom at 2025-04-10T17:12:23+02:00
.pick_status.json: Update to 7c5389695bdf106acaab6ccc69535f25c1d7a8e6
-
d2f3b9e0
by Tapani Pälli at 2025-04-10T17:12:23+02:00
compiler/glsl: check that bias is not used outside fragment stage
This fixes some upcoming CTS tests that attempt bias usage when
it is not valid per spec.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34285>
(cherry picked from commit b93ea155f9bb742a6ba8ae1aa43f3cc28f3da1de)
-
cff32310
by Aaron Ruby at 2025-04-10T17:12:23+02:00
gfxstream: Make the virtgpu device discovery for LinuxVirtGpu more robust
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33363>
(cherry picked from commit 5d2c0cc5260ac7acfa46082a497689ff371e4d18)
-
34a1404c
by Aaron Ruby at 2025-04-10T17:12:23+02:00
gfxstream: Add common interfaces in the VirtGpuDevice to query DrmInfo
and PciBusInfo
- Advertise the availability of these extensions, fully implemented as
guestOnly features
Reviewed-By: Gurchetan Singh <gurchetansingh@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33363>
(cherry picked from commit 2553d60d47939653ee7ee7640b767f05fd86cc38)
-
5ebbbcc8
by Gurchetan Singh at 2025-04-10T17:12:23+02:00
gfxstream: check device exists before using it
Segfaults in the error case otherwise.
Cc: mesa-stable
Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34090>
(cherry picked from commit 5503d97bf68caa9393684318d9021c593688311d)
-
f4efaff8
by Gurchetan Singh at 2025-04-10T17:12:23+02:00
gfxstream: refactor device initialization
Don't add unnecessary logspam if virtgpu isn't present.
Cc: mesa-stable
Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34090>
(cherry picked from commit ef84cd928e3581dbb79b6a20f1a28c265231fb2e)
-
0a63b3db
by Gurchetan Singh at 2025-04-10T17:12:23+02:00
gfxstream: follow the semantics desired by distro VK loader
- vkCreateInstance should return VK_SUCCESS absent a few specific
conditions
- just don't add any physical devices later
Cc: mesa-stable
Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34090>
(cherry picked from commit 8f003dc2e9f14c57681dbfa7c6a3100afdd9340b)
-
773a873c
by Connor Abbott at 2025-04-10T17:12:23+02:00
tu: Fix layer_count with dynamic rendering + multiview
With "classic" renderpasses, the VkFramebuffer's layerCount must be 1 if
multiview is enabled. We accidentally rely on this to not disable GMEM
for multiview, and possibly for other things too. Apparently the dynamic
rendering equivalent, VkRenderingInfo::layerCount, can be anything when
multiview is enabled, and some CTS tests set it to the number of views.
Sanitize it when constructing the internal framebuffer for dynamic
rendering.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34080>
(cherry picked from commit 15660caa902838792e7a6ec93f828ae0fefa5705)
-
511a894f
by David Rosca at 2025-04-10T17:12:23+02:00
radeonsi/vcn: Disable AV1 unidir compound with rate control
It causes significant bitrate overshoot currently.
Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34237>
(cherry picked from commit a5edb9faacab888a435644f9cb67f095b2f4c44e)
-
aefa768a
by Sviatoslav Peleshko at 2025-04-10T17:12:23+02:00
vulkan/wsi/headless: Remove unnecessary wsi_configure_image()
wsi_configure_image() with the same info is already called by
configure_image() in wsi_swapchain_init(), so this second call is
unnecessary. Furthermore, calling it the second time caused a memory
leak of queue family indices array.
Fixes: d4a2c0fc ("vulkan/wsi: add a headless swapchain implementation/option")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12811
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34194>
(cherry picked from commit 64980c4f057aab18db38dc9817fecb8fde035c3f)
-
ef2a5bee
by Samuel Pitoiset at 2025-04-10T17:12:23+02:00
radv: fix ignoring conditional rendering with vkCmdResolveImage()
This command isn't supposed to be affected by conditional rendering.
This fixes new VKCTS coverage
dEQP-VK.conditional_rendering.conditional_ignore.resolve_image*.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34338>
(cherry picked from commit 4d1d6d4147d0947ee075dcea1519a01d69239d26)
-
1d1fe5cc
by Job Noorman at 2025-04-10T17:12:23+02:00
ir3/ra: assign interval offsets to new defs after shared RA
Shared RA might insert new defs to be handled by regular RA (e.g.,
shared spills). However, their interval offsets were not initialized
which caused their intervals to sometimes be mistakenly matched with
those containing offset 0. Fix this by calling index_merge_sets after
shared RA and modifying that function to only index new defs in that
case.
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: fa22b0901af ("ir3/ra: Add specialized shared register RA/spilling")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33319>
(cherry picked from commit a0db2f9737a49f5c3c9254f038dafecf3a5dc1d4)
-
88ea564e
by Georg Lehmann at 2025-04-10T17:12:23+02:00
spirv: clamp/sign-extend non 32bit ldexp exponents
GLSL.std.450 allows any integer size here.
OpenCL only allows i32.
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34071>
(cherry picked from commit c21a53440ff7ac7a2c9308798bea5d5c153a386b)
-
a4c805f0
by Jan Alexander Steffens (heftig) at 2025-04-10T17:12:23+02:00
gfxstream: Use proper log format for 32-bit Vulkan
On i686, where VK_USE_64_BIT_PTR_DEFINES is unset and Vulkan handles are
represented as 64-bit integers instead, the code used the wrong format
specifier, causing a build error.
Fixes: 7fb31361f443 ("Handle external fences in vkGetFenceStatus()")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34124>
(cherry picked from commit 1deb0536a1cd89470e303416f80e3e3a191bba60)
-
370789bc
by Timur Kristóf at 2025-04-10T17:12:23+02:00
nir/xfb: Preserve some xfb information when gathering from intrinsics.
We need to remember which streamout buffers and streams were enabled,
even if the shader doesn't actually write any outputs to them,
because the API requires that we count vertices created by this shader
towards queries against those streams.
That information can be gathered by nir_gather_xfb_info_with_varyings
from the original NIR I/O variables that we get from the frontend,
but it isn't included in any intrinsics so would be otherwise lost here.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
(cherry picked from commit a29b5857f7dbdf3e8d1ffb11145bcf809bdfdd70)
-
085ae260
by Timur Kristóf at 2025-04-10T17:12:24+02:00
nir/opt_varyings: Fix assertion when deduplicating TCS outputs.
When deduplicating TCS outputs, we may find outputs that aren't
loaded by the shader itself. This previously hit a bad assertion.
Fixes: c66967b5cb7aa69c3c2efb12730b7b570483e01b
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12410
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
(cherry picked from commit 96d11d0f566e8e22f8066df958eb611d1d556253)
-
6ebea60d
by Timur Kristóf at 2025-04-10T17:12:24+02:00
radv: Use buffers_written mask when gathering XFB info.
We need to enable these buffers regardless of whether or not the
shader actually writes any outputs to them, otherwise we break
XFB queries.
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
(cherry picked from commit 15d080467087b2c23dce6932b1c9e45dc5822108)
-
a64edc0e
by Timur Kristóf at 2025-04-10T17:12:24+02:00
radv: Call nir_opt_undef too after nir_opt_varyings.
Shaders may have undefined output stores after nir_opt_varyings.
These must be optimized out, otherwise they hit an assertion.
Fixes: 17f6ab28cc40302d20cdc15d84947f38d5f02b4b
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
(cherry picked from commit ce2138d73a8ed564ffdbf8a523a32b1ab3ec7820)
-
c3952af9
by Mike Blumenkrantz at 2025-04-10T17:12:24+02:00
gallium/util: check nr_samples in pipe_surface_equal()
this is otherwise broken
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34367>
(cherry picked from commit 12b57b34f81e0b0b39f676bfa77de0c5d0fee1bd)
-
d2e0c225
by Ian Romanick at 2025-04-10T17:12:24+02:00
brw/algebraic: Constant folding for BROADCAST and SHUFFLE
This prevents assertion failures in brw_eu_emit in a later commit in
this MR. Even though they have not been previously observed, these
assertion failures could happen even without that commit.
No shader-db or fossil-db changes on any Intel platform.
Fixes: 04e17832782 ("brw: Call brw_fs_opt_algebraic less often")
v2: Add SHUFFLE. Suggested by Ken. Fixed indentation.
v3: Update BROADCAST exec_size after rebasing on "brw/build: Use SIMD8
temporaries in emit_uniformize".
v4: Explain why munging the exec_size is correct.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31497>
(cherry picked from commit 8b2be206f366c0eb49e77282772e371beef7f47a)
-
350839a5
by Benjamin Lee at 2025-04-10T17:12:24+02:00
panvk/csf: fix uninitialized read in utrace_clone_init_builder
Previous code assumed that the caller of utrace_clone_init_builder would
fill some parameters of the builder config, but we were not. Instead,
initialize these from the csif props the same as all the other builder
instances.
Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Fixes: 3096cf2a5dd ("panvk/csf: flush and process trace events for all cmdbufs")
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34270>
(cherry picked from commit e183650aa41bd3d8f7ae23d65e0d49449a39f8c3)
-
50e0a393
by Benjamin Otte at 2025-04-10T17:12:24+02:00
lavapipe: Don't advertise support for multiplane drm formats
Fixes: bd4f69a0fe495a2c584bf0e4040fc341c55d0e18
Signed-off-by: Benjamin Otte <otte@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34190>
(cherry picked from commit 0941af995ac0cb4d33e9d26e6b9b866d2224cd9a)
-
8614baa5
by Eric Engestrom at 2025-04-10T17:12:24+02:00
ci: rename ci-tron priority tag to avoid conflict with the generic fdo runners
Otherwise, ci-tron runners with that tag could pick up jobs meant for the fdo
runners, as happened here:
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/73883719
The inverse (fdo runners picking up a job meant for a ci-tron runner) is not
possible though, as ci-tron jobs always include a `farm:$RUNNER_FARM_LOCATION`
tag, so the problem only exists in the other direction.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34358>
(cherry picked from commit 6331441e24ccae9b36f9fcdab481673575f6d0fd)
-
91759a94
by Eric Engestrom at 2025-04-10T17:12:24+02:00
.pick_status.json: Update to 2f00daf67a7990da68dfc4a8e5f2019daecb7a59
-
e8ccf9bd
by Benjamin Lee at 2025-04-10T17:12:24+02:00
panfrost/pps: fix omitting several counters
The cid loop in the previous implementation stopped at n_counters for a
given category, even though cid is a global id that does not start
counting from zero at the beginning of each category. As a result, we
missed most of the counters outside of the first category.
Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Fixes: 513d1baaea5 ("pps: Panfrost pps driver")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34202>
(cherry picked from commit 3b66e4a438905874f827c153a5e6c670f45ff0ed)
-
6ae1a65e
by Timothy Arceri at 2025-04-10T17:12:24+02:00
glsl: fix regression in ubo cloning
Fixes KHR-GL46.layout_binding.block_layout_binding_block_VertexShader
with radeonsi.
Fixes: 2b2132d2acd1 ("nir: fix uniform cloning helper")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34337>
(cherry picked from commit d8782db3a48205f71c03feaf7ddfb092b8a523b2)
-
4bb8d70f
by Georg Lehmann at 2025-04-10T17:12:24+02:00
spirv: fix cooperative matrix by value function params
The vtn_ssa_value for a cmat is not backed by a nir_def, but by a nir_variable, so
can't be used directly when calling a function. In most cases the cmat is used by
reference so code will take the value of deref for it (which is a `nir_def`).
When passing a cooperative matrix to a function by value, let the caller pass the deref
value, and the callee copy to a new local variable from that deref.
Fixes: b98f87612bc ("spirv: Implement SPV_KHR_cooperative_matrix")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34364>
(cherry picked from commit 0cad7b09685a987d9765bf545576f8acec374a2b)
-
50594727
by Juan A. Suarez Romero at 2025-04-10T17:12:24+02:00
v3dv: don't check if DRM device is master
This was added to ensure we can get its resources, but they can be
obtained also from non master.
Fixes: 2af12c5b36e ("v3dv: Check multiple DRM primary nodes before picking the display fd")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12641
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34366>
(cherry picked from commit 8742927d8f7bd65a529957230efd6d853e4fc4c9)
-
c207f968
by Patrick Lerda at 2025-04-10T17:12:24+02:00
r600: move stores to the end of shader when required
This change is inspired from 1e0e521a7de ("broadcom/compiler:
move stores to the end of shader") and makes the khr cull_distance
tests which were broken after dae57e184aa functionals again.
Fixes: dae57e184aa ("glsl,st/mesa: always lower IO for GLSL, unlower IO for drivers")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34154>
(cherry picked from commit 4c2b2c82b0f577e2d1c0f2bfc54127e2055c8cdb)
-
ced585e3
by Patrick Lerda at 2025-04-10T17:12:24+02:00
r600: fix textures with swizzles limited to zero and one
This issue seems to be specific to textureGather() which could
fail when processing some surfaces. These surfaces are configured
with non-standard one and zero swizzles. The gpu doesn't support
this very specific setup with all the possible hardware formats.
This change selects a compatible configuration when this is
possible.
This change was tested on palm, barts and cayman. This change
fixes the 216 remaining arb_texture_gather tests:
spec/arb_texture_gather/texturegather/.*-zero-.*: fail pass
spec/arb_texture_gather/texturegather/.*-one-.*: fail pass
spec/arb_texture_gather/texturegatheroffset/.*-zero-.*: fail pass
spec/arb_texture_gather/texturegatheroffset/.*-one-.*: fail pass
Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34293>
(cherry picked from commit f0c0997277e3fcdba18ade60dc7ab52f07e5dc4a)
-
a29fa8d0
by Eric R. Smith at 2025-04-10T17:12:24+02:00
panfrost,lima: use index size in panfrost minmax_cache
Bifrost keeps a cache of information about buffers being
used as indices. Unfortunately, it was not keeping information
about the size of the indices (probably because this rarely
changes). If a program deliberately re-interprets the indices
as a different type (e.g. UNSIGNED_INT instead of UNSIGNED_SHORT)
then we will use incorrect values from the cache. This actually
showed up in a test program we were running.
Fix by saving the index size in the cache key.
Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34011>
(cherry picked from commit 739da17f6efa371d46499d999d141849a121e128)
-
58f3ddad
by Ian Romanick at 2025-04-10T17:12:24+02:00
brw/nir: Fix source handling of nir_intrinsic_load_barycentric_at_offset
The source of nir_intrinsic_load_barycentric_at_offset is a vector, so
-1 should be passed to get_nir_src. This is also done for texture
sampling intrinsics.
I skimmed the other user of get_nir_src, and I believe they are
correct. This one was just missed as LNL support landed an many, many
rebases of the original MR occurred.
v2: Fix another get_nir_src call. Suggested by Lionel.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> [v1]
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes: d5d7ae22ae4 ("brw/nir: Fix up handling of sources that might be convergent vectors")
Closes: #12464
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33007>
(cherry picked from commit 38b58e286fa5b972a43fd43cb01151ce112c10cc)
-
44808761
by Ian Romanick at 2025-04-10T17:12:24+02:00
brw/algebraic: Optimize derivative of convergent value
This is mostly defensive. If a convergent value ever ended up as a
source of a DDX or DDY, the eu_emit code will ignore the stride. This
will result in bad code being generated.
No shader-db or fossil-db changes on any Intel platform.
v2: DDX and DDY will always be float, but brw_imm_for_type only works
with integer types.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Suggested-by: Ken
Fixes: d5d7ae22ae4 ("brw/nir: Fix up handling of sources that might be convergent vectors")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33007>
(cherry picked from commit dee49f42061ce3d2e4a47630e63781a1ec584ddb)
-
510e0cf3
by Mike Blumenkrantz at 2025-04-10T17:12:24+02:00
tu: check for valid descriptor set when binding descriptors
these pointers can be null, and they are checked as null in
pipeline layout creation, but here if the pointer is null it will crash
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34412>
(cherry picked from commit b14c8128bfcb7fe5b402b765494d92ac18e0f21d)
-
4135fd73
by Marek Olšák at 2025-04-10T17:12:25+02:00
radeonsi: work around a primitive restart bug on gfx10-10.3
Using the GE instead of the VGT register has no effect because it's
the same value. SQ_NON_EVENT is the fix.
Discovered by Samuel Pitoiset.
Cc: mesa-stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34016>
(cherry picked from commit a82705911e13de3db9d38f09c6cb577602308930)
-
7e787e68
by Lars-Ivar Hesselberg Simonsen at 2025-04-10T17:12:25+02:00
panvk: Add barrier for interleaved ZS copy cmds
When executing CopyBufferToImage or CopyImage with multiple regions of
both depth and stencil aspects targeting an interleaved depth stencil
image, we must split the regions into one copy-command for each aspect
and add a barrier between them to avoid a write-after-write race.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Fixes: 5067921349a ("panvk: Switch to vk_meta")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34384>
(cherry picked from commit 37595775a0e1d63ad99cb9adb67ee5c35ee8c9ff)
-
17a744e8
by Patrick Lerda at 2025-04-10T17:12:25+02:00
r600: fallback to util_blitter_draw_rectangle when required
This is the backport of dc293ffe507 ("radeonsi:
fallback to util_blitter_draw_rectangle").
This change was tested on rv770, palm and cayman. Here is
the test fixed:
spec/ext_framebuffer_blit/fbo-blit-check-limits: fail pass
Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34403>
(cherry picked from commit 4d17f8d10a98401a7df29dd2eb1495ba05eeda05)
-
76c1b49b
by Patrick Lerda at 2025-04-10T17:12:25+02:00
r600: fix pa_su_vtx_cntl rounding mode
This is the backport of 9c49550163f. This rounding functionality
is available on all the gpus of the r600 family.
This change was tested on rv770, palm and cayman. This change fixes
at least the "turn-on-off" tests on all these gpus and it does not
add any regression. Here are the tests fixed on palm:
spec/ext_framebuffer_multisample/interpolation 6 centroid-edges: fail pass
spec/ext_framebuffer_multisample/interpolation 8 centroid-edges: fail pass
spec/ext_framebuffer_multisample/turn-on-off 2: fail pass
spec/ext_framebuffer_multisample/turn-on-off 4: fail pass
spec/ext_framebuffer_multisample/turn-on-off 6: fail pass
spec/ext_framebuffer_multisample/turn-on-off 8: fail pass
Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34403>
(cherry picked from commit 8fc01db1ac58fd976c491ed5be610253d442b09f)
-
f7f72928
by Patrick Lerda at 2025-04-10T17:12:25+02:00
r600: fix points clipping
This is the backport of eca57f85ee1 ("radeonsi: fix
gl_ClipDistance and gl_ClipVertex for points").
This change was tested on rv770, palm, barts and cayman. It
fixes 450 khr-gl tests and 64 khr-gles tests on evergreen
and cayman gpus. Here is the list:
spec/glsl-1.20/execution/clipping/vs-clip-vertex-primitives: fail pass
spec/glsl-1.30/execution/clipping/vs-clip-distance-primitives: fail pass
spec/glsl-1.50/execution/compatibility/clipping/gs-clip-vertex-primitives-points: fail pass
khr-gl(3[0-3]|4[0-5])/clip_distance/functional: fail pass
khr-gl(33|4[0-5])/cull_distance/functional_test_item_[0-8]_primitive_mode_points_max_culldist_[0-7]: fail pass
khr-gles3/clip_distance/functional: fail pass
khr-gles3/cull_distance/functional_test_item_[0-8]_primitive_mode_points_max_culldist_[0-7]: fail pass
Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34403>
(cherry picked from commit 58ddf6aaf0b48109d797ffad7f00acbda818af8f)
-
93985934
by Rob Clark at 2025-04-10T17:12:25+02:00
tu/vdrm: Fix userspace fence cmds
Somehow the update of the fence value to write was dropped, so the
cmdstream that wrote the fence value would simply write zero over and
over again.
Fixes: 84d6eedd5e8f ("tu: Refactor the submit path")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33433>
(cherry picked from commit 081869e5919bb0048495dc28c9ea3b0fec0c121f)
-
0a9cb4e8
by Felix DeGrood at 2025-04-10T17:12:25+02:00
vk/overlay-layer: fix regression in non-control pathway
Fixes regression introduced by prior commit. Prior commit fixed
the control pathway to starting overlay-layer but broke non-
control pathway. Now both pathways should be working.
Fixes: 06423b1792b ("defer log creation to swapchain creation")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12884
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34413>
(cherry picked from commit b895c0ec0575ed36cd13a9fc2802e9db8a348b7c)
-
41b93a8d
by Alyssa Rosenzweig at 2025-04-10T17:12:25+02:00
nir/lower_blend: refactor logicop variables
This pulls out the logicop_func variable from the options struct, so we can
modify it in the next commit in a central place. It then refactors out the
format variable from the options struct since we end up duplicating
options->format[rt] a zillion times and passing in both an options struct and a
logicop func override is confusing so this will just make everything neater and
self-contained next commit.
no functional change.
Cc'd to make the next commit cherrypickable.
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34426>
(cherry picked from commit 54ccc8ed0b7c2a491bf805090178ece02b5d4d72)
-
1830d233
by Alyssa Rosenzweig at 2025-04-10T17:12:25+02:00
nir/lower_blend: disable logic ops for unsupported formats
Fixes new Vulkan CTS cases on Honeykrisp (and probably panvk and whatever)
dEQP-VK.pipeline.shader_object_unlinked_binary.logic_op_na_formats.*
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34426>
(cherry picked from commit c23201ad8af17877f2367f6ccdb4773b5e810818)
-
2e6281ea
by Lionel Landwerlin at 2025-04-10T17:12:25+02:00
brw: fix shuffle with scalar/uniform index
The fixes commit isn't actually the source of the bug but likely the
biggest enabler because it creates scalar values that more easily end
up in the shuffle operations.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1b24612c57 ("brw/nir: Treat load_*_uniform_block_intel as convergent")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12927
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12688
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12570
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12905
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12734
Reviewed-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34393>
(cherry picked from commit 19e4dda9a2add2ff98b201cc30993cf61df4ed55)
-
1fdd97ea
by Natalie Vock at 2025-04-10T17:12:25+02:00
aco: Make private_segment_buffer/scratch_offset per-resume
We need different Temps for each resume shader, because registers aren't
preserved across resume boundaries.
This was likely fine in practice because arg registers are the same for
each shader, but resulted in invalid IR and asserts.
Fixes crashes in Indiana Jones RT with assertions enabled on GFX8.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34114>
(cherry picked from commit 3d8db3cbbb9635cd271c5ccbd4b4d54d14633f57)
-
217ed7f1
by Faith Ekstrand at 2025-04-10T17:12:25+02:00
nak: Allow predicates in nir_intrinsic_as_uniform
As of 76e542e92a17 ("nak: Add nak_nir_mark_lcssa_invariants"), we can
now get predicates as inputs to as_uniform. We can't assume the result
will always be a UGPR.
Fixes: 76e542e92a17 ("nak: Add nak_nir_mark_lcssa_invariants")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12970
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34434>
(cherry picked from commit 4d1399629b95bea62eda7f47e385ccf5eff74d77)
-
885b1cfd
by Patrick Lerda at 2025-04-10T17:12:25+02:00
i915: fix i915_set_vertex_buffers() related refcnt imbalance and remove redundancies
Indeed, this resource was assigned twice and was not properly freed.
For instance, this issue is triggered with:
"piglit/bin/glsl-fs-pointcoord -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.
Fixes: 0278d1fa323c ("gallium: add unbind_num_trailing_slots to set_vertex_buffers")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27572>
(cherry picked from commit 22c399320be122f819f493e252dc785e3067fd32)
-
3e789ce5
by Ian Romanick at 2025-04-10T17:12:25+02:00
brw/nir: Use offset() for all uses of offs in emit_pixel_interpolater_alu_at_offset
This is necessary to appropriately uniformize the first component
access of a convergent vector. Without this, this is produced:
load_payload(16) %18:D, 0d, 0d NoMask group0
add(32) %21:F, %18+0.0:F, 0.5f
add(32) %22:F, %18+2.0<0>:F, 0.5f
This is the correct code:
load_payload(16) %18:D, 0d, 0d NoMask group0
add(32) %21:F, %18+0.0<0>:F, 0.5f
add(32) %22:F, %18+2.0<0>:F, 0.5f
Without 38b58e286fa, the code generated was more incorrect, but happened
to work for this test case:
load_payload(16) %18:D, 0d, 0d NoMask group0
add(32) %21:F, %18+0.0<0>:F, 0.5f
add(32) %22:F, %18+0.4<0>:F, 0.5f
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 38b58e286fa ("brw/nir: Fix source handling of nir_intrinsic_load_barycentric_at_offset")
Closes: #12969
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34427>
(cherry picked from commit cb69d019cfbdaa2c4bbfd73031fa1867b593178c)
-
35ad8014
by Patrick Lerda at 2025-04-10T17:12:25+02:00
i915: fix slab_create() related memory leaks
For instance, this issue is triggered with "piglit/bin/fcc-blit-between-clears -auto -fbo":
Direct leak of 836 byte(s) in 1 object(s) allocated from:
#0 0xb71eb6f2 in malloc (/usr/lib/libasan.so.6+0xb26f2)
#1 0xaefadc78 in slab_add_new_page ../src/util/slab.c:179
#2 0xaefadc78 in slab_alloc ../src/util/slab.c:221
#3 0xaef7d461 in i915_texture_transfer_map ../src/gallium/drivers/i915/i915_resource_texture.c:789
#4 0xac9e931e in pipe_texture_map ../src/gallium/auxiliary/util/u_inlines.h:555
#5 0xac9e931e in _mesa_map_renderbuffer ../src/mesa/main/renderbuffer.c:494
#6 0xad49c5e4 in readpixels_memcpy ../src/mesa/main/readpix.c:260
#7 0xad49c5e4 in _mesa_readpixels ../src/mesa/main/readpix.c:898
#8 0xad5d8cfe in st_ReadPixels ../src/mesa/state_tracker/st_cb_readpixels.c:568
#9 0xad4a0caf in read_pixels ../src/mesa/main/readpix.c:1199
#10 0xad4a0caf in _mesa_ReadnPixelsARB ../src/mesa/main/readpix.c:1216
#11 0xad4a155b in _mesa_ReadPixels ../src/mesa/main/readpix.c:1231
or "piglit/bin/fcc-read-to-pbo-after-clear -auto":
Direct leak of 772 byte(s) in 1 object(s) allocated from:
#0 0xb726b6f2 in malloc (/usr/lib/libasan.so.6+0xb26f2)
#1 0xaf0adc88 in slab_add_new_page ../src/util/slab.c:179
#2 0xaf0adc88 in slab_alloc ../src/util/slab.c:221
#3 0xaf07aad7 in i915_buffer_transfer_map ../src/gallium/drivers/i915/i915_resource_buffer.c:75
#4 0xad10de74 in pipe_buffer_map_range ../src/gallium/auxiliary/util/u_inlines.h:398
#5 0xad10de74 in _mesa_bufferobj_map_range ../src/mesa/main/bufferobj.c:499
#6 0xad5677ce in _mesa_map_pbo_dest ../src/mesa/main/pbo.c:308
#7 0xad59be3b in _mesa_readpixels ../src/mesa/main/readpix.c:894
#8 0xad6d8cfe in st_ReadPixels ../src/mesa/state_tracker/st_cb_readpixels.c:568
#9 0xad5a0caf in read_pixels ../src/mesa/main/readpix.c:1199
#10 0xad5a0caf in _mesa_ReadnPixelsARB ../src/mesa/main/readpix.c:1216
#11 0xad5a155b in _mesa_ReadPixels ../src/mesa/main/readpix.c:1231
Fixes: e7a73b75a0db ("gallium: switch drivers to the slab allocator in src/util")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27570>
(cherry picked from commit 92802ea90a7e1ec7b70d6ba2f4c6d95f67d88eaf)
-
737b1839
by Patrick Lerda at 2025-04-10T17:12:25+02:00
i915: fix nir_to_tgsi() related memory leak
For instance, this issue is triggered with "piglit/bin/glx-multithread-texture -auto -fbo":
Direct leak of 256 byte(s) in 1 object(s) allocated from:
#0 0xb71eda62 in __interceptor_realloc (/usr/lib/libasan.so.6+0xb2a62)
#1 0xadd5a32f in tokens_expand ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:239
#2 0xadd5a32f in get_tokens ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:262
#3 0xadd62519 in copy_instructions ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2079
#4 0xadd62519 in ureg_finalize ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2129
#5 0xadd64bde in ureg_get_tokens ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2206
#6 0xade377d0 in nir_to_tgsi_options ../src/gallium/auxiliary/nir/nir_to_tgsi.c:4043
#7 0xade3da63 in nir_to_tgsi ../src/gallium/auxiliary/nir/nir_to_tgsi.c:3831
#8 0xaeb606c9 in i915_create_vs_state ../src/gallium/drivers/i915/i915_state.c:662
#9 0xac781a2c in st_create_common_variant ../src/mesa/state_tracker/st_program.c:720
#10 0xac78e8a4 in st_get_common_variant ../src/mesa/state_tracker/st_program.c:773
#11 0xac78fc10 in st_precompile_shader_variant ../src/mesa/state_tracker/st_program.c:1259
#12 0xac78fc10 in st_finalize_program ../src/mesa/state_tracker/st_program.c:1345
#13 0xac790b1a in st_program_string_notify ../src/mesa/state_tracker/st_program.c:1378
#14 0xace457a9 in _mesa_get_fixed_func_vertex_program ../src/mesa/main/ffvertex_prog.c:1397
#15 0xac5ef8db in update_program ../src/mesa/main/state.c:281
#16 0xac5f0ece in _mesa_update_state_locked ../src/mesa/main/state.c:560
#17 0xac5f1653 in _mesa_update_state ../src/mesa/main/state.c:593
#18 0xacdf9fe2 in _mesa_DrawArrays ../src/mesa/main/draw.c:1403
Fixes: 487a49332592 ("i915g: Add support for per-vertex point size.")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27570>
(cherry picked from commit 5af5f508b1f7d91cbe446adf13a8365fdc98b00e)
-
9315eb14
by Patrick Lerda at 2025-04-10T17:12:25+02:00
i915: fix draw_create_fragment_shader() related memory leak
For instance, this issue is triggered with "piglit/bin/fcc-blit-between-clears -auto -fbo":
Direct leak of 16400 byte(s) in 5 object(s) allocated from:
#0 0xb720689a in __interceptor_calloc (/usr/lib/libasan.so.6+0xb289a)
#1 0xaf10f896 in draw_create_fragment_shader ../src/gallium/auxiliary/draw/draw_fs.c:47
#2 0xaef64619 in i915_create_fs_state ../src/gallium/drivers/i915/i915_state.c:550
#3 0xae16a955 in ureg_create_shader ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2194
#4 0xae17f45f in ureg_create_shader_with_so_and_destroy ../src/gallium/auxiliary/tgsi/tgsi_ureg.h:150
#5 0xae17f45f in ureg_create_shader_and_destroy ../src/gallium/auxiliary/tgsi/tgsi_ureg.h:159
#6 0xae17f45f in util_make_fs_blit_zs ../src/gallium/auxiliary/util/u_simple_shaders.c:365
#7 0xaf13300e in blitter_get_fs_texfetch_depth ../src/gallium/auxiliary/util/u_blitter.c:1157
#8 0xaf13300e in util_blitter_cache_all_shaders ../src/gallium/auxiliary/util/u_blitter.c:1322
#9 0xaef6b738 in i915_create_context ../src/gallium/drivers/i915/i915_context.c:233
#10 0xacb33c49 in st_api_create_context ../src/mesa/state_tracker/st_manager.c:986
#11 0xac845740 in dri_create_context ../src/gallium/frontends/dri/dri_context.c:178
#12 0xac854d97 in driCreateContextAttribs ../src/gallium/frontends/dri/dri_util.c:631
#13 0xb6ce79a3 in dri2_create_context_attribs ../src/glx/dri2_glx.c:240
#14 0xb6c9606f in dri_common_create_context ../src/glx/dri_common.c:665
#15 0xb6ca4f00 in CreateContext ../src/glx/glxcmds.c:322
#16 0xb6ca5c0b in glXCreateNewContext ../src/glx/glxcmds.c:1449
Fixes: 1a69b50b3b44 ("i915g: Fix point sprites.")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27570>
(cherry picked from commit f0cfc1bbdcf2e1c7060275b8baec8f797c4b4da2)
-
5449bd2e
by Samuel Pitoiset at 2025-04-10T18:06:29+02:00
radv: determine if HiZ/HiS is enabled earlier on GFX12
To lower CPU overhead of the hardware workaround.
Backport-to: 25.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
(cherry picked from commit 11b6d2ba60d386ecc69990d80dabf11f097164db)
-
3c932e78
by Samuel Pitoiset at 2025-04-15T17:24:05+02:00
radv: add a workaround for buggy HiZ/HiS on GFX12
HiZ/HiS is buggy and can cause random GPU hangs when stencil is enabled.
There are basically two alternatives but RADV follows RadeonSI and emit
a dummy RELEASE_MEM packet after every draw which should workaround the
issue and maintain performance.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12944
Backport-to: 25.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
(cherry picked from commit 6388db03c8b438c78b34307be31cca1b0ecbf036)
-
3c6e241f
by Samuel Pitoiset at 2025-04-15T17:24:55+02:00
radv: apply the workaround for buggy HiZ/HiS on GFX12 for DGC
Backport-to: 25.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
(cherry picked from commit d2da54e6f38e8982099758561da0ac52327526ea)
-
4fde7193
by Eric Engestrom at 2025-04-15T23:49:17+02:00
.pick_status.json: Update to 58321cf2e57279079bf742be1063ac2900ea2436
-
5ad25a98
by Alyssa Rosenzweig at 2025-04-15T23:54:45+02:00
panfrost: invert and rename no_ubo_to_push flag
only the GL driver actually wants this, neither panvk nor internal shaders do.
Cc'd as a prereq to the next patch
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34193>
(cherry picked from commit f179f6952f9ca351c8512dcd78b4eb2c9eb13497)
-
aed66adb
by Caterina Shablia at 2025-04-15T23:54:46+02:00
panfrost: don't overwrite push uniforms and sysvals UBO with user's UBO
ss->info.ubo_mask includes the push+sysval UBO so if there's a user
UBO bound at the same index as the push+sysval UBO, without this
change we end up writing a descriptor for the user UBO at that index.
Fixes: 3b3cd59f ("panfrost: Launch transform feedback shaders")
Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34193>
(cherry picked from commit 6948ab727f4ad3ca50e8052998a2d0e498bea95d)
-
e98a9127
by Caterina Shablia at 2025-04-15T23:54:47+02:00
panfrost: update nr_uniform_buffers before dispatching XFB
Currently nr_uniform_buffers will be whatever the previous draw set
for its vertex shader, which is not what the XFB shader usually
expects.
Fixes: c246af0d ("panfrost: Only upload UBOs when needed")
Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34193>
(cherry picked from commit 2c75b6bb01356a3c6061b06194474beffa4c7b67)
-
c4ef3cb6
by Alyssa Rosenzweig at 2025-04-15T23:54:48+02:00
panfrost: do not push "true" UBOs
Panfrost supports pushing uniforms to hardware uniform registers (RMU/FAU for
Midgard/Bifrost respectively). Since OpenGL uniforms are lowered to UBO #0, it
does this with a pass that pushes UBOs. That's good!
The pass also pushes 'true' OpenGL UBOs, since they look the same in the backend
at this point. This is where the trouble comes in:
- True UBOs are allocated in GPU BOs, not CPU allocated buffers. That means it's
write-combine memory, which we cannot read from efficiently (at least
depending on coherency details that were never plumbed through panfrost.ko and
unlikely to be replumbed now that panthor is the new hot stuff). So, pushing
true UBOs reduces GPU overhead at the cost of tremendous CPU overhead. This is
dubious... When I benchmarked this on MT8192 in early 2023, this pushing
improved FPS in SuperTuxKart but hurt FPS in Dolphin.
- True UBOs can be written on the GPU. In OpenGL, we have batch tracking
infrastructure to sort this mess out in theory. What this means is that
pushing UBOs requires us to flush writers AND STALL at draw-time. If this is
ever hit, our performance is utterly trashed. But it gets worse.
- True UBOs can be written in the same batch that reads them. For example, we
could bind a buffer as a transform feedback buffer, do a draw with XFB, then
rebind as a UBO and do a draw reading. This is where we collapse -- our logic
will flush the writer, which is the same batch we were in the middle of
enqueueing a draw to. When we try to push words, we'll crash with theatrics.
This could be solved by smartening the batch tracking logic but it's not
trivial by any means.
So, pushing true UBOs on the CPU is broken and can hurt performance. Stop doing
it!
Long term, the solution will be to push on the GPU instead. This avoids all of
these issues. This can be done with a compute kernel or with CSF instructions.
The Vulkan driver will likely have to do this for performance, since pushing
UBOs from the CPU is utterly broken in Vulkan for the above reasons.
I have a branch somewhere doing this on v9 but I'm doing this on NIR time to
unblock a core change that was crashing piglit due to this pile of unsoundness.
Let's fix the correctness issues first, then someone can look at recovering
performance later when we're not blocking unrelated work.
Fixes corruption in Piglit test
gles-3.0-transform-feedback-uniform-buffer-object, which writes a UBO with
transform feedback. (I suspect the test still doesn't pass for the same reason
it's broken on other tilers. But that's a better place to be than oodles of
memory corruption.)
According to CI, fixes spec@arb_uniform_buffer_object@rendering{-dsa}-offset.
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34193>
(cherry picked from commit 59a3e12039cde5df1451193557512b38cea0039e)
-
b9d5a60d
by Boris Brezillon at 2025-04-16T15:37:02+02:00
vulkan/state: Fix input attachment map state initialization/copy
vk_dynamic_graphics_state_copy() is not copying the input attachment
map, and color_attachment_count is not initialized in
vk_dynamic_graphics_state_init_ial().
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32540>
(cherry picked from commit 38e546c202333c70f4e0d761607257f9d1e46e61)
-
fc463130
by Boris Brezillon at 2025-04-16T15:37:02+02:00
vk/pass: Add input attachment location info
For drivers using the render pass emulation provided by the
runtime, it's important to express the mapping between
depth/stencil/color attachments and input attachments using
VkRenderingInputAttachmentIndexInfoKHR, otherwise those drivers
have to special-case emulated render passes in their
CmdBeginRendering() implementation.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32540>
(cherry picked from commit be2532fc00363cf60455390b3fb51d4c5969bd7c)
-
499324de
by Lionel Landwerlin at 2025-04-16T15:37:02+02:00
anv: fix self dependency computation
Some upcoming changes in the runtime will make it impossible to rely
on the pipeline or runtime information to know whether a fragment
shader has input attachments.
Instead we gather that information at compile time and store it in our
shader bind_map.
At runtime we check whether the fragment shader has input attachments
and whether those map to the runtime depth/stencil input attachments
to set the 3DSTATE_PS_EXTRA::PixelShaderKillsPixel.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d2f7b6d5a7 ("anv: implement VK_KHR_dynamic_rendering_local_read")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32540>
(cherry picked from commit e321c438dc00ab15082d81702825786e99e8c205)
-
0824f95f
by Tapani Pälli at 2025-04-16T15:37:02+02:00
mesa: clamp texbuf query size to MAX_TEXTURE_BUFFER_SIZE
Fixes upcoming CTS test checking for clamping.
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34428>
(cherry picked from commit 3bc016bb6caa15c3bb16053cd9e2e601703080ca)
-
f3db21ec
by Tapani Pälli at 2025-04-16T15:37:02+02:00
mesa: various fixes for ClearTexImage/ClearTexSubImage
Fixes some upcoming CTS tests for texture clears.
* some drivers will attempt to issue clears with zero range
and hit asserts/crashes (spec clarification for negative
values)
* fix error thrown with negative values to match spec
* fix cases for clearing generic compressed formats
* fix negative case of using color format while having
depth/stencil internalformat and vice versa
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34428>
(cherry picked from commit 30d78dc94282bc7454042b95c8c7aca6bb3de8a5)
-
60a2b66f
by Lars-Ivar Hesselberg Simonsen at 2025-04-16T15:37:03+02:00
vk/sync: Fix execution only barriers
With vkCmdPipelineBarrier, it's possible to specify a barrier with
pipeline stages but without any memory barriers. These might not be
practical, but are legal Vulkan code.
Barriers like this are currently ignored in mesa, as we only convert
barriers with passed memory barriers into vkCmdPipelineBarrier2.
This commit adds handling of execution only barriers by converting them
into a memory barrier without access masks.
Fixes: 97f0a4494b9 ("vulkan: implement legacy entrypoints on top of VK_KHR_synchronization2")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34187>
(cherry picked from commit 20c0d169e41272d54107024be13ff1e4345c96f9)
-
f0186267
by Lionel Landwerlin at 2025-04-16T15:37:03+02:00
brw: fix Wa_22013689345 emission
2 problems :
- not detecting null destination correctly
- applied too late using SHADER_OPCODE_MEMORY_FENCE, when lowering
already happened
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34319>
(cherry picked from commit 06ad9a25e557498bcb10d9a79ea723f7a78448a3)
-
b839ea42
by Erik Faye-Lund at 2025-04-16T15:37:03+02:00
panfrost: fixup typo in 16x sample-pattern
This is an n-queen pattern, where no two values should be on the same
row or column. But this and the second to last element has the same y
component, and neither has the negative one.
Let's fix this up by setting the first value to the negative value. This
matches the D3D 16x sample pattern.
Fixes: a61fb629665 ("panfrost: Upload sample positions on device init")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33925>
(cherry picked from commit b4ebffa1aa2bd68a468e040fd0ca1f319b8c4c4a)
-
15b2a440
by David Rosca at 2025-04-16T15:37:03+02:00
radv/video: Fix msg header total size
It needs to include also codec msg size.
Cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34449>
(cherry picked from commit 34031531fcc496868ef03e7e959bfe758761ebef)
-
8ffedebf
by David Rosca at 2025-04-16T15:37:03+02:00
radv/video: Fix encode session info for VCN3+
Last dword should be 0.
Cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34449>
(cherry picked from commit 7249d9548ea71aafb9c98574e616d3aaddb8ae9a)
-
aedb7eb7
by Caio Oliveira at 2025-04-16T15:37:03+02:00
nir/load_store_vectorize: Skip new bit-sizes that are unaligned with high_offset
Otherwise this would require combining two values to produce a single
(new bit-size) channel, which vectorize_stores() don't handle. The pass
can still keep trying smaller bit-sizes.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12946
Fixes: ce9205c03bd ("nir: add a load/store vectorization pass")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34414>
(cherry picked from commit 2ed79f80ba894bba0d340708c326ac9d59d5795e)
-
ea963009
by Faith Ekstrand at 2025-04-16T15:37:04+02:00
nvk/nvkmd: Check the correct flag for the Kepler GART workaround
Fixes: 1db57bb41424 ("nvk/nvkmd: Rework memory placement flags")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34495>
(cherry picked from commit 5c81b3546f093aa84db08327c797b0e7e4ff186e)
-
5d6c8200
by Faith Ekstrand at 2025-04-16T15:37:04+02:00
nil: Multiply by array_stride_B instead of adding
Fixes: 5577128c8315 ("nil: Rewrite the TIC code in Rust")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34495>
(cherry picked from commit fadac25b0cb1696d69c0cbc245a2141366d48c2a)
-
27342a55
by Erik Faye-Lund at 2025-04-16T15:37:04+02:00
nir/lower_tex: use texture_mask instead of shifting on use
In commit 292ac71a4a8 ("nir/lower_tex: handle deref casts"), we avoided
using texture_index when a texture instruction contained a variable
deref. There's no good reason why this should be done to some of the
lowering, but not all.
So let's fix up code-paths that were added after this change to do the
same.
The first two patches here crossed paths with the commit that introduced
texture_mask, so it's not strange that the change was missed. The last
one seems to have just copied what was done around it, propagating the
issue.
Fixes: 880b00dc599 ("nir/lower_tex: Add support for lowering YUYV formats")
Fixes: 1358d93650b ("nir/lower_tex: Add support for lowering Y41x formats")
Fixes: 65d6f5aed28 ("nir: add options to lower y_vu, yv_yu, yx_xvxu and xy_vxux")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34365>
(cherry picked from commit 41b136f674e440eeab7fcc16d41033f5e31b39ca)
-
5a685929
by Eric R. Smith at 2025-04-16T15:37:04+02:00
panfrost: fix transaction elimination crc valid calculation
The setting of the clean_pixel_write_enable flag in pan_prepare_rt
was not consistent with the crc valid calculations in pan_emit_fbd.
This caused the crc_valid flag to not be accurate, causing transaction
elimination to fail.
Fixes: eac8f1d4602 ("Revert "panfrost: Disable CRC by default"")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34408>
(cherry picked from commit 69a6db4b2b77ee6422c477946884efb5f0798935)
-
0f3b6ba7
by Mike Blumenkrantz at 2025-04-16T15:37:04+02:00
zink: don't set shared block stride without KHR_workgroup_memory_explicit_layout
this is illegal
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33651>
(cherry picked from commit 1c0de360bcb61c4c33e6eaf9b5144013c4708a13)
-
31e9893f
by Mike Blumenkrantz at 2025-04-16T15:37:04+02:00
zink: stop setting ArrayStride on image arrays
this is illegal
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33651>
(cherry picked from commit b4e35356509663816dc3239902c2c61243edae7f)
-
9babb231
by Jose Maria Casanova Crespo at 2025-04-16T15:37:04+02:00
v3dv: avoid TFU reading unmapped pages beyond the end of the buffers
TFU units is doing a readahead of 64 bytes. This is causing invalid read
MMU errors that can be observed at the nightly full Vulkan runs on
Broadcom devices.
04:13:59.969: [ 85.623205] v3d 1002000000.v3d: MMU error from client TLB (3) at 0x4869000, pte invalid
04:14:05.408: [ 91.019321] v3d 1002000000.v3d: MMU error from client TLB (3) at 0x5209000, pte invalid
04:14:05.413: [ 91.031662] v3d 1002000000.v3d: MMU error from client TLB (3) at 0x7521000, pte invalid
Although the log reports the TLB the real culprit is the TFU. A fix
to the kernel was submitted to fix AXI ID on V3D 4.2 and 7.1
So doing an over-allocation of 64-bytes at v3dv_AllocateMemory is
the simplest method to make these MMU errors itp disapear.
Running ./deqp-vk for an hour, we can see that ~%40 of allocations
would need an extra page (4096 bytes) to accomodate this 64 bytes
padding.
Fixes: ca330f7f046 ("v3dv: implement VK_EXT_memory_budget")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34475>
(cherry picked from commit 0bcb82048cba02204f975077afab8dddfbc4b398)
-
15ea052c
by Marek Olšák at 2025-04-16T15:37:05+02:00
radeonsi: make si_shader_selector::main_shader_part_* an iterable union
for the next commit
Fixes: 8ba718fb7db - radeonsi/gfx12: use ACO for streamout because it's faster
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34491>
(cherry picked from commit 4865ac57cce58074cb93eaa17522d8294511724d)
-
1fe9f5d3
by Marek Olšák at 2025-04-16T15:37:05+02:00
radeonsi: add ACO-specific main shader parts
We can't have merged shaders where the first part is compiled using ACO
and the second part is compiled using LLVM.
Add ACO-specific main shader parts to fix that.
This happens when ACO is enabled for gfx12 streamout where GS can be paired
with a previous shader compiled by LLVM.
Fixes: 8ba718fb7db - radeonsi/gfx12: use ACO for streamout because it's faster
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34491>
(cherry picked from commit 7f7d6deb187a44e699c3c3071670ce656facc966)
-
238399e9
by Erik Faye-Lund at 2025-04-16T15:37:05+02:00
panvk: set shared_addr_format
We need to set this, otherwise we end up failing tests.
Fixes: 4e111c259cd ("panvk: Lower shared memory")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34514>
(cherry picked from commit e77a81529953c06f00d2364a9d620141d7cef791)
-
6c6c6873
by Erik Faye-Lund at 2025-04-16T15:37:05+02:00
panvk: claim official conformance on v10
It's official, PanVK is Vulkan 1.1 conformant on v10. Let's make this
clear.
Backport-to: 25.0
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34500>
(cherry picked from commit 65b7d2e8656d52c9eabf3995e2fd858ceac95127)
-
c906f565
by Kenneth Graunke at 2025-04-16T15:37:05+02:00
brw: Track the largest VGRF size in liveness analysis
We're already looking at this data to calculate the per-component
vars_from_vgrf[] and vgrf_from_vars[] mappings, so just record the
largest VGRF size while we're here. This will allow passes to size
arrays based on the actual size needed, rather than hardcoding some
fixed size. In many cases, MAX_VGRF_SIZE(devinfo) is larger than
necessary, because e.g. vec5 sparse sampling results aren't used.
Not hardcoding this means we can also temporarily handle very large
VGRFs which we know will be split eventually, without having to
increase the maximum which is ultimately used for RA classes.
Cc: mesa-stable
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34461>
(cherry picked from commit ea468412f672b07d498af9a910bf5047106f6d84)
-
0d1e83ca
by Kenneth Graunke at 2025-04-16T15:37:05+02:00
brw: Use live->max_vgrf_size in register coalescing
We already require liveness, so just use the actual maximum size we saw
instead of a hardcoded pessimal size.
Cc: mesa-stable
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34461>
(cherry picked from commit 4b27b5895c9ef8a597c061e3b5fdf15e1424cc22)
-
7a588a5a
by Kenneth Graunke at 2025-04-16T15:37:06+02:00
brw: Use live->max_vgrf_size in pre-RA scheduling
Post-RA scheduling doesn't use liveness analysis, so we continue using
MAX_VGRF_SIZE(devinfo). But for pre-RA scheduling, we now use
live->max_vgrf_size.
This helps get us to a place where we can emit arbitrarily large VGRFs
early on in compilation, but which will be split and cleaned up prior to
register allocation. It may also allocate smaller arrays in practice
since MAX_VGRF_SIZE(devinfo) assumes the worst case scenario for things
we actually could need to allocate.
Cc: mesa-stable
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34461>
(cherry picked from commit a45583f07812015fdcd83257645cb17b2285a456)
-
bb83fd7a
by Kenneth Graunke at 2025-04-16T15:37:06+02:00
brw: Don't assert about MAX_VGRF_SIZE in brw_opt_split_virtual_grfs()
This allows us to create temporary VGRFs that are larger than
MAX_VGRF_SIZE(devinfo), which will be split eventually. They may not
be split on the initial pass, because we may need LOAD_PAYLOAD lowering,
copy propagation, and so on to occur first. So we allow registers to
exceed that size initially.
The "Register allocation relies on split_virtual_grfs()" assertion in
brw_reg_allocate.cpp still asserts that all VGRFs which reach the
register allocator have been properly split.
One case where this is useful is for vectorizing convergent block loads.
We create temporaries to splat the SIMD1 values out to SIMD(N), which
can lead to some very large temporaries. However, copy propagation and
so on ultimately eliminate these and they'll get split down to proper
sizes or elided entirely in the end.
(Note: both this and the prior commits from this merge request are
needed to close the linked issue.)
Cc: mesa-stable
Reviewed-by: Matt Turner <mattst88@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12324
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34461>
(cherry picked from commit eb1ec9cf8e6f62f0664bb9886ac6c35b35cebc6b)
-
9cbca286
by Eric Engestrom at 2025-04-16T15:50:33+02:00
.pick_status.json: Update to 555821ff93118d4a6ea441127cd0427a95743d47
-
651c53fc
by Ryan Mckeever at 2025-04-16T15:52:03+02:00
pan/format: Update format flags to follow HW spec
Fixes: 861e7dca ("panfrost: Switch formats to table")
Signed-off-by: Ryan Mckeever <ryan.mckeever@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33787>
(cherry picked from commit b9a9798c4685e6db15378c35dc03a5d69a52a63c)
-
48bfe6db
by Marek Olšák at 2025-04-17T01:24:16+02:00
ac/surface: make gfx12_estimate_size reusable by gfx6
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12466
Fixes: c87ce78d - ac/surface: enable thick tiling for 3D textures for better perf on gfx6-8
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
(cherry picked from commit 195e7b4f75305b1559212c50f3697aeeb0d9eb99)
-
ba2a1ba2
by Marek Olšák at 2025-04-17T01:24:17+02:00
ac/surface: select 3D tile mode without overallocating too much for gfx6-8
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12466
Fixes: c87ce78d - ac/surface: enable thick tiling for 3D textures for better perf on gfx6-8
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
(cherry picked from commit 78cacfd9cecc712fa670bf13062912dcfd8836fa)
-
0e9f9457
by David Rosca at 2025-04-17T01:24:17+02:00
radeonsi/vpe: Use float division to get scaling ratio
Fixes: e85a6b6a63a ("radeonsi/vpe: check reduction ratio")
Reviewed-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34519>
(cherry picked from commit bd6f9e8aee0bb9ceba345b8c9434436dd82ac59f)
-
4437cdab
by Pierre-Eric Pelloux-Prayer at 2025-04-17T01:24:17+02:00
winsys/amdgpu: disable VM_ALWAYS_VALID
The referenced commit has been identified as the root cause of
graphic artifacts / hangs on some APUs.
For now disable AMDGPU_GEM_CREATE_VM_ALWAYS_VALID on all chips
except when user queues are used.
See https://gitlab.freedesktop.org/mesa/mesa/-/issues/12809.
Fixes: 8c91624614c ("winsys/amdgpu: use VM_ALWAYS_VALID for all VRAM and GTT allocations")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34547>
(cherry picked from commit 555821ff93118d4a6ea441127cd0427a95743d47)
-
bd6a2779
by Eric Engestrom at 2025-04-17T02:04:03+02:00
docs: add release notes for 25.0.4
-
d0f87200
by Eric Engestrom at 2025-04-17T02:04:03+02:00
VERSION: bump for 25.0.4