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[Git][xorg-team/lib/mesa][debian-unstable] 71 commits: docs: add sha256sum for 24.1.0



Title: GitLab

Timo Aaltonen pushed to branch debian-unstable at X Strike Force / lib / mesa

Commits:

  • e844211d
    by Eric Engestrom at 2024-05-22T20:30:50+02:00
    docs: add sha256sum for 24.1.0
    
  • f361b348
    by Friedrich Vock at 2024-05-22T21:23:13+02:00
    radv: Use max_se instead of num_se where appropriate
    
    Scratch allocation needs to happen using max_se, otherwise there can be
    hangs.
    
    Cc: mesa-stable
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29202>
    (cherry picked from commit db564a40b3bd936053e5e14d1f0df6b96e305a08)
    
  • fd3f9a15
    by Friedrich Vock at 2024-05-22T21:23:13+02:00
    radeonsi: Use max_se instead of num_se where appropriate
    
    Scratch allocation needs to happen using max_se, otherwise there can be
    hangs.
    
    Cc: mesa-stable
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29202>
    (cherry picked from commit 18c736bcfc55b8fa309ede02332b9c7a2ca22e78)
    
  • 83fc0888
    by Timur Kristóf at 2024-05-22T21:23:13+02:00
    radv: Fix TCS -> TES I/O linking typo of VARYING_SLOT vs. BIT.
    
    In these bitwise expressions, VARYING_BIT_* should be used,
    but the code mistakenly used VARYING_SLOT_* which is wrong.
    
    Fixes: 0e481a4adcd8006256c27d100a0a0f0c01a94171
    Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
    Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29327>
    (cherry picked from commit 3963e4b53aa73ef032709769585bdb1e3b6a8099)
    
  • 6206f4cf
    by Lionel Landwerlin at 2024-05-31T08:33:32+02:00
    .pick_status.json: Update to ce43d7eb7f97bdde61b184a99940c4b03c2f0929
    
  • 9d34ce91
    by Renato Pereyra at 2024-05-31T08:33:45+02:00
    anv: Attempt to compile all pipelines even after errors
    
    Per the Vulkan Spec section 10.1, the implementation is supposed to
    attempt to create all pipelines even if creation of any one pipeline
    in a create call fails. If more than one error occur, any one error
    is valid as a return value.
    
    Signed-off-by: Renato Pereyra <renatopereyra@chromium.org>
    Cc: mesa-stable
    Reviewed-by: Ivan Briano <ivan.briano@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29315>
    (cherry picked from commit 51d6162c80bb27281f014b72b52b12e7ef11db98)
    
  • 76874a44
    by Jose Maria Casanova Crespo at 2024-05-31T08:33:46+02:00
    v3d: fix CLE MMU errors avoiding using last bytes of CL BOs.
    
    The last V3D_CLE_READAHEAD bytes of the CLE buffer are unusable because
    using them would prefetch the next readahead bytes of the CL that would
    be outside the allocated BO. To guarantee that we can chain a BO to the
    current CL we always reserve space for the BRANCH packet.
    
    Not taking this into account has been generating kernel dmesg errors like
    "MMU error from client CLE".
    
    As V3D_CLE_READAHEAD is different from RPi4 (256 bytes) to RPi5 (1024 bytes).
    So we needed to rename v3d_cl.c to v3dX_cl.c to have different objects per
    V3D_VERSION.
    
    Extra assertions have been included to validate that we don't write
    packets over the usable size of the CL silently.
    
    v2: - Remove spurious blank line (Iago Toral)
        - Do not declare unusable the space needed for the BRANCH packet,
          and take it into account for all reservations.
    v3: - Handle BRANCH packet reserve only when CLE BO allocation is done.
    v4: - Assert on BO size updates that we are within the BO size.
          (Iago Toral)
    
    Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29023>
    (cherry picked from commit 11dce2ac8154237b74ee3c4bd2aaec685739f0cc)
    
  • 4f056182
    by Jose Maria Casanova Crespo at 2024-05-31T08:33:48+02:00
    v3dv: fix CLE MMU errors avoiding using last bytes of CL BOs.
    
    The last V3D_CLE_READAHEAD bytes of the CLE buffer are unusable because
    using them would prefetch the next readahead bytes of the CL that would
    be outside the allocated BO. To guarantee that we can chain a BO to the
    current CL we always reserve space for the BRANCH or
    RETURN_FROM_SUB_LIST packets.
    
    Not taking this into account has been generating kernel dmesg errors like
    "MMU error from client CLE".
    
    As V3D_CLE_READAHEAD is different from RPi4 (256 bytes) to RPi5 (1024 bytes).
    So we needed to rename v3dv_cl.c to v3dvX_cl.c to have different objects per
    V3D_VERSION.
    
    Extra assertions have been included to validate that we don't write
    packets over the usable size of the CL silently.
    
    v2: - Do not declare unusable the space needed for the BRANCH packet,
          but take it into account for all space reservations.
    v3: - Squash here ("v3dv: Secondary CL needs also to handle CLE readahead")
        - Remove spureous parenthesis (Iago Toral)
        - Refactor to avoid checking for needs_return_from_sub_list inside
          cl_alloc_bo adding unusable_space as new parameter.
    v4: - Improved logic for chaining BOs moving it to cl_alloc_bo using
          a new enum v3dv_cl_chain_type to identify the different kinds
          of BO chaining. Now we increase the size of the BO just before
          submitting the BRACH/RETURN_FROM_SUB_LIST packages.
    v5: - Assert on BO size updates that we are within the BO size.
          (Iago Toral)
    v6: - Remove changes at cmd_buffer_end_render_pass_secondary as we
          assumed that cl->bo was already allocated when ending the
          secondary CL, but it can be NULL. And this was already handle
          by current code.
    
    Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29023>
    (cherry picked from commit 26c8a5cd72108f078dc7c064d281412adab20710)
    
  • 47f91758
    by Jose Maria Casanova Crespo at 2024-05-31T08:33:49+02:00
    v3d: Increase alignment to 16k on CL BO on RPi5
    
    We increase the alignment to 16k for BOs allocated for the CL on RPi5 HW.
    So we have the same ratio of usable space because of HW readahead as
    than on RPi4, as readahead has been increased from 256 to 1024 bytes on
    RPi5.
    
    We have also concluded that when the kernel is running with 16k pages
    that is the default on Raspberry Pi 5 HW, BO allocations are aligned to
    16k so this increase has no cost and we would be using memory more
    efficiently.
    
    Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29023>
    (cherry picked from commit e2c624e74e3ae9c2b4bdad721b4fca9bd968f515)
    
  • 66404b7f
    by Jose Maria Casanova Crespo at 2024-05-31T08:33:52+02:00
    v3dv: Increase alignment to 16k on CL BO on RPi5
    
    We increase the alignment to 16k for BOs allocated for the CL on RPi5 HW.
    So we have the same ratio of usable space because of HW readahead as
    than on RPi4, as readahead has been increased from 256 to 1024 bytes on
    RPi5.
    
    We have also concluded that when the kernel is running with 16k pages
    that is the default on Raspberry Pi 5 HW, BO allocations are aligned to
    16k so this increase has no cost and we would be using memory more
    efficiently.
    
    Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29023>
    (cherry picked from commit bb77ac983e4f8a265141855e60ad2a5637c9b74d)
    
  • 60b60400
    by Jose Maria Casanova Crespo at 2024-05-31T08:33:53+02:00
    v3dv: V3D_CL_MAX_INSTR_SIZE bytes in last CL instruction not needed
    
    As we are marking the last V3D_CLE_READAHEAD bytes as unusable we don't
    need to reserve V3D_CL_MAX_INSTR_SIZE bytes for the CLE packet.
    
    This reverts c2601f0690843 ("v3dv: ensure at least V3D_CL_MAX_INSTR_SIZE
    bytes in last CL instruction")
    
    Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29023>
    (cherry picked from commit 7afebc15ce14c40a384c856ec19f84cac826ef0c)
    
  • 43025002
    by Lionel Landwerlin at 2024-05-31T08:34:16+02:00
    anv: fix shader identifier handling
    
    When compilation is required, we should return
    VK_PIPELINE_COMPILE_REQUIRED. The spec prevents the application from
    passing a module or SPIR-V code so we have nothing to compile if the
    cache lookup fails :
    
    VUID-VkPipelineShaderStageCreateInfo-stage-06844:
       If a shader module identifier is specified for this stage, a
       VkShaderModuleCreateInfo structure must not be present in the pNext
       chain
    
    VUID-VkPipelineShaderStageCreateInfo-stage-06848:
       If a shader module identifier is specified for this stage, module
       must be VK_NULL_HANDLE
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Cc: mesa-stable
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11208
    Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29340>
    (cherry picked from commit 5f2288095b86b70db8a9ed3bf0d06b960cf1b132)
    
  • 2e90216b
    by David Heidelberg at 2024-05-31T08:34:19+02:00
    ci/nouveau: move disabled jobs back from include into main gitlab-ci.yml
    
    Fixes: 9442571664e5 ("ci: separate hiden jobs to -inc.yml files")
    
    Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26758>
    (cherry picked from commit 6bc660a5429d0cae6ea3135c1262be5edbe94b25)
    
  • 304d3c45
    by Iago Toral Quiroga at 2024-05-31T08:34:24+02:00
    broadcom/compiler: make add_node return the node index
    
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343>
    (cherry picked from commit 901c4859970989a85c72bac9d71c5fd43b6deaff)
    
  • 946ce7a6
    by Iago Toral Quiroga at 2024-05-31T08:34:25+02:00
    broadcom/compiler: don't assign payload registers to spilling setup temps
    
    We read our payload registers first in the shader so we generally don't have
    to care about temps being allocated to them and stomping their value before
    we can read them. Hoewer, spilling setup instructions are an exception since
    these will be inserted first when there is any spilling in the program.
    To fix this, we flag RA nodes involved with these instructions so we can
    then try to avoid assiging these registers to them.
    
    Fixes CTS failures with V3D_DEBUG=opt_compile_time, particularly:
    dEQP-VK.binding_model.buffer_device_address.set0.depth2.basessbo.convertcheckuv2.nostore.single.std140.comp_offset_nonzero
    
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343>
    (cherry picked from commit cb83f25b39173db92d8ccaeac3a9b640f46f7651)
    
  • 1d9ae054
    by Iago Toral Quiroga at 2024-05-31T08:34:27+02:00
    broadcom/compiler: apply payload conflict to spill setup before RA
    
    We can emit spill setup before RA if we use scratch. In that case
    we have the same situation as during spilling, with the caveat that
    we have already emitted the instructions so we need to find them
    (they should be the only instructions ones before the instructions
    accessing payload registers) and flag them as such.
    
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343>
    (cherry picked from commit 865e682ad7ffcc97b931feb05f0541ac8a0f54fd)
    
  • 72614641
    by Lionel Landwerlin at 2024-05-31T08:52:19+02:00
    intel/brw: ensure find_live_channel don't access arch register without sync
    
    Another architecture register that requires some care before reading.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 49ee3ae9e8b ("intel/compiler: Lower FIND_[LAST_]LIVE_CHANNEL in IR on Gfx8+")
    Tested-by: Tapani Pälli <tapani.palli@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29319>
    (cherry picked from commit 2c65d90bc8500bb8ad0b9204798905e4d79fb283)
    
  • 4319c1c6
    by Valentine Burley at 2024-05-31T08:52:25+02:00
    wsi: Guard DRM-dependent function implementations with HAVE_LIBDRM
    
    Adress an implicit function declaration error by ensuring that DRM-dependent
    functions are only compiled when HAVE_LIBDRM is set.
    
    Fixes: 59813ae468d ("wsi: Add common infrastructure for explicit sync")
    Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
    Reviewed-by: Joshua Ashton <joshua@froggi.es>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29267>
    (cherry picked from commit d93d989e5d65922c6467cf61874f71665856bf80)
    
  • a2716f97
    by Iago Toral Quiroga at 2024-05-31T08:52:33+02:00
    v3dv: fix incorrect index buffer size
    
    When programming the size, we should take into account the
    offset from the start of the index buffer address.
    
    cc: mesa-stable
    
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29425>
    (cherry picked from commit 70aa470bdbfbafb6a2baa8f601296eb5a544637c)
    
  • 749a2f92
    by Jose Maria Casanova Crespo at 2024-05-31T08:52:34+02:00
    v3dv: Emit stencil draw clear if needed for GFXH-1461
    
    Fixes: 1e81bb05aeb (v3dv: implement workaround for GFXH-1461)
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29427>
    (cherry picked from commit 4835dc0e7f303696a11ef37dde2ea72e89211bbe)
    
  • 9e63dfe5
    by Amit Pundir at 2024-05-31T08:52:48+02:00
    android: Fix zink build failure
    
    Otherwise we run into following build error on Android:
    
        ld.lld: error: undefined symbol: galliumvk_driver_extensions
    
    Fixes: cfa955ed78be ("glx/egl: fix LIBGL_KOPPER_DISABLE")
    Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29475>
    (cherry picked from commit 38dfbae116722836c985179b8e5105ca9faee0ca)
    
  • e217c0f2
    by Dave Airlie at 2024-05-31T12:34:43+02:00
    Revert "zink: use a slab allocator for zink_kopper_present_info"
    
    This reverts commit 738fbddca8a1d8343e2ae322299de22a9ae108ae.
    
    This was missing locking which caused problems
    
    Closes: 11161
    Fixes: 738fbddca8a1 ("zink: use a slab allocator for zink_kopper_present_info")
    Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29338>
    (cherry picked from commit 2abdc846067de60e771b4ef2b230d9d7bcba80b6)
    
  • 40e1c62b
    by Samuel Pitoiset at 2024-05-31T12:39:09+02:00
    radv: fix setting a custom pitch for CB on GFX10_3+
    
    The gfx_level check was missing the version...
    
    Found by inspection.
    
    Fixes: 3f7ddaf2816 ("radv: implement setting a custom pitch to any multiple of 256B on gfx10.3+"
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29331>
    (cherry picked from commit 2867a07922b5c252fdb09b8c82839df1b518b46c)
    
  • 11fa599b
    by Eric R. Smith at 2024-05-31T12:46:28+02:00
    get_color_read_type: make sure format/type combo is legal for gles
    
    The GLES spec limits the valid combinations of format and type that
    may be returned by queries and/or used by ReadPixel. The list of valid
    combinations appears in table 8.2 of the GLES 3.2 spec. Our code for
    reporting the type and format of the current framebuffer, however,
    does not verify that the combination is legal for GLES. For example,
    RGBA and UNSIGNED_SHORT_1_5_5_5_REV is not a valid GLES combination,
    but it's what we were returning for a panthor 16 bit frame buffer.
    
    We can fix this either by changing the format or type that we return
    (internally we can handle any format/type combination). We advertise the
    read_format_bgra extension, so we could return GL_BGRA for the format.
    However, very few applications (including notably the Khronos CTS for GLES)
    cope well with BGRA. So instead we change the type to a non-_REV one
    so that the combination appears in the GLES spec table of legal values.
    
    Cc: mesa-stable
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29144>
    (cherry picked from commit 4d298673da9b05d826b960eece2e715a6b187330)
    
  • eb34c217
    by Natanael Copa at 2024-05-31T12:46:29+02:00
    nir/opt_varyings: reduce stack usage
    
    Avoid put a huge struct on stack to fix a stack overflow on musl libc.
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10988
    Fixes: c66967b5cb7a (nir: add nir_opt_varyings, new pass optimizing and compacting varyings)
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29375>
    (cherry picked from commit 02745186158c4ddeb5623deb0b500302b84c4350)
    
  • 882e411e
    by Eric R. Smith at 2024-05-31T12:46:31+02:00
    glsl: test both inputs when sorting varyings for xfb
    
    In the sort functions used to sort varyings in gl_nir_link_varyings,
    we were only checking the first input for whether or not it is xfb.
    Check both inputs, and also provide a definite order for the xfb vs.
    non-xfb varyings (the xfb come last, as the initial sort established).
    
    This fixes a problem encountered on panfrost, where qsort could
    mix xfb and non-xfb varyings which started out separate.
    
    Note that the sort is still not stable. We probably should make it
    stable, but that is a more extensive change that's handled in a later
    commit.
    
    Cc: mesa-stable
    Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
    Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29178>
    (cherry picked from commit 5102a922e76284c18e33cf4d6e9fc7952b4b2e02)
    
  • c5cd47de
    by David Rosca at 2024-05-31T12:46:33+02:00
    frontends/va: Fix leak when destroying VAEncCodedBufferType
    
    Fixes: be4287c3aa0 ("pipe: Extend get_feedback with additional metadata")
    Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29217>
    (cherry picked from commit cc03f2ea5a414d5153a9d89ed017b79d3970e4e4)
    
  • efaaeac6
    by Rhys Perry at 2024-05-31T12:46:36+02:00
    radv: malloc graphics pipeline stages
    
    This uses a lot of stack, which is apparently a problem for musl libc.
    
    Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
    Cc: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29379>
    (cherry picked from commit c9f5152ddd5cee3c160cc52a4c748da1dd42883d)
    
  • 7981b125
    by Karol Herbst at 2024-05-31T12:46:42+02:00
    nouveau: import nvif/ioctl.h file from libdrm_nouveau
    
    Technically this is UAPI and should be moved into the UAPI headers, but
    for now let's unbreak users this way.
    
    Fixes: 821f4c8d99a ("nouveau: import libdrm_nouveau")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29420>
    (cherry picked from commit 7c07f1cdfb6dbd46cc607367befbb1245e8c3866)
    
  • b3d9f853
    by Konstantin Seurer at 2024-05-31T12:46:47+02:00
    llvmpipe: Use a second LLVMContext for compiling sample functions
    
    LLVMContextr is not thread safe. There are many code paths that use
    llvmpipe_context::context and adding locking to all of them is
    difficult and adds unnecessary overhead. This approach restricts locking
    to lp_sampler_matrix, which makes covering all uses of the LLVMContext
    easy and only adds overhead when running lavapipe.
    
    Fixes: 7ebf7f4 ("llvmpipe: Compile sample functioins on demand")
    Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29397>
    (cherry picked from commit c31038ef98621f726f95f8b87c46d47bff8076b6)
    
  • a5bcd3a2
    by Tapani Pälli at 2024-05-31T12:46:49+02:00
    anv/android: enable emulated astc for applications
    
    This layer was blocking Android emulated ASTC support as it did not
    take "emu_astc_ldr" in to account.
    
    Cc: mesa-stable
    Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
    Tested-by: Mi, Yanfeng <yanfeng.mi@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29415>
    (cherry picked from commit 6836118cd28bf81021991e2356c6b8d455e7d726)
    
  • 9b3418e1
    by Eric R. Smith at 2024-05-31T12:46:52+02:00
    panfrost: fix some omissions in valhall flow control
    
    The code for checking flow control did not realize that
    `LD_TEX` and `LD_TEX_IMM` were memory accesses, and hence was
    not inserting waits where these were necessary. This showed up
    as flakes in KHR-GLES31.core.shader_image_load_store.basic-glsl-misc-fs
    
    Cc: mesa-stable
    Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29363>
    (cherry picked from commit 272dcaff012caf9d61f51a9d37a43cd03b1d6b42)
    
  • c0349c0e
    by Eric Engestrom at 2024-05-31T12:47:27+02:00
    .pick_status.json: Mark 410ca6a3e99c5c1c9c91f0f79bf43a35103cbd98 as denominated
    
  • 874fc52d
    by Yusuf Khan at 2024-05-31T13:27:18+02:00
    zink/query: begin time elapsed queries even if we arent in a rp
    
    If we arent in a renderpass, but still wanna start the time elapsed
    query(eg. to figure out how long some random operation will take) then
    this seems to fix that case.
    
    Signed-off-by: Yusuf Khan <yusisamerican@gmail.com>
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29411>
    (cherry picked from commit 42ee8d80d97b79e69c51582af3ae1ace2e49e0ce)
    
  • 7550d3bf
    by Mike Blumenkrantz at 2024-05-31T13:27:32+02:00
    zink: add atomic image ops to the ms deleting pass
    
    this otherwise results in nir validation errors
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11209
    
    Fixes: 90cf8d14d61 ("zink: add a pass to strip out multisample storage image ops")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29383>
    (cherry picked from commit bc29d2c9fcf76f70b33c1ea1795a309b5d4e3636)
    
  • 9ad3c9db
    by Iván Briano at 2024-05-31T13:27:35+02:00
    anv: check cmd_buffer is on a transfer queue more properly
    
    The queueFlags of the associated queue may have more flags than just the
    type of queue it is, based on what that queue supports, like sparse or
    protected content. Check that the queue is a blitter engine instead.
    
    Fixes a bunch of dEQP-VK.api.copy_and_blit.core.*_transfer on MTL with
    ANV_SPARSE=0
    
    Fixes: 17b8b2cffdb ("anv: Add support for a transfer queue on Alchemist")
    
    Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29336>
    (cherry picked from commit 8d098ecfea0fca662ece82f8162ea43991a4636d)
    
  • b29453c0
    by Samuel Pitoiset at 2024-05-31T13:27:37+02:00
    radv: fix flushing DB meta cache on GFX11.5
    
    Only GFX11 is affected by this hw bug.
    Found by inspection.
    
    Cc: mesa-stable
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29424>
    (cherry picked from commit 07a826ba938ff40a07d19c31e75892bdfe2c68a1)
    
  • cf9e82b2
    by Eric Engestrom at 2024-05-31T13:27:47+02:00
    freedreno/a6xx: fix kernel -> compute handling
    
    9b2780dcaf folds the kernel path into the compute path, and then adds
    a `compute -> compute` conversion that was very likely meant to be
    `kernel -> compute`, so fix that.
    
    Fixes: 9b2780dcaf486ebf91e9 ("freedreno/a6xx: Re-work fd6_emit_shader")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29458>
    (cherry picked from commit b8f1e95cbe2b18e814252472a4e1407d7cb076af)
    
  • fbdf6424
    by Kevin Chuang at 2024-05-31T13:27:48+02:00
    anv: Properly fetch partial results in vkGetQueryPoolResults
    
    Currently for an "unavailable" query, if VK_QUERY_RESULT_PARTIAL_BIT is
    set, anv will return (slot.end - slot.begin). This can cause underflow
    because slot.end might still be at the initial value of 0.
    
    This commit fixes the issue by returning 0 in that situation.
    
    Cc: mesa-stable
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29447>
    (cherry picked from commit f8ccf70c99bc921e50306cd48c62c9a47a8beb70)
    
  • 985fff6c
    by Lionel Landwerlin at 2024-05-31T13:27:48+02:00
    anv: fix utrace compute walker timestamp captures
    
    The output of the POSTSYNC_DATA has to be 32-byte aligned.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
    Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
    (cherry picked from commit 1511b25b0fae372f446185ebbd515e52a924c2cc)
    
  • d8246f60
    by Lionel Landwerlin at 2024-05-31T13:27:49+02:00
    anv: fix timestamp copies from secondary buffers
    
    We increased the size of the timestamps but only copied 64bit values
    from the secondaries.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
    Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
    (cherry picked from commit 1d4e56d22a6525484a4e4593173febc93855b116)
    
  • 75a8d20a
    by Karol Herbst at 2024-05-31T13:27:50+02:00
    gallium/vl: stub vl_video_buffer_create_as_resource
    
    It's used by radeonsi
    
    Cc: mesa-stable
    Signed-off-by: Karol Herbst <kherbst@redhat.com>
    Acked-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
    (cherry picked from commit 95871d48aadf4babf6b0106ff52c46b51a43b0c9)
    
  • 93ffbd4d
    by Karol Herbst at 2024-05-31T13:27:51+02:00
    gallium/vl: remove stubs which are defined in mesa_util
    
    Cc: mesa-stable
    Signed-off-by: Karol Herbst <kherbst@redhat.com>
    Acked-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
    (cherry picked from commit 6c9c48a3ae16a72d02b928b4346a53c56e43d597)
    
  • da37f699
    by Karol Herbst at 2024-05-31T13:27:55+02:00
    meson: centralize galliumvl_stub handling
    
    This way frontends can simply link against the stub, but get the full
    version if it's actually required (e.g. for radeonsi).
    
    Cc: mesa-stable
    Signed-off-by: Karol Herbst <kherbst@redhat.com>
    Acked-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
    (cherry picked from commit b6f281bcb5ee9e1ded5605a11244bd32bc08efb8)
    
  • 869a1170
    by Karol Herbst at 2024-05-31T13:27:56+02:00
    rusticl: link against libgalliumvl_stub
    
    Fixes compiling rusticl with certain configurations
    
    Cc: mesa-stable
    Signed-off-by: Karol Herbst <kherbst@redhat.com>
    Acked-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
    (cherry picked from commit 691a22f01505a2e858ba9fcd7c6a353e80355bce)
    
  • 91db0990
    by Eric R. Smith at 2024-05-31T13:27:57+02:00
    panfrost: change default rounding mode for samplers
    
    The SamplerDescriptor structure has a field which describes how
    floating point coordinates should be converted to fixed point.
    Setting this to "true" (which causes round to nearest even) fixes
    a failing CTS test.
    
    The CTS test in question is:
    dEQP-GLES31.functional.texture.border_clamp.range_clamp.linear_float_color
    
    The OpenGL spec is somewhat vague about how rounding is to be
    performed, so it appears both settings should be legal; this may
    indicate a problem with the CTS. Nevertheless "round to nearest even"
    is probably a better default and since it fixes the failing test we
    may as well use it.
    
    Cc: mesa-stable
    Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
    Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29464>
    (cherry picked from commit d91d2c275ef916e79e1e211cb1a86562d0e76f13)
    
  • 34aa074b
    by Eric Engestrom at 2024-05-31T13:29:32+02:00
    panfrost: mark tests as fixed
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29487>
    (cherry picked from commit 3ec480825e6b0ab790773de96261f56f953f05e0)
    
  • be0ea0c0
    by Eric Engestrom at 2024-05-31T13:29:32+02:00
    panfrost/ci: add missing genxml trigger path
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29487>
    (cherry picked from commit fbb306df155fab8882cd74ad7884931f8a42802c)
    
  • 15598aa4
    by Eric Engestrom at 2024-05-31T13:29:44+02:00
    .pick_status.json: Update to f32a258503b40e8e19a1498998b0d4f8b8abb488
    
  • ee3ed15b
    by Lionel Landwerlin at 2024-05-31T13:29:46+02:00
    intel: fix HW generated local-id with indirect compute walker
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 5e7f4ff97f ("intel: Add driver support for hardware generated local invocation IDs")
    Reviewed-by: Rohan Garg <rohan.garg@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29473>
    (cherry picked from commit a1ea0956b46778d0331e4ef60ebd2be057fd0e9f)
    
  • 3f3553df
    by Jose Maria Casanova Crespo at 2024-05-31T13:29:47+02:00
    v3dv: really fix CLE MMU errors on 7.1HW Rpi5
    
    Macro values that define values for different HW generations should
    use the V3DV_X helper instead of being defined under a V3D_VERSION #if
    condition.
    
    Without this change, the original V3D_CLE_READAHEAD and
    V3D_CLE_BUFFER_MIN_SIZE definitions used were only working for 4.2 HW.
    For the 7.1 HW (RPi5) the 4.2 definitions were applied.
    
    The CLE MMU errors were hidden as they were reported at dmesg as
    "MMU error from client PTB (1) at 0x1884200, pte invalid" instead of
    client CLE. So fixes all v3dv dmesg warnings for PTB MMU errors on RPi5.
    
    With this change we really don't need different functions per HW generation,
    so we rename back file v3dvx_cl.c to v3dv_cl.c. As before, we can use
    only the packets definitions for 4.2 HW as they use the same opcode as 7.1 HW.
    
    It fixes also an indentation error introduced with 26c8a5cd721.
    
    Fixes: bb77ac983e4 ("v3dv: Increase alignment to 16k on CL BO on RPi5")
    Fixes: 26c8a5cd721 ("v3dv: fix CLE MMU errors avoiding using last bytes of CL BOs.")
    
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29496>
    (cherry picked from commit 07d3d557832a223c574aa205db3f4acfb04161ad)
    
  • 68702b79
    by Jose Maria Casanova Crespo at 2024-05-31T13:29:48+02:00
    v3d: really fix CLE MMU errors on 7.1HW Rpi5
    
    Macro values that define values for different HW generations should
    use the V3DV_X helper instead of being defined under a V3D_VERSION #if
    condition.
    
    Without this change, the original V3D_CLE_READAHEAD and
    V3D_CLE_BUFFER_MIN_SIZE definitions used were only working for 4.2 HW.
    For the 7.1 HW (RPi5) the 4.2 definitions were applied.
    
    The CLE MMU errors were hidden as they were reported at dmesg as
    "MMU error from client PTB (1) at 0x1884200, pte invalid" instead of
    client CLE. So fixes all v3d dmesg warnings for PTB MMU errors on RPi5.
    
    With this change we really don't need different functions per HW generation,
    so we rename back file v3dx_cl.c to v3d_cl.c. As before, we can use
    only the packets definitions for 4.2 HW as they use the same opcode as 7.1 HW.
    
    Fixes: 11dce2ac815 ("v3d: fix CLE MMU errors avoiding using last bytes of CL BOs.")
    Fixes: e2c624e74e3 ("v3d: Increase alignment to 16k on CL BO on RPi5")
    
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29496>
    (cherry picked from commit f32a258503b40e8e19a1498998b0d4f8b8abb488)
    
  • 6c28c848
    by Juan A. Suarez Romero at 2024-05-31T18:06:37+02:00
    ci: define SNMP base interface on runner
    
    In order to turn on/off through SNMP DuT under PoE switch, the SNMP key
    in some vendors don't directly use the interface number, but a number
    shifted a base number.
    
    Define this base number as BM_POE_BASE environment in the runner.
    
    Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29306>
    (cherry picked from commit 90f8be9bda9b3841c41f48414897d89ebbceb43b)
    
  • f5a08510
    by Eric Engestrom at 2024-06-04T11:49:59+02:00
    .pick_status.json: Update to 0311ac50adb6016efcb455ea52b11f422d6b797e
    
  • a1ba39a9
    by Karol Herbst at 2024-06-04T11:50:07+02:00
    rusticl/event: fix deadlock when calling clGetEventProfilingInfo inside callbacks
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11243
    Cc: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29483>
    (cherry picked from commit 6f713a764fb412567caaabd9ae574822e79da383)
    
  • bb08cee9
    by Ian Romanick at 2024-06-04T11:50:09+02:00
    nir/search: Fix is_16_bits for vectors
    
    Require that all elements of a vector be representable as either
    int16_t or uint16_t.
    
    Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
    Fixes: 7ef45e661f4 ("intel/fs: Add constant propagation for ADD3")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148>
    (cherry picked from commit 6e53be2a0abe8f347ec466ade6df8a033b3446f1)
    
  • 3b717f22
    by Timo Aaltonen at 2024-06-04T13:58:00+03:00
    control: Bump build-depends on meson for rusticl.
    
  • d5d9dade
    by Lionel Landwerlin at 2024-06-04T14:40:26+02:00
    brw: use a single virtual opcode to read ARF registers
    
    In 2c65d90bc8 I forgot to add the new SHADER_OPCODE_READ_MASK_REG
    opcode to the list of barrier instruction in the scheduler. Let's just
    use a single opcode for all ARF registers that need special
    scoreboarding and put the register as source (nicer for the debug
    output).
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 2c65d90bc8 ("intel/brw: ensure find_live_channel don't access arch register without sync")
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29446>
    (cherry picked from commit d8b78924c532bd4688e70132d1ebdb0aa0f8b18b)
    
  • 2b70963e
    by Karol Herbst at 2024-06-04T14:40:28+02:00
    iris: fix PIPE_RESOURCE_PARAM_STRIDE for buffers
    
    Iris calls iris_resource_get_param with PIPE_RESOURCE_PARAM_STRIDE
    internally now when exporting memory objects. OpenCL's gl_sharing allows
    to export buffers as well, which do not have strides.
    
    This fixes the assert being hit there for buffers.
    
    Fixes: 831703157e7 ("iris: Use resource_get_param in resource_get_handle")
    Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29501>
    (cherry picked from commit bc149e03033239d07c913d5978d7ee2afe68dadf)
    
  • 451e723c
    by Eric Engestrom at 2024-06-05T16:00:13+02:00
    .pick_status.json: Update to 6889a0a5dd970bbfcd407085c8f12356a9dfe334
    
  • e0405c96
    by bbhtt at 2024-06-05T16:04:26+02:00
    nvk: Clean up unused header from libdrm_nouveau
    
    This was added in 6e0089307ef4f539ed4ee82c4966e977a6b95a0b without a
    dependency on libdrm_nouveau. If libdrm is not compiled with nouveau
    enabled, the build errors here.
    
    This is currently unused and since
    821f4c8d99a3068758db834a5c219082a9609b3c removed dependency on
    libdrm_nouveau, this should be gone too.
    
    Fixes: 821f4c8d99a ("nouveau: import libdrm_nouveau")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29517>
    (cherry picked from commit 4f5503fa2d0ce80c6e26b93169e07a36bfa044eb)
    
  • 55a10596
    by Lionel Landwerlin at 2024-06-05T16:05:03+02:00
    anv: fix Gfx9 fast clears on srgb formats
    
    Only MCS surfaces are affected because SRGB format are not listed as
    supporting CCS compression.
    
    Fixes CTS test :
      dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.*_srgb_*sample_count_*
      dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.*srgb*
    
    This is similar to what we did in Iris in f8961ea0 ("iris: Disable
    sRGB fast-clears for non-0/1 values").
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10003
    Fixes: 4cfb4f7d12 ("anv: support fast color clears on vkCmdClearAttachments")
    Reviewed-by: Ivan Briano <ivan.briano@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29518>
    (cherry picked from commit d9567b5ee48e747eff5b8af589eff3cbd0250308)
    
  • 87d89f48
    by Faith Ekstrand at 2024-06-05T16:05:05+02:00
    nir: Handle cmat types in lower_variable_initializers
    
    Fixes: b98f87612bc1 ("spirv: Implement SPV_KHR_cooperative_matrix")
    Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
    (cherry picked from commit 7e6cd395c785c41d807fd164f7374a1ad0eca742)
    
  • 3b86c96d
    by Faith Ekstrand at 2024-06-05T16:05:06+02:00
    spirv: Handle constant cooperative matrices in OpCompositeExtract
    
    Fixes: b98f87612bc1 ("spirv: Implement SPV_KHR_cooperative_matrix")
    Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
    (cherry picked from commit 8fa46b31a89fde179d87f0b714bc882ebfa43b0d)
    
  • 6eb9c86d
    by Samuel Pitoiset at 2024-06-05T16:05:07+02:00
    radv: fix VRS subpass attachments with mipmaps
    
    On GFX10.3, the driver should use the VRS image view provided by the
    rendering state because it sets the base level correctly. On GFX11+,
    using the image view dimension is enough.
    
    Cc: mesa-stable
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29531>
    (cherry picked from commit 964f2b8140e7f3fdf8daad1698a99867897e7cb1)
    
  • 8a3dadb0
    by Eric Engestrom at 2024-06-05T21:01:33+02:00
    docs: add release notes for 24.1.1
    
  • 6c377358
    by Eric Engestrom at 2024-06-05T21:01:42+02:00
    VERSION: bump for 24.1.1
    
  • 5553e78e
    by Timo Aaltonen at 2024-06-10T08:22:41+03:00
    Merge branch 'upstream-unstable' into debian-unstable
    
  • 797c0d9d
    by Timo Aaltonen at 2024-06-10T08:33:45+03:00
    version bump
    
  • eee8c583
    by Timo Aaltonen at 2024-06-10T14:27:27+03:00
    rules, control: Bump llvm to 18. (Closes: #1072901)
    
  • 70a170c5
    by Timo Aaltonen at 2024-06-10T14:39:26+03:00
    release to sid
    

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