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[Git][xorg-team/lib/mesa][debian-unstable] 2 commits: patches: Fix a regression in crocus. (Closes: #1059015)



Title: GitLab

Timo Aaltonen pushed to branch debian-unstable at X Strike Force / lib / mesa

Commits:

  • c4e497df
    by Timo Aaltonen at 2023-12-23T12:08:04+02:00
    patches: Fix a regression in crocus. (Closes: #1059015)
    
  • 6f7cc7a1
    by Timo Aaltonen at 2023-12-23T12:08:16+02:00
    release to sid
    

3 changed files:

Changes:

  • debian/changelog
    1
    +mesa (23.3.1-4) unstable; urgency=medium
    
    2
    +
    
    3
    +  * patches: Fix a regression in crocus. (Closes: #1059015)
    
    4
    +
    
    5
    + -- Timo Aaltonen <tjaalton@debian.org>  Sat, 23 Dec 2023 12:08:05 +0200
    
    6
    +
    
    1 7
     mesa (23.3.1-3) unstable; urgency=medium
    
    2 8
     
    
    3 9
       * llvmpipe-add-orcjit.diff: Fix to actually build with llvm-17.
    

  • debian/patches/0001-intel-compiler-move-gen5-final-pass-to-actually-be-f.patch
    1
    +From 5ea94d17248a91e3598306ada8085a7c144adb15 Mon Sep 17 00:00:00 2001
    
    2
    +From: Dave Airlie <airlied@redhat.com>
    
    3
    +Date: Mon, 18 Dec 2023 16:47:56 +1000
    
    4
    +Subject: [PATCH] intel/compiler: move gen5 final pass to actually be final
    
    5
    + pass
    
    6
    +
    
    7
    +This got broken by the register conversion, this pass needs to be
    
    8
    +after all the others.
    
    9
    +
    
    10
    +Fixes: ce75c3c3fea9 ("intel: Switch to intrinsic-based registers")
    
    11
    +Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    
    12
    +Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26731>
    
    13
    +(cherry picked from commit f76f4be301ef311e6be21486b6a3f5fd5e90240f)
    
    14
    +---
    
    15
    + .pick_status.json            |  2 +-
    
    16
    + src/intel/compiler/brw_nir.c | 17 +++++++++--------
    
    17
    + 2 files changed, 10 insertions(+), 9 deletions(-)
    
    18
    +
    
    19
    +diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
    
    20
    +index 8da98b0fbfd..c36269fd015 100644
    
    21
    +--- a/src/intel/compiler/brw_nir.c
    
    22
    ++++ b/src/intel/compiler/brw_nir.c
    
    23
    +@@ -1753,14 +1753,6 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
    
    24
    +    if (OPT(nir_opt_rematerialize_compares))
    
    25
    +       OPT(nir_opt_dce);
    
    26
    + 
    
    27
    +-   /* This is the last pass we run before we start emitting stuff.  It
    
    28
    +-    * determines when we need to insert boolean resolves on Gen <= 5.  We
    
    29
    +-    * run it last because it stashes data in instr->pass_flags and we don't
    
    30
    +-    * want that to be squashed by other NIR passes.
    
    31
    +-    */
    
    32
    +-   if (devinfo->ver <= 5)
    
    33
    +-      brw_nir_analyze_boolean_resolves(nir);
    
    34
    +-
    
    35
    +    OPT(nir_opt_dce);
    
    36
    + 
    
    37
    +    /* The mesh stages require this pass to be called at the last minute,
    
    38
    +@@ -1773,6 +1765,15 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
    
    39
    +       brw_nir_adjust_payload(nir, compiler);
    
    40
    + 
    
    41
    +    nir_trivialize_registers(nir);
    
    42
    ++
    
    43
    ++   /* This is the last pass we run before we start emitting stuff.  It
    
    44
    ++    * determines when we need to insert boolean resolves on Gen <= 5.  We
    
    45
    ++    * run it last because it stashes data in instr->pass_flags and we don't
    
    46
    ++    * want that to be squashed by other NIR passes.
    
    47
    ++    */
    
    48
    ++   if (devinfo->ver <= 5)
    
    49
    ++      brw_nir_analyze_boolean_resolves(nir);
    
    50
    ++
    
    51
    +    nir_sweep(nir);
    
    52
    + 
    
    53
    +    if (unlikely(debug_enabled)) {
    
    54
    +-- 
    
    55
    +2.40.1
    
    56
    +

  • debian/patches/series
    ... ... @@ -4,3 +4,4 @@ src_glx_dri_common.h.diff
    4 4
     0001-Revert-egl-add-automatic-zink-fallback-loading-betwe.patch
    
    5 5
     0002-Revert-glx-add-automatic-zink-fallback-loading-betwe.patch
    
    6 6
     llvmpipe-add-orcjit.diff
    
    7
    +0001-intel-compiler-move-gen5-final-pass-to-actually-be-f.patch


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