-
cb21190b
by Bas Nieuwenhuizen
at 2022-01-26T22:12:51+00:00
Revert "nir/algebraic: distribute fmul(fadd(a, b), c) when b and c are constants"
This reverts commit a1af902531122464b0f4eb66a7c4bf207a8a69f1.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5423
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14532>
(cherry picked from commit d1530a3f3b1625baa42e84cba9844b6eb4ac76ce)
-
75835603
by Charles Baker
at 2022-01-26T22:12:51+00:00
Revert "zink: handle vertex buffer offset overflows"
This reverts commit 9823b970fb51db21ac6ce29753eba82dc25f3072.
>From VkPhysicalDeviceLimits [1]:
> maxVertexInputAttributeOffset is the maximum vertex input attribute
offset that can be added to the vertex input binding stride. The offset
member of the VkVertexInputAttributeDescription structure must be
less than or equal to this limit.
The maxVertexInputAttributeOffset is a limit on the offset of a vertex
attribute within a vertex rather than a limit on offsets for vertex
buffer bindings. The code to bind temporary buffers can be removed.
[1] https://www.khronos.org/registry/vulkan/specs/1.2-extensions/man/html/VkPhysicalDeviceLimits.html
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14572>
(cherry picked from commit 1b88777e97f635612c560a2f00d349ea271581b1)
-
bf8ee1a2
by Eric Engestrom
at 2022-02-09T20:07:37+00:00
.pick_status.json: Update to cb781fc350108584116280fc597c695d2f476c68
-
f040bf87
by Eric Engestrom
at 2022-02-09T20:07:47+00:00
.pick_status.json: Mark 15e77504461a30038a054c87cc53a694171c9cf4 as denominated
-
2e255372
by Eric Engestrom
at 2022-02-09T20:07:47+00:00
.pick_status.json: Mark 960e72417f3e8885699cf384f690853e14ba44da as denominated
-
9f974e41
by Francisco Jerez
at 2022-02-09T20:07:47+00:00
intel/fs: Take into account region strides during SIMD lowering decision of SHUFFLE.
This fixes a bug in the handcrafted SIMD lowering done by the SHUFFLE
code generation, which wasn't taking into account the source and
destination region strides while deciding whether it needs to split an
instruction.
v2: Use new element_sz() helper instead of left shift. (Lionel)
Fixes: 90c9f29518d ("i965/fs: Add support for nir_intrinsic_shuffle")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14273>
(cherry picked from commit d1038197f31041f0ff5712bf92be63d34fb883e2)
-
0051b413
by Mike Blumenkrantz
at 2022-02-09T20:07:47+00:00
zink: never use SpvOpImageQuerySizeLod for texel buffers
this is illegal
cc: mesa-stable
affects KHR-GL46.texture_buffer.texture_buffer_texture_buffer_range
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14696>
(cherry picked from commit 5e748770b9ca755811d55cafba084b3434165fe0)
-
5a106c47
by Jason Ekstrand
at 2022-02-09T20:07:47+00:00
anv/pass: Don't set first_subpass_layout for stencil-only attachments
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
(cherry picked from commit 6612dcc4258b8c50b497afd7c276bbe3fd11d652)
-
343f9f52
by Mike Blumenkrantz
at 2022-02-09T20:07:47+00:00
zink: reorder fbfetch flag-setting to avoid null deref
this avoids dereferencing pg->dd which is allocated a few lines later
Fixes: 417477f60ed ("zink: always use lazy (non-push) updating for fbfetch descriptors")
fixes (radv):
dEQP-GLES31.functional.blend_equation_advanced.basic.multiply
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14718>
(cherry picked from commit 8747715aecea73fa932d11a30188aae2b353cdb4)
-
a987828e
by Yiwei Zhang
at 2022-02-09T20:07:47+00:00
tu: VkExternalImageFormatProperties is optional
..even if external image info has valid external handles.
Fixes: 26380b3a9f8 ("turnip: Add driver skeleton (v2)")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14730>
(cherry picked from commit 96acd0933eeb638ce2399a2dd8bf03906c765120)
-
d55fed66
by Nanley Chery
at 2022-02-09T20:07:47+00:00
anv: Disable CCS_E for some 8/16bpp copies on TGL+
CCS_E is currently disabled on TGL+, but we'll enable it soon. We choose
to explicitly disable it for certain copy operations to avoid CTS
failures in the following groups:
- dEQP-VK.drm_format_modifiers.export_import.*
- dEQP-VK.synchronization*
Fixes: e6147895885 ("anv: Also disallow CCS_E for multi-LOD images")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14723>
(cherry picked from commit d68b2db89ca38f3f6c0d3ebd65945c471d864d58)
-
cbb35dbb
by Nanley Chery
at 2022-02-09T20:07:47+00:00
anv: Use ANV_FAST_CLEAR_DEFAULT_VALUE for CCS on TGL+
On TGL, if a block of fragment shader outputs match the surface's clear
color, the HW may convert them to fast-clears (see HSD 14010672564).
This can lead to rendering corruptions if not handled properly. We
restrict the clear color to zero to avoid issues that can occur with:
- Texture view rendering (including blorp_copy calls)
- Images with multiple levels or array layers
Fixes: e6147895885 ("anv: Also disallow CCS_E for multi-LOD images")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14723>
(cherry picked from commit c48401404c18a1f44dca6bd0d4ea2f64731eae4d)
-
9c0388b7
by Nanley Chery
at 2022-02-09T20:07:48+00:00
anv: Re-enable CCS_E on TGL+
Commit e6147895885 ("anv: Also disallow CCS_E for multi-LOD images")
accidentally disabled CCS_E on TGL+ because it checked for
image->vk.mip_levels > 0 instead of image->vk.mip_levels > 1.
Instead of reverting it, we remove the code which disables CCS_E for
mipmapped or arrayed images now that we've sufficiently handled the
clear color issue in other ways.
Fixes: e6147895885 ("anv: Also disallow CCS_E for multi-LOD images")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14723>
(cherry picked from commit 57445adc89186fcadc1e6006d1aa32768b26556b)
-
35444289
by Manas Chaudhary
at 2022-02-09T20:07:48+00:00
panvk: Fix pointer corruption in panvk_add_wait_event_syncobjs
nr_in_fences was being incremented to point to an
illegal address
Fixes: 1e23004600c3 ("panvk: Add vkEvents support")
Cc: mesa-stable
Signed-off-by: Manas Chaudhary <manas.chaudhary@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14744>
(cherry picked from commit cad053db6152ee01950af8d7418c7672fd8abfe7)
-
d08330e7
by Emma Anholt
at 2022-02-09T20:07:48+00:00
vulkan: Fix leak of error messages
Fixes: 0cad3beb2a0d ("vulkan/log: Add common vk_error and vk_errorf helpers")
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14235>
(cherry picked from commit bdb8e615d1a1ff6cce935ee5544748d61db1bb5c)
-
e3956c3d
by Caio Oliveira
at 2022-02-09T20:07:48+00:00
anv: Fix subgroupSupportedStages physical property
Use the proper Vulkan values that can be combined into a bitmask.
Fixes: f40a08d25c9 ("anv: Don't advertise unsupported shader stages")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14761>
(cherry picked from commit d6c31f05a248a62e63525d2c264eb0ec7640b0f1)
-
adab2e0b
by Mike Blumenkrantz
at 2022-02-09T20:07:48+00:00
zink: fix vertex buffer mask computation for null buffers
off by N
affects:
KHR-GL46.texture_cube_map_array.sampling
Fixes: 53aade0ef0d ("zink: fix enabled vertex buffer mask calculation")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14721>
(cherry picked from commit 42ae116ac753aad5853139840f3e958b986922c1)
-
9b50b320
by Paulo Zanoni
at 2022-02-09T20:07:48+00:00
iris: implement inter-context busy-tracking
Previously, no buffers were ever marked as EXEC_OBJECT_ASYNC so the
Kernel would ensure dependency tracking for us. After we implemented
explicit busy tracking in commit 89a34cb8450a, only the external
objects kept relying on the Kernel's implicit tracking and Iris did
inter-batch busy tracking, meaning we lost inter-screen and
inter-context synchronization. This seemed fine to me since, as far as
I understood, it is the duty of the application to synchronize itself
against multiple screens and contexts.
The problem here is that applications were actually relying on the old
behavior where the Kernel guarantees synchronization, so 89a34cb8450a
can be seen as a regression. This commit addresses the inter-context
synchronization case.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5731
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5812
Fixes: 89a34cb8450a ("iris: switch to explicit busy tracking")
Tested-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14783>
-
e2085aea
by Mike Blumenkrantz
at 2022-02-09T20:07:48+00:00
zink: clamp tbo creation to maxTexelBufferElements
for sparse buffers, the total buffer size will be huge, so this needs
to only be the limit that the driver can support to avoid crashing
or whatever
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14692>
(cherry picked from commit 27d405dc2fddb5b814476a4e055358fd1efa7a4d)
-
494e8094
by Mike Blumenkrantz
at 2022-02-09T20:07:48+00:00
zink: add vertex shader pipeline bit for generated barrier construction
if the vertex buffer resource has writes, it needs this bit too
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14691>
(cherry picked from commit 95bfb7568862e209cb3ec49f9a70f329f7324410)
-
c975c588
by Mike Blumenkrantz
at 2022-02-09T20:07:48+00:00
zink: fix waiting on current batch id
- the current batch id is always 0
- there is always a current batch
- a batch id can only be set at the time of submit
thus when passing 0 to wait on the current batch, the submit must complete
so that there is a batch id, and this must occur before the timeline wait
path or else the timeline wait does nothing
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14693>
(cherry picked from commit 3a0888c62fa3ebcce0494e3e07451fa9aa26b9df)
-
154ce771
by Rhys Perry
at 2022-02-09T20:07:48+00:00
aco: fix neg(abs(mul(a, b))) if the mul is not VOP3
Previously, is_abs was just ignored if mul_instr->isVOP3()==false.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 93c8ebfa780 ("aco: Initial commit of independent AMD compiler")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14773>
(cherry picked from commit 452975f257f14ae755c713d607a002b9211a8a17)
-
6f916ec0
by Georg Lehmann
at 2022-02-09T20:07:48+00:00
vulkan/wsi/wayland: Fix add_wl_shm_format alpha/opaqueness.
We need both the SHM format with alpha and the opaque format to fully support
a vulkan format with alpha. Previously no surface format was reported because
the vulkan formats with aplha were never added as opaque.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5879
Fixes: d944136f363 ("vulkan/wsi/wayland: don't expose surface formats not fully supported")
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14588>
(cherry picked from commit 4ae4e04e18d7dc688aa94e52778c4959861bae0c)
-
09499c42
by Georg Lehmann
at 2022-02-09T20:07:48+00:00
vulkan/wsi/wayland: Convert missing vulkan formats to shm formats.
Fixes: 6b36f35734a ("vulkan/wsi/wl: add wl_shm support for lavapipe.")
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14588>
(cherry picked from commit a881b6ac1ff70c73090ee076c4011ad84493ae14)
-
b366fdbe
by Georg Lehmann
at 2022-02-09T20:07:49+00:00
vulkan/wsi/wayland: Add modifiers for RGB formats.
These formats get overwritten after the FALLTHROUGH, so no modifers got added
to them at all.
Fixes: 151b65b2119 ("vulkan/wsi/wayland: generalize modifier handling")
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14588>
(cherry picked from commit 9843fddffff24a4add73182b909802d2ba74581c)
-
d5940322
by Georg Lehmann
at 2022-02-09T20:07:49+00:00
vulkan/wsi/wayland: Fix add_drm_format_modifier aplha/opaqueness.
This had the opposite problem of the shm path. R8G8B8A8 was always support if
either DRM_FORMAT_XBGR8888 or DRM_FORMAT_ABGR8888 was supported, but we need
both.
Fixes: d944136f363 ("vulkan/wsi/wayland: don't expose surface formats not fully supported")
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14588>
(cherry picked from commit cbe4943ae949d6c46222bafacac573c7ea50caed)
-
675c2dab
by Jason Ekstrand
at 2022-02-09T20:07:49+00:00
vulkan/wsi: Set MUTABLE_FORMAT_BIT in the prime path
Fixes: 4bdf8547f4dc "vulkan/wsi: Implement VK_KHR_swapchain_mutable_format"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12031>
(cherry picked from commit 8299d5f37f1689ca90278eab45b0277c89cca058)
-
39e4072e
by Mike Blumenkrantz
at 2022-02-09T20:07:49+00:00
zink: cast image atomic op params/results based on image type
according to spec, these must match the texel pointer type
cc: mesa-stable
fixes (nvidia):
dEQP-GLES31.functional.image_load_store.2d.atomic.exchange_r32f_return_value
dEQP-GLES31.functional.image_load_store.2d_array.atomic.exchange_r32f_return_value
dEQP-GLES31.functional.image_load_store.cube.atomic.exchange_r32f_return_value
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14690>
(cherry picked from commit 2361c52b5e88bdc9212161a7fb4070c40082c01a)
-
e5d09f30
by Mike Blumenkrantz
at 2022-02-09T20:07:49+00:00
zink: use SpvScopeDevice over SpvScopeWorkgroup for atomic shader ops
Workgroup is only allowed in compute shaders, and Device should be more
in line with the intended use here
the alternative would be to keep using Workgroup for compute and use Device
otherwise, but this would effectively make atomic ops non-atomic, which seems
like it isn't desirable
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14690>
(cherry picked from commit 6f38ea4ac73302fb040ef27f84633e34da3567ac)
-
5be8602e
by Connor Abbott
at 2022-02-09T20:07:49+00:00
ir3: Fix copy-paste mistakes in ir3_block_remove_physical_predecessor()
Fixes: 2768a35e416 ("ir3: Add pass to remove unreachable blocks")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14412>
(cherry picked from commit 53e54898e040da33d665ff73d6b92c6860157865)
-
77f9a3ad
by Connor Abbott
at 2022-02-09T20:07:49+00:00
ir3/cp: ir3: Prevent propagating shared regs out of loops harder
We need to check the source of the copy, not the destination. That means
this we need to move this check inside the ifs, where we know that the
source is a copy.
Fixes: 590efd180be ("Prevent propagating shared regs out of loops")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14412>
(cherry picked from commit 09731fc79a4dcb5e74d65088ca3aa9795c779dc7)
-
2027acff
by Danylo Piliaiev
at 2022-02-09T20:07:49+00:00
ir3: opt_deref in opt loop to remove unnecessary tex casts
Otherwise we may be left with such casts:
vec1 32 ssa_72 = deref_var &shadow_map (uniform sampler2D)
vec1 32 ssa_73 = deref_cast (texture2D *)ssa_72 (uniform texture2D)
vec1 32 ssa_74 = deref_cast (sampler *)ssa_72 (uniform sampler)
vec1 32 ssa_76 = (float32)tex ssa_73 (texture_deref), ssa_74 (sampler_deref), ssa_75 (coord), ssa_64 (comparator)
And crash in ycbcr lowering since we aren't able to follow deref chain.
Fixes crash in GFXBench Aztec Ruins Vulkan tests.
See issue: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5945
Cc: mesa-stable
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14819>
(cherry picked from commit f917c735288835a18b8aba799b8e48acc75bdcf9)
-
fe18c96c
by Samuel Pitoiset
at 2022-02-09T20:07:49+00:00
radv/winsys: fix missing buffer_make_resident() for the null winsys
With latest Fossilize everything should now be captured correctly
but without this, all Fossilize databases that need
VK_EXT_custom_border_color would just crash.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14821>
(cherry picked from commit 1cadd19197aabd36f1da31740af8ff712bd66e6b)
-
6bc710d7
by Kenneth Graunke
at 2022-02-09T20:07:49+00:00
i965: Avoid NULL drawbuffer in brw_flush_front
Commit 17e62a3c23f68df802bcbfdab947dff4226fa281 made _mesa_make_current
begin calling ctx->Driver.Flush() in more cases, including when called
during context destruction, after _mesa_free_context_data has set
ctx->DrawBuffer to NULL. i965's flush hook wasn't prepared for this,
and assumed that ctx->DrawBuffer was non-NULL. This led to a crash
with the following backtrace:
#0 0x00007ffff5bf97b5 in _mesa_is_winsys_fbo (fb=0x0)
at ../../src/mesa/main/fbobject.h:52
#1 0x00007ffff5bfa359 in brw_flush_front (ctx=0x5555555a4110)
at ../../src/mesa/drivers/dri/i965/brw_context.c:242
#2 0x00007ffff5bfa587 in brw_glFlush (ctx=0x5555555a4110,
gallium_flush_flags=0) at ../../src/mesa/drivers/dri/i965/brw_context.c:301
#3 0x00007ffff5d46b2b in _mesa_make_current (newCtx=0x0, drawBuffer=0x0,
readBuffer=0x0) at ../../src/mesa/main/context.c:1616
#4 0x00007ffff5d46484 in _mesa_free_context_data (ctx=0x5555555a4110,
destroy_debug_output=true) at ../../src/mesa/main/context.c:1309
#5 0x00007ffff5bfcb59 in brw_destroy_context (driContextPriv=0x555555590260)
at ../../src/mesa/drivers/dri/i965/brw_context.c:1301
There is really no point in worrying about front buffer flushing during
the context's destruction when we've already discarded the drawbuffer,
so just add a NULL check in brw_flush_front and skip that work.
Fixes: 17e62a3c23f ("mesa: (correctly) flush more in _mesa_make_current")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5957
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14828>
-
b340c47b
by Rhys Perry
at 2022-02-09T20:07:49+00:00
aco: don't encode src2 for v_writelane_b32_e64
Encoding src2 doesn't cause issues for print_asm() because we have a
workaround there, but it does for RGP and it seems the developers are not
interested in fixing it.
https://github.com/GPUOpen-Tools/radeon_gpu_profiler/issues/61
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14832>
(cherry picked from commit 0447a2303fb06d6ad1f64e5f079a74bf2cf540da)
-
2ef1287e
by Mike Blumenkrantz
at 2022-02-09T20:07:49+00:00
zink: disable PIPE_SHADER_CAP_FP16_CONST_BUFFERS
this cap is broken
cc: mesa-stable
fixes:
GTF-GL46.gtf21.GL2Tests.glGetUniform.glGetUniform
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14835>
(cherry picked from commit 9a38dab2d18d5c6c685bdedb921d485bbb305eed)
-
444e3734
by Mike Blumenkrantz
at 2022-02-09T20:07:49+00:00
llvmpipe: disable PIPE_SHADER_CAP_FP16_CONST_BUFFERS
this cap is broken
cc: mesa-stable
fixes:
GTF-GL46.gtf21.GL2Tests.glGetUniform.glGetUnifor
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14835>
(cherry picked from commit 9a75392cd829df3f8f5a89dfecd4f2103658bfbd)
-
58382828
by Mike Blumenkrantz
at 2022-02-09T20:07:49+00:00
llvmpipe: ci updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14835>
(cherry picked from commit f8a90104101b90af43dc6aabf19560a326be6333)
-
808eec70
by Mike Blumenkrantz
at 2022-02-09T20:07:50+00:00
zink: add VK_BUFFER_USAGE_CONDITIONAL_RENDERING_BIT_EXT for query binds
required by spec
cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14853>
(cherry picked from commit 1e96542390adaaec2b3e84ef69239f580403b26d)
-
3cbc1712
by Dave Airlie
at 2022-02-09T20:07:50+00:00
crocus: find correct relocation target for the bo.
If we have batch a + b, and writing to batch b, causes batch a
to flush, all the bo->index get reset, and we try to submit a -1
to the kernel.
Look the bo index up when creating relocations.
Fixes crash seen in KHR-GL46.compute_shader.pipeline-post-fs
and a trace from Wasteland 3
Fixes: f3630548f1da ("crocus: initial gallium driver for Intel gfx 4-7")
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14905>
(cherry picked from commit 37c3be6947b43d31e454d1f4adcee8eea49a8f0a)
-
c185f61e
by Rhys Perry
at 2022-02-09T20:07:50+00:00
radv: fix R_02881C_PA_CL_VS_OUT_CNTL with mixed cull/clip distances
Matches radeonsi.
Seems Vulkan CTS doesn't really test cull distances. Removing
VARYING_SLOT_CULL_DIST0/VARYING_SLOT_CULL_DIST1 variables doesn't break
any of dEQP-VK.clipping.*, except for tests which read the variables in
the fragment shader.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5984
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14882>
(cherry picked from commit 7ddad1b93a131df4c3ec86caf7cacd593caef64f)
-
fa3d0495
by Mike Blumenkrantz
at 2022-02-09T20:07:50+00:00
zink: fix PIPE_CAP_TGSI_BALLOT export conditional
this requires VK_EXT_shader_subgroup_ballot
cc: mesa-stable
fixes (lavapipe):
KHR-GL46.shader_ballot_tests.ShaderBallotAvailability
KHR-GL46.shader_ballot_tests.ShaderBallotFunctionRead
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14858>
(cherry picked from commit e38c13830fcbe8f3784dc3adbd736ea72b67fdea)
-
ed869d3e
by Mike Blumenkrantz
at 2022-02-09T20:07:50+00:00
zink: reject invalid draws
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14859>
(cherry picked from commit b656ab75a684807d2718d726dd807726a36f1a0f)
-
f0281839
by Mike Blumenkrantz
at 2022-02-09T20:07:50+00:00
zink: min/max blit region in coverage functions
these regions might not have the coords in the correct order, which will
cause them to fail intersection tests, resulting in clears that are never
applied
cc: mesa-stable
fixes:
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_all_buffer_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_color_and_depth_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_color_and_stencil_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_linear_filter_color_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_magnifying_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_minifying_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_missing_buffers_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_nearest_filter_color_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_dimensions_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_height_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_width_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_scissor_blit
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14867>
(cherry picked from commit 388f23eabe54cb92d71eb5a31b39338585cd4d76)
-
caf19bcf
by Lionel Landwerlin
at 2022-02-09T20:07:50+00:00
intel/fs: don't set allow_sample_mask for CS intrinsics
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 77486db867bd ("intel/fs: Disable sample mask predication for scratch stores")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
(cherry picked from commit c89024e4463389663cf7f7d2f2752de2029efb23)
-
b680bd06
by Lionel Landwerlin
at 2022-02-09T20:07:50+00:00
intel/nir: fix shader call lowering
We're replacing a generic instruction by an intel specific one, we
need to remove the previous instruction.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c5a42e401036 ("intel/fs: fix shader call lowering pass")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
(cherry picked from commit 39f6cd5d799ad077ad41d920dc31c5da1fae3c24)
-
405ce01d
by Eric Engestrom
at 2022-02-09T20:10:36+00:00
docs: add release notes for 21.3.6
-
fef2cdb0
by Eric Engestrom
at 2022-02-09T20:10:39+00:00
VERSION: bump for 21.3.6
-
f911daf1
by Jonathan Gray
at 2022-02-20T19:13:34+00:00
dri: avoid NULL deref of DrawBuffer on flush
The same problem with 17e62a3c23f68df802bcbfdab947dff4226fa281
fixed for i965 with 6bc710d7694bf1f0ae019326407f7d32af043852
exists with other drivers.
With Mesa 21.3.6 on radeon r100 it shows as:
_mesa_is_winsys_fbo (fb=0x0)
radeonFlush
_mesa_make_current
_mesa_free_context_data
radeonDestroyContext
driDestroyContext
dri2_destroy_context
glx_display_free
__glXCloseDisplay
XCloseDisplay
Follow the i965 change and add a NULL test before flush for
radeon, i915 and nouveau.
Fixes: 17e62a3c23f ("mesa: (correctly) flush more in _mesa_make_current")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14989>
-
014cab45
by Eric Engestrom
at 2022-02-23T17:55:46+00:00
.pick_status.json: Update to dabba7d7263be6ffb6f3676465e92c65952fa824
-
66a7f598
by Eric Engestrom
at 2022-02-23T17:55:53+00:00
.pick_status.json: Mark b07372312d7053f2ef5c858ceb1fbf9ade5e7c52 as denominated
-
6a179f89
by Mike Blumenkrantz
at 2022-02-23T17:55:53+00:00
lavapipe: use util_pack_color_union() for generating clear colors
this enables clamping for packed formats (e.g., RGB10_A2UI) where color
values may exceed the width of the component
cc: mesa-stable
fixes (zink):
KHR-GL45.direct_state_access.renderbuffers_storage*
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14911>
(cherry picked from commit 08c2b9d7cbc2b60233c3d3ed411ceb9649fe5c9f)
-
12a51c22
by Pavel Ondračka
at 2022-02-23T17:55:54+00:00
r300: fix transformation of abs modifiers with negate
It is being overwritten by the memset. Just set the only remaining
member RelAddr explicitly.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip.gawin@zoho.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14915>
(cherry picked from commit 1f5330de3a6c54faf7a0ed7485c72a2ce40ac744)
-
311c2572
by Dave Airlie
at 2022-02-23T17:55:54+00:00
lavapipe: fix sampler + sampler view leaks.
The compute sampler views are using a different method
of generation so have to be deleted explicitly.
Fixes: e94fd4cc6589 ("lavapipe: rename vallium to lavapipe")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14939>
(cherry picked from commit 2f9089f6de8ca29a529ef7828efbabeec58be6e8)
-
0fb9703d
by Tapani Pälli
at 2022-02-23T17:55:54+00:00
intel/genxml: add PIPE_CONTROL field for L3 read only cache invalidation
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14815>
(cherry picked from commit 442628b70244f2c9fd0ed79e0656e999ee6fffca)
-
2ee36d05
by Tapani Pälli
at 2022-02-23T17:55:54+00:00
anv: invalidate L3 read only cache when VF cache is invalidated
When enabling the caching of index,vertex data in the L3 RO Cache
(L3BypassDisable), we need to use L3ReadOnlyCacheInvalidationEnable
to invalidate cache when buffer is modified by CPU/GPU.
Ref: bspec 46314
Fixes: 6c345ddbe40 ("anv: Cache VB/IB in L3$ for Gfx12")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5941
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14815>
(cherry picked from commit 7a6ea047954461d8f61878494265ba4bb84b50fe)
-
096baed7
by Tapani Pälli
at 2022-02-23T17:55:54+00:00
iris: invalidate L3 read only cache when VF cache is invalidated
When enabling the caching of index,vertex data in the L3 RO Cache
(L3BypassDisable), we need to use L3ReadOnlyCacheInvalidationEnable
to invalidate cache when buffer is modified by CPU/GPU.
Ref: bspec 46314
Fixes: ed8f2c4cbee ("iris: Cache VB/IB in L3$ for Gen12")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14815>
(cherry picked from commit 562f7eef5b4f5a4d4fb4d93418e6373e853550fa)
-
5ea67072
by Qiang Yu
at 2022-02-23T17:55:54+00:00
radeonsi: workaround Specviewperf13 Catia hang on GFX9
The root cause is unknown but PAL always update IA_MULTI_VGT_PARAM
whenever primitive type change.
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Singed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14944>
(cherry picked from commit fe560aeb12516e766335d416ba749b7572637274)
-
721e8da1
by Ian Romanick
at 2022-02-23T17:55:54+00:00
gallivm/nir: Call nir_lower_bool_to_int32 after nir_opt_algebraic_late
All of the opcodes in nir_opt_algebraic_late are the unsized (1-bit)
versions. If the lowering to int32 happens first, many of the
optimizations and lowerings won't happen.
Of particular importance is the lowering of fisfinite. If a shader
happens to contain fisfinite of an fp16 value, it will assert later
during compliation.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: 78b4e417d44 ("gallivm: handle fisfinite/fisnormal")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14942>
(cherry picked from commit e3cbc328e0dbb5865cc036ecbf977127850b4670)
-
7fa3eff0
by Mike Blumenkrantz
at 2022-02-23T17:55:54+00:00
aux/draw: fix llvm tcs lane vec generation
the idx param for LLVMBuildInsertElement is zero-indexed based on the
value of 'vector_length' (always 4), and the vector length is (obviously)
sized to 'vector_length', so this should be the member of the vec that is being
inserted, not the invocation index
cc: mesa-stable
fixes (zink, but only on my one machine):
KHR-GL46.tessellation_shader.single.max_patch_vertices
KHR-GL46.tessellation_shader.tessellation_shader_tc_barriers.barrier_guarded_read_write_calls
dEQP-GLES31.functional.tessellation.shader_input_output.barrier
dEQP-GLES31.functional.tessellation.shader_input_output.patch_vertices_5_in_10_out
dEQP-GLES31.functional.tessellation_geometry_interaction.feedback.tessellation_output_isolines_geometry_output_points
dEQP-GLES31.functional.tessellation_geometry_interaction.feedback.tessellation_output_isolines_point_mode_geometry_output_triangles
dEQP-GLES31.functional.tessellation_geometry_interaction.feedback.tessellation_output_quads_geometry_output_points
dEQP-GLES31.functional.tessellation_geometry_interaction.feedback.tessellation_output_quads_point_mode_geometry_output_lines
dEQP-GLES31.functional.tessellation_geometry_interaction.feedback.tessellation_output_triangles_geometry_output_points
dEQP-GLES31.functional.tessellation_geometry_interaction.feedback.tessellation_output_triangles_point_mode_geometry_output_lines
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14949>
(cherry picked from commit 68c1b50e48e32ec8ff4815666b7124d4cb4171ab)
-
9b955f0e
by Nanley Chery
at 2022-02-23T17:55:54+00:00
iris: Don't fast clear with the view format
Fast clear with the resource format instead. This is safe to do because
can_fast_clear_color ensures that the clear color generates the same
pixel with either the view format or the resource format.
On SKL, this prevents us from using an invalid surface state. This platform
doesn't support CCS_E with sRGB formats, but prior to this patch we allowed
fast-clearing with this combination. Piglit's fcc-write-after-clear test
can trigger this.
Fixes: 230952c2101 ("iris: Don't support sRGB + Y_TILED_CCS on gen9")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14806>
(cherry picked from commit 6778b3a379d010d9b4d82e7324bff19d73cd3d1a)
-
5d74ab48
by Ian Romanick
at 2022-02-23T17:55:54+00:00
nir: All set-on-comparison opcodes can take all float types
Extend 4195a9450bde so that the next poor fool doesn't come along and
say, "sge does the right thing for 16-bit sources, but slt gives a NIR
validation failure. What the deuce?"
NOTE: This commit is necessary to prevent regressions in GLSLstd450Step
tests of 16-bit sources at "spriv: Produce correct result for
GLSLstd450Step with NaN".
Fixes: 4195a9450bd ("nir: sge operation is defined for floating-point types")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13999>
(cherry picked from commit 38800b385c6b4752ec1a91db5b8a7de149d03d0c)
-
29fcfb94
by Ian Romanick
at 2022-02-23T17:55:55+00:00
intel/fs: Don't optimize out 1.0*x and -1.0*x
This (sort of) matches the behavior of nir_opt_algebraic. This ensures
that subnormal values are properly flushed to zero.
With the aid of "nir/search: Float sources of texture instructions are
float users" and "nir/search: Transitively apply is_only_used_as_float",
there would have been no shader-db regressions on Intel platforms.
However, those caused a significant increase in compile time. Since the
instruction regressions were so small, I just dropped those commits
rather than improve them.
All Haswell and newer platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 20125042 -> 20125094 (<.01%)
instructions in affected programs: 7184 -> 7236 (0.72%)
helped: 0
HURT: 32
HURT stats (abs) min: 1 max: 4 x̄: 1.62 x̃: 2
HURT stats (rel) min: 0.11% max: 1.49% x̄: 0.85% x̃: 0.78%
95% mean confidence interval for instructions value: 1.39 1.86
95% mean confidence interval for instructions %-change: 0.74% 0.96%
Instructions are HURT.
total cycles in shared programs: 862745586 -> 862746551 (<.01%)
cycles in affected programs: 109872 -> 110837 (0.88%)
helped: 12
HURT: 23
helped stats (abs) min: 2 max: 774 x̄: 90.83 x̃: 19
helped stats (rel) min: 0.07% max: 25.23% x̄: 3.06% x̃: 0.40%
HURT stats (abs) min: 2 max: 1106 x̄: 89.35 x̃: 12
HURT stats (rel) min: 0.08% max: 45.40% x̄: 3.01% x̃: 0.47%
95% mean confidence interval for cycles value: -60.09 115.23
95% mean confidence interval for cycles %-change: -2.21% 4.07%
Inconclusive result (value mean confidence interval includes 0).
All of the shaders hurt are in either UE4 shooter-game or shooter_demo.
Tiger Lake
Instructions in all programs: 159893213 -> 159893290 (+0.0%)
SENDs in all programs: 6936431 -> 6936431 (+0.0%)
Loops in all programs: 38385 -> 38385 (+0.0%)
Cycles in all programs: 7019259514 -> 7019260087 (+0.0%)
Spills in all programs: 101389 -> 101389 (+0.0%)
Fills in all programs: 131532 -> 131532 (+0.0%)
Ice Lake
Instructions in all programs: 143624164 -> 143624235 (+0.0%)
SENDs in all programs: 6980289 -> 6980289 (+0.0%)
Loops in all programs: 38383 -> 38383 (+0.0%)
Cycles in all programs: 8440082767 -> 8440083238 (+0.0%)
Spills in all programs: 102246 -> 102246 (+0.0%)
Fills in all programs: 131908 -> 131908 (+0.0%)
Skylake
Instructions in all programs: 134185424 -> 134185495 (+0.0%)
SENDs in all programs: 6938790 -> 6938790 (+0.0%)
Loops in all programs: 38356 -> 38356 (+0.0%)
Cycles in all programs: 8222366529 -> 8222366923 (+0.0%)
Spills in all programs: 98821 -> 98821 (+0.0%)
Fills in all programs: 125218 -> 125218 (+0.0%)
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes: f5dd6dfe012 ("anv: enable VK_KHR_shader_float_controls and SPV_KHR_float_controls")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13999>
(cherry picked from commit 38a94c82e6ac3ae3e76e01ff4994ae4c46c487ec)
-
062e7ee3
by Ian Romanick
at 2022-02-23T17:55:55+00:00
spriv: Produce correct result for GLSLstd450Step with NaN
NOTE: This commit needs "nir: All set-on-comparison opcodes can take all
float types" or regressions will occur in other Vulkan SPIR-V tests.
No shader-db changes on any Intel platform.
NOTE: This commit depends on "nir: All set-on-comparison opcodes can
take all float types".
v2: Fix handling 16-bit (and presumably 64-bit) values.
About 280 shaders in Talos are hurt by a few instructions, and a couple
shaders in Doom 2016 are hurt by a few instructions.
Tiger Lake
Instructions in all programs: 159893290 -> 159895026 (+0.0%)
SENDs in all programs: 6936431 -> 6936431 (+0.0%)
Loops in all programs: 38385 -> 38385 (+0.0%)
Cycles in all programs: 7019260087 -> 7019254134 (-0.0%)
Spills in all programs: 101389 -> 101389 (+0.0%)
Fills in all programs: 131532 -> 131532 (+0.0%)
Ice Lake
Instructions in all programs: 143624235 -> 143625691 (+0.0%)
SENDs in all programs: 6980289 -> 6980289 (+0.0%)
Loops in all programs: 38383 -> 38383 (+0.0%)
Cycles in all programs: 8440083238 -> 8440090702 (+0.0%)
Spills in all programs: 102246 -> 102246 (+0.0%)
Fills in all programs: 131908 -> 131908 (+0.0%)
Skylake
Instructions in all programs: 134185495 -> 134186618 (+0.0%)
SENDs in all programs: 6938790 -> 6938790 (+0.0%)
Loops in all programs: 38356 -> 38356 (+0.0%)
Cycles in all programs: 8222366923 -> 8222365826 (-0.0%)
Spills in all programs: 98821 -> 98821 (+0.0%)
Fills in all programs: 125218 -> 125218 (+0.0%)
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes: 1feeee9cf47 ("nir/spirv: Add initial support for GLSL 4.50 builtins")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13999>
(cherry picked from commit 75ef5991f5af06997551dabc053300261e32ca40)
-
724acc7b
by Ian Romanick
at 2022-02-23T17:55:55+00:00
spirv: Produce correct result for GLSLstd450Modf with Inf
GLSLstd450ModfStruct too.
No shader-db or fossil-db changes on any Intel platform.
v2: Fix handling 16-bit (and presumably 64-bit) values.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes: f92a35d831c ("vtn: Fix Modf.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13999>
(cherry picked from commit e442b9d79296ad9322af61fdadbc81d680466f57)
-
62fc70d6
by Ian Romanick
at 2022-02-23T17:55:55+00:00
spirv: Produce correct result for GLSLstd450Tanh with NaN
No shader-db or fossil-db changes on any Intel platform.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes: 9f9432d56c0 ("Revert "spirv: Use a simpler and more correct implementaiton of tanh()"")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13999>
(cherry picked from commit 93ed87af28e7f5b7db7bae095e5a37b63b7bd2c7)
-
bbfcf5b3
by Ian Romanick
at 2022-02-23T17:55:55+00:00
nir: Properly handle various exceptional values in frexp
frexp_sig of ±0, ±Inf, or NaN should just return the input unmodified.
frexp_exp of ±Inf or NaN is undefined, and frexp_exp of ±0 should return
the input unmodified. This seems to already work.
No shader-db or fossil-db changes on any Intel platform.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes: 23d30f4099f ("spirv,nir: lower frexp_exp/frexp_sig inside a new NIR pass")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13999>
(cherry picked from commit 7d0d9b9fbc231c2bd66778e0b0a62d5c514c5495)
-
72e5c056
by Ian Romanick
at 2022-02-23T17:55:55+00:00
nir: Produce correct results for atan with NaN
Properly handling NaN adversely affects several hundred shaders in
shader-db (lots of Skia and a few others from various synthetic
benchmarks) and fossil-db (mostly Talos and some Doom 2016). Only apply
the NaN handling work-around when the shader demands it.
v2: Add comment explaining the 1.0*y_over_x. Suggested by Caio.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes: 2098ae16c8b ("nir/builder: Move nir_atan and nir_atan2 from SPIR-V translator")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13999>
(cherry picked from commit 1cb3d1a6ae027b5045e47ccf7e551bd81fc3cab2)
-
7759964b
by Jason Ekstrand
at 2022-02-23T17:55:55+00:00
anv: Call vk_command_buffer_finish if create fails
This wasn't much of a problem before because vk_command_buffer_finish()
doesn't do much on an empty command buffer. However, it's about to be
responsible for managing the pool's list of command buffers so it will
be critical to get this right.
Fixes: c9189f481353 ("anv: Use a common vk_command_buffer structure")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
(cherry picked from commit 7b0e30685446d30aaea1c2c7c1fd04a658c74d94)
-
df4a2369
by Samuel Pitoiset
at 2022-02-23T17:55:55+00:00
radv/winsys: fix initializing debug/perftest options if multiple instances
Since the winsys uses refcount, options like RADV_DEBUG_ZERO_VRAM might
have not been initialized if the first instance wasn't created with
application info.
This fixes missing zerovram for vkd3d-proton.
Cc: 21.3 22.0 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14978>
(cherry picked from commit aa3405e8123324b3d8173c709e6573d86570d99a)
-
4eff8db4
by Bas Nieuwenhuizen
at 2022-02-23T17:55:55+00:00
radv: Fix preamble argument order.
Used the wrong cmdbuffer in the wrong situation. Oops.
Fixes: 915e9178faf ("radv: Split out commandbuffer submission.")
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14574>
(cherry picked from commit 79131b6ee6c98a8b662aeb32bb623a8974f8bef5)
-
f3cfbbd4
by Tapani Pälli
at 2022-02-23T17:55:55+00:00
iris: fix a leak on surface states
Cc: mesa-stable
Closes:https://gitlab.freedesktop.org/mesa/mesa/-/issues/6013
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15010>
(cherry picked from commit ecc00410302cae4e22ad7718a531f03658190389)
-
49f5acdc
by Emma Anholt
at 2022-02-23T17:55:55+00:00
i915g: Initialize the rest of the "from_nir" temporary VS struct.
draw looked at the uninitialized XFB state, which should just be zeroed
out since i915 doesn't have XFB.
Fixes: 2b3fc26da8be ("i915g: Switch to using nir-to-tgsi.")
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14896>
(cherry picked from commit 780949c62bc2cd1805f99911a76fde016e430b6b)
-
a1c0f9ae
by Yiwei Zhang
at 2022-02-23T17:55:56+00:00
venus: properly destroy deferred ahb image before real image creation
Fixes: 19b7b09885c ("venus: prepare image creation helpers for AHB")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15037>
(cherry picked from commit 9dd15295e30b3dd5a75440dab05a1eb4019ef1a8)
-
abba5cdf
by Tapani Pälli
at 2022-02-23T17:55:56+00:00
mesa/st: always use DXT5 when transcoding ASTC format
This fixes artifacts seen in games when using ASTC transcoding,
we need to use DXT5 for proper alpha channel support.
Number of components is a block specific property, there is no easy
way to see if we will require >1bit alpha support or not, so simply
use DXT5 to have support in place.
Fixes: 91cbe8d855c ("gallium: Add a transcode_astc driconf option")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15029>
(cherry picked from commit d3b4202b63cb3aca42bc91c5bc416acc1b7f382b)
-
7b99e1d8
by Connor Abbott
at 2022-02-23T17:55:56+00:00
ir3/spill: Fix simplify_phi_nodes with multiple loop nesting
Once we simplified a phi node, we never updated the definition it points
to, which meant that it could become out of date if that definition were
also simplified, and we didn't check that when rewriting sources. That
could happen when there are multiple nested loops with phi nodes at the
header.
Fix it by updating the phi's pointer. Since we always update sources
after visiting the definition it points to, when we go to rewrite a
source, if that source points to a simplified phi, the phi's pointer
can't be pointing to a simplified phi because we already visited the phi
earlier in the pass and updated it, or else it's been simplified in the
meantime and this isn't the last pass. This way we don't need to
keep recursing when rewriting sources.
Fixes: 613eaac7b53 ("ir3: Initial support for spilling non-shared registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15035>
(cherry picked from commit 3ef858a6f6789207e3f24550e9dfb595e3018029)
-
34b279cd
by Timur Kristóf
at 2022-02-23T17:55:56+00:00
radv: Disable IB2 on compute queues.
The "IB2" indirect buffer command is not supported on compute queues
according to PAL, and it indeed causes GPU hangs when task shaders are
used together with vkCmdExecuteCommands.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15006>
(cherry picked from commit da719792ad2b7f50824fd1ba500f8b87e4b3b448)
-
52e72e52
by Thierry Reding
at 2022-02-23T17:55:56+00:00
tegra: Use private reference count for sampler views
With the recent addition of the shortcuts aiming to avoid atomic
operations, the reference count on sampler views can become unbalanced
in the Tegra driver since they are wrapped and then proxied to the
Nouveau driver.
Fix this by keeping a private reference count.
Fixes: ef5d42741327 ("st/mesa: add a mechanism to bypass atomics when binding sampler views")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
(cherry picked from commit e8ce0a335704af54b8269d6e862835703700392b)
-
b295aa99
by Thierry Reding
at 2022-02-23T17:55:56+00:00
tegra: Use private reference count for resources
With the recent addition of the shortcuts aiming to avoid atomic
operations, the reference count on resources can become unbalanced
in the Tegra driver since they are wrapped and then proxied to the
Nouveau driver.
Fix this by keeping a private reference count.
Fixes: 7688b8ae9802 ("st/mesa: eliminate all atomic ops when setting vertex buffers")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
(cherry picked from commit 108e6eaa83eed3eb356f3cce835c5f5e3a836b8e)
-
43b52349
by Dave Airlie
at 2022-02-23T17:55:56+00:00
lavapipe: reference gallium fences correctly.
Make sure to take references in all the correct places to get
right lifetimes for these objects and avoid leaks.
Fixes: 94a498280516 ("lavapipe: implement timeline semaphores")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15046>
(cherry picked from commit b805d3e6abc07c8a6865516707854d295791e862)
-
087e2d4d
by Lionel Landwerlin
at 2022-02-23T17:55:56+00:00
nir: fix lower_memcpy
memcpy is divided into chunks that are vec4 sized max. The problem
here happens with a structure of 24 bytes :
struct {
float3 a;
float3 b;
}
If you memcpy that struct, the lowering will emit 2 load/store, one of
sized 8, next one sized 16. But both end up located at offset 0, so we
effectively drop 2 floats.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a3177cca996145 ("nir: Add a lowering pass to lower memcpy")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15049>
(cherry picked from commit 768930a73a43e48172df00b6c934de582bd9422b)
-
45b0d081
by Ian Romanick
at 2022-02-23T17:55:56+00:00
nir: Add missing dependency on nir_opcodes.py
Commit 38800b38 changed nir_opcodes.py, but that doesn't seem to have
triggered nir_opt_algebraic.py. The change in 75ef5991 depends on
opt_algebraic lowering 16-bit versions of slt, but if opt_algebraic is
not rebuilt, this may not happen. This resulted in some people seeing
assertion failures in, for example,
dEQP-VK.spirv_assembly.instruction.compute.float16.arithmetic_3.step,
due to the backend seeing nir_op_slt that it didn't know how to handle.
v2: Add nir_opcodes.py to nir_algebraic_py so that all the per-driver
algebraic passes pick up the dependency too. Rename it to
nir_algebraic_depends. Suggested by Emma.
Closes: #6047
Fixes: d1992255bb2 ("meson: Add build Intel "anv" vulkan driver")
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15050>
(cherry picked from commit a01b26299039496ca7ed04878cbb64a18af3037c)
-
1c8401d8
by Alyssa Rosenzweig
at 2022-02-23T17:55:56+00:00
pan/bi: Avoid *FADD.v2f16 hazard in optimizer
This is a very obscure encoding restriction in the Bifrost ISA. Unknown if any
real apps or tests hit this, but we still need to get it right sadly.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15072>
(cherry picked from commit 8e0eb592d5bbcf00f8bed55cc95013abf77fad12)
-
39e45d52
by Alyssa Rosenzweig
at 2022-02-23T17:55:56+00:00
pan/bi: Avoid *FADD.v2f16 hazard in scheduler
Obscure encoding restriction. Fixes crash (assertion fail when instruction
packing) in asphalt9/2659.shader_test on Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15072>
(cherry picked from commit 24d2bdb1e050134a25924487792ee0018f8478ae)
-
7e8f25a8
by Alyssa Rosenzweig
at 2022-02-23T17:55:57+00:00
pan/bi: Lower swizzles on CSEL.i32/MUX.i32
This is counter-intuitive, but required for correct operation when
CSEL.i32 takes a 1-bit (stored 16-bit) boolean argument. The impedance
mismatch ultimately is between CSEL.b32 (nir's bcsel, nonexistant in the
hardware) and the lowering CSEL.i32. However, a similar problem exists
even with MUX.i32 which lacks a good way of zero/sign-extending
booleans.
Cherry-picked from my Valhall branch though the issue also affects
Bifrost. Fixes piglit shaders@glsl-vs-if-bool on Bifrost.
Unfortunately, shader-db is quite unhappy :-(
The proper fix is to use lower_bool_to_bitsize, but that can't be
backported to mesa-stable.
total instructions in shared programs: 157539 -> 158953 (0.90%)
instructions in affected programs: 55621 -> 57035 (2.54%)
helped: 2
HURT: 259
helped stats (abs) min: 2.0 max: 2.0 x̄: 2.00 x̃: 2
helped stats (rel) min: 2.11% max: 2.67% x̄: 2.39% x̃: 2.39%
HURT stats (abs) min: 1.0 max: 40.0 x̄: 5.47 x̃: 2
HURT stats (rel) min: 0.36% max: 16.13% x̄: 2.55% x̃: 1.59%
95% mean confidence interval for instructions value: 4.44 6.40
95% mean confidence interval for instructions %-change: 2.21% 2.82%
Instructions are HURT.
total tuples in shared programs: 132322 -> 132907 (0.44%)
tuples in affected programs: 31806 -> 32391 (1.84%)
helped: 5
HURT: 152
helped stats (abs) min: 1.0 max: 2.0 x̄: 1.40 x̃: 1
helped stats (rel) min: 0.39% max: 3.03% x̄: 1.70% x̃: 1.61%
HURT stats (abs) min: 1.0 max: 42.0 x̄: 3.89 x̃: 2
HURT stats (rel) min: 0.29% max: 18.18% x̄: 2.50% x̃: 1.79%
95% mean confidence interval for tuples value: 2.88 4.58
95% mean confidence interval for tuples %-change: 1.87% 2.85%
Tuples are HURT.
total clauses in shared programs: 28672 -> 28698 (0.09%)
clauses in affected programs: 869 -> 895 (2.99%)
helped: 1
HURT: 24
helped stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
helped stats (rel) min: 5.88% max: 5.88% x̄: 5.88% x̃: 5.88%
HURT stats (abs) min: 1.0 max: 2.0 x̄: 1.12 x̃: 1
HURT stats (rel) min: 0.49% max: 33.33% x̄: 8.46% x̃: 3.59%
95% mean confidence interval for clauses value: 0.82 1.26
95% mean confidence interval for clauses %-change: 3.84% 11.93%
Clauses are HURT.
total cycles in shared programs: 15119.04 -> 15137.88 (0.12%)
cycles in affected programs: 922.87 -> 941.71 (2.04%)
helped: 4
HURT: 79
helped stats (abs) min: 0.0416669999999999 max: 0.0833330000000001 x̄: 0.05 x̃: 0
helped stats (rel) min: 0.40% max: 3.17% x̄: 1.57% x̃: 1.35%
HURT stats (abs) min: 0.041665999999999315 max: 1.75 x̄: 0.24 x̃: 0
HURT stats (rel) min: 0.30% max: 20.00% x̄: 2.83% x̃: 2.12%
95% mean confidence interval for cycles value: 0.17 0.29
95% mean confidence interval for cycles %-change: 1.86% 3.37%
Cycles are HURT.
total arith in shared programs: 4922.71 -> 4947.71 (0.51%)
arith in affected programs: 1423.79 -> 1448.79 (1.76%)
helped: 5
HURT: 177
helped stats (abs) min: 0.0416669999999999 max: 0.0833330000000001 x̄: 0.06 x̃: 0
helped stats (rel) min: 0.40% max: 3.17% x̄: 1.82% x̃: 1.67%
HURT stats (abs) min: 0.041665999999999315 max: 1.75 x̄: 0.14 x̃: 0
HURT stats (rel) min: 0.30% max: 22.22% x̄: 2.50% x̃: 1.52%
95% mean confidence interval for arith value: 0.11 0.17
95% mean confidence interval for arith %-change: 1.86% 2.90%
Arith are HURT.
total quadwords in shared programs: 120605 -> 120956 (0.29%)
quadwords in affected programs: 26535 -> 26886 (1.32%)
helped: 6
HURT: 143
helped stats (abs) min: 1.0 max: 7.0 x̄: 2.83 x̃: 1
helped stats (rel) min: 0.93% max: 6.33% x̄: 2.29% x̃: 1.71%
HURT stats (abs) min: 1.0 max: 21.0 x̄: 2.57 x̃: 2
HURT stats (rel) min: 0.34% max: 13.79% x̄: 2.02% x̃: 1.22%
95% mean confidence interval for quadwords value: 1.86 2.86
95% mean confidence interval for quadwords %-change: 1.45% 2.24%
Quadwords are HURT.
total threads in shared programs: 4670 -> 4669 (-0.02%)
threads in affected programs: 2 -> 1 (-50.00%)
helped: 0
HURT: 1
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14576>
(cherry picked from commit 8bd4976d981a9a98ce7e419b25c05d38ccac027b)
-
146135fe
by Lionel Landwerlin
at 2022-02-23T17:55:57+00:00
anv/genxml/intel/fs: fix binding shader record entry
Bit is flipped compared to all the other packets.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 705395344d25 ("intel/fs: Add support for compiling bindless shaders with resume shaders")
Fixes: c3ac9afca389 ("anv: Create and return ray-tracing pipeline SBT handles")
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15078>
(cherry picked from commit 2763a8af5ac3739c677ed7de7bd2a7e60a35f822)
-
f4119bc2
by Mike Blumenkrantz
at 2022-02-23T17:55:57+00:00
zink: always set VkPipelineMultisampleStateCreateInfo::pSampleMask
by initializing this on context creation, we can ensure that the correct
value is always here
cc: mesa-stable
fixes:
dEQP-GLES31.functional.texture.multisample.samples_1.sample_mask_and_alpha_to_coverage
dEQP-GLES31.functional.texture.multisample.samples_1.sample_mask_and_sample_coverage
dEQP-GLES31.functional.texture.multisample.samples_1.sample_mask_and_sample_coverage_and_alpha_to_coverage
dEQP-GLES31.functional.texture.multisample.samples_1.sample_mask_only
dEQP-GLES31.functional.texture.multisample.samples_2.sample_mask_and_alpha_to_coverage
dEQP-GLES31.functional.texture.multisample.samples_2.sample_mask_and_sample_coverage
dEQP-GLES31.functional.texture.multisample.samples_2.sample_mask_and_sample_coverage_and_alpha_to_coverage
dEQP-GLES31.functional.texture.multisample.samples_2.sample_mask_only
dEQP-GLES31.functional.texture.multisample.samples_3.sample_mask_and_alpha_to_coverage
dEQP-GLES31.functional.texture.multisample.samples_3.sample_mask_and_sample_coverage
dEQP-GLES31.functional.texture.multisample.samples_3.sample_mask_and_sample_coverage_and_alpha_to_coverage
dEQP-GLES31.functional.texture.multisample.samples_3.sample_mask_only
dEQP-GLES31.functional.texture.multisample.samples_4.sample_mask_and_alpha_to_coverage
dEQP-GLES31.functional.texture.multisample.samples_4.sample_mask_and_sample_coverage
dEQP-GLES31.functional.texture.multisample.samples_4.sample_mask_and_sample_coverage_and_alpha_to_coverage
dEQP-GLES31.functional.texture.multisample.samples_4.sample_mask_only
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14974>
(cherry picked from commit 8ff96efcfde15d5e8b83ce3b0b95a73254e98b69)
-
b75deed8
by Mike Blumenkrantz
at 2022-02-23T17:55:57+00:00
zink: always invalidate streamout counter buffer if not resuming
this otherwise treates begin/end/begin the same as begin/pause/resume
cc: mesa-stable
fixes:
KHR-GL46.texture_view.view_classes
KHR-GL46.transform_feedback.capture_geometry_separate_test
KHR-GL46.transform_feedback.capture_vertex_separate_test
KHR-GL46.transform_feedback.query_geometry_separate_test
KHR-GL46.transform_feedback.query_vertex_separate_test
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15020>
(cherry picked from commit e8ba9cee270417af29f2399ada05c2d104f1dc58)
-
b07f3027
by Dave Airlie
at 2022-02-23T17:55:57+00:00
crocus: fix leak on gen4/5 stencil fallback blit path.
Noticed by Ilia.
Fixes: f3630548f1da ("crocus: initial gallium driver for Intel gfx 4-7")
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15100>
(cherry picked from commit 0f989a840efda4aedee2dbf009c400c428be01d7)
-
341a13b8
by Qiang Yu
at 2022-02-23T17:55:57+00:00
radeonsi: fix depth stencil multi sample texture blit
This causes the flushed_depth_texture is allocated without
multi sample. So the blit will cause VM fault.
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14990>
(cherry picked from commit 80974a5f1e4095b7ae9b4e705da5b33f283e35c2)
-
483f8a99
by Marcin Ślusarz
at 2022-02-23T17:55:57+00:00
anv: don't set color state when input state was requested
Fixes: 814dc669359 ("anv: Allocate surface states per-subpass")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15081>
(cherry picked from commit 037e98a10c4a4e719fe243f9a39074d3f77c00d7)
-
a0a15b74
by Qiang Yu
at 2022-02-23T17:55:57+00:00
glx: fix pbuffer refcount init
glXMakeCurrent* may miss release pbuffer if pbuffer is created
with refcount=0. This won't happen when pbuffer had different
GLX id and X pixmap id.
cc: mesa-stable
Fixes: bc8a51a79a5 ("glx: no need to create extra pixmap for pbuffer")
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14926>
(cherry picked from commit bf09c08e315280da340690aa5bdf9ea1ff738108)
-
03908ef6
by Marek Olšák
at 2022-02-23T17:55:57+00:00
ac/surface: add more elements to meta equations because HTILE can use them
according to gfx10SwizzlePattern.h
Fixes: 9fabbf2150253d06d - ac/surface: copy the HTILE equations to the surface
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
(cherry picked from commit 79a7ab642ac1e103c9b00e197105eb3f10c6c523)
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2a96aba4
by Alyssa Rosenzweig
at 2022-02-23T17:55:57+00:00
panvk: Use more reliable assert for UBO pushing
The important thing isn't the number of words pushed, it's that there are no
UBOs required for us to upload. Check that instead.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15090>
(cherry picked from commit 3c1021cd1ed0f60d474a6c3a6aafb0746f1da02b)
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c2774397
by Eric Engestrom
at 2022-02-23T18:19:19+00:00
docs: add release notes for 21.3.7
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d5ec846b
by Eric Engestrom
at 2022-02-23T18:35:29+00:00
VERSION: bump for 21.3.7