[Git][xorg-team/lib/mesa][debian-unstable] 66 commits: docs: Add sha256 sum for 22.2.3

Timo Aaltonen pushed to branch debian-unstable at X Strike Force / lib / mesa

Commits:

ce33e68f
by Dylan Baker at 2022-11-07T10:16:36-08:00
```
docs: Add sha256 sum for 22.2.3
```

6bba416e

by Dylan Baker at 2022-11-07T10:32:30-08:00

.pick_status.json: Update to fd8ec189e575d5220d8b4c30647fa6de57928e07

7dee5d7d

by Alyssa Rosenzweig at 2022-11-07T10:32:47-08:00

panfrost: Don't copy resources if replaced

If a synchronized transfer_map is going to overwrite an entire resource,
there's no need to memcpy in the original contents ahead-of-time. This
memcpy is particularly bad for large buffers where it's copying WC->WC,
although that could be mitigated with threaded_context's cpu_storage in
the future if needed.

Prevents a performance regression in glmark2's buffer scenes from the
next patch, hence the Cc.

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19361>
(cherry picked from commit 0b26a9f773956fc00a77b0d4a7aafee5795ce935)

9a92cd91

by Alyssa Rosenzweig at 2022-11-07T10:32:48-08:00

panfrost: Replace resource shadowing flush

The entire point of resource shadowing is to avoid unnecessary flushing.
Flushing readers after shadowing is counterproductive. A refresher on
how resource shadowing is supposed to work:

First, we determine if it's beneficial to shadow resources. If so, we
create a new backing buffer object. We flush the current writer of the
resource, if there is one, so the current contents become known to the
CPU. If we are not discarding the original resource, we then copy the
existing contents of the buffer to the new shadow buffer on the CPU.
Finally, we swap the resource's backing buffer for our shadow. Any batch
that reads the resource will continue to read the old copy of the
resource, and any future draw calls will see the new copy with the
change implemented.

Where did we go wrong?

In 988d5aae74d ("panfrost: Flush resources when shadowing"), we started
flushing all readers. We didn't actually need to flush, we just needed
to avoid dangling references on the batches reading the old copy of the
resource. But that's easily enough avoided: just remove the references.
The batches still hold a reference to the underlying BO, which will be
freed at the right time regardless.

Originally motivated by glmark2 -bbuffer:update-method=subdata, which
has some pathological access paterns.

Firefox is a lot faster anecdotally (now scrolling at 60fps in firefox).

But what actually motivated this is an apitrace from Duckstation's GLES
renderer. With this patch, the in-game portion is improved 3fps to 21fps.

Closes: #4028
Fixes: 988d5aae74d ("panfrost: Flush resources when shadowing")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19361>
(cherry picked from commit 2d8f28df731638e1270b0ae273c7bfd2b29b7993)

842759cf

by Karol Herbst at 2022-11-07T10:32:48-08:00

iris: invalidate sysvals if grid dimension changes

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18581>
(cherry picked from commit 9ccdd86b9040b265893712f4125d30552e0fe1cd)

7ade4ab5

by Bas Nieuwenhuizen at 2022-11-07T10:32:49-08:00

radv: Fix compute scratch buffer emission.

Copied wrong from radeonsi. The registers following the scratch
buffer address are the shader rsrc1/rsrc2. Not the user SGPR0
containing the ring resource word 1.

Fixes: 278e533ec9c ("radv: update scratch buffer registers on GFX11")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19488>
(cherry picked from commit b8865ad04643cd7e8faa8a863d81fedbc1e29231)

117ac5ca

by Bas Nieuwenhuizen at 2022-11-07T10:32:50-08:00

radv: Make the compute scratch waves per SE as well.

Fixes: 278e533ec9c ("radv: update scratch buffer registers on GFX11")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19488>
(cherry picked from commit d876ddc920f1aaf48219f2060de6cc99c003bc5d)

b2e9eaf7

by Eric Engestrom at 2022-11-07T10:39:29-08:00

vk/runtime: drop incorrect UNUSED annotation

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19458>
(cherry picked from commit c6c5949ff70a47c47795fe9161a7514173b5be24)

79c19062

by Bas Nieuwenhuizen at 2022-11-08T14:59:33+00:00

radv: Do not try to run on GFX11 with mesa 22.2.

It isn't going to work.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19577>

6c2e9191

by Dylan Baker at 2022-11-08T12:58:54-08:00

.pick_status.json: Update to def56b531c86f529bc32d1834ccb479457717db7

7f7586f8

by Iago Toral Quiroga at 2022-11-08T13:00:39-08:00

v3dv: do a better job at cleaning up the device on init failure

These leaks on device creation failure have been there before, but
were only exposed as CTS failures after the recent event refactoring.

Partially fixes:
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic
dEQP-VK.api.object_management.alloc_callback_fail.device
dEQP-VK.api.object_management.alloc_callback_fail.device_group

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19458>
(cherry picked from commit b78fd50e90c700466213e4b3b40ce10547b1e14e)

7d5c727f

by Iago Toral Quiroga at 2022-11-08T13:00:40-08:00

v3dv: handle allocation failure during pipeline initialization

Fixes (with disk cache disabled):
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic
dEQP-VK.api.object_management.alloc_callback_fail.device
dEQP-VK.api.object_management.alloc_callback_fail.device_group

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19458>
(cherry picked from commit 1f5966397aa208eb574394a4d0a592b66b776b44)

9855c364

by Iago Toral Quiroga at 2022-11-08T13:00:41-08:00

v3dv: do better cleanup on failure during pipeline cache operation

Fixes (with disk cache enabled):
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic
dEQP-VK.api.object_management.alloc_callback_fail.device
dEQP-VK.api.object_management.alloc_callback_fail.device_group

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19458>
(cherry picked from commit 5e97150e21a75920c3521717f70f9f92702729b4)

0971b56a

by Samuel Pitoiset at 2022-11-08T13:02:05-08:00

radv: invalidate L2 instead of only writeback L2 when using DCC stores

It seems INV_L2 is the right thing to do, especially for RDNA2 chips
with non-coherent RBs (NAVI22 is one of these). This fixes DCC
corruption.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6476
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7507
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19516>
(cherry picked from commit 06adf6ad117e92a832c5073326bd83b638b3ca37)

90058545

by Alex Brachet at 2022-11-08T13:02:06-08:00

nir: Fix qsort comparator function

`pred` is a pointer, for sufficiently large numbers these
being cast to int were both > 0 regardless of the order
of `data1` and `data2`.

Fixes: 523a28d3fe0d ("nir: add an instruction set API")

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19539>
(cherry picked from commit c987a727a76eda1feada07e2eca6a5597dbddd93)

dde0dab8

by Marek Olšák at 2022-11-08T15:11:32-08:00

radeonsi/gfx11: fix compute scratch buffer - WAVES is always per SE

Fixes: ba02ed91a60 - ac/gfx11: fix the scratch buffer

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19477>
(cherry picked from commit bdfacd0a24e023515fb7b7fae4a279cff0fbac4e)

ef4460c2

by Francisco Jerez at 2022-11-08T15:11:34-08:00

nir/lower_int64: Fix float16 to int64 conversions.

Currently float16 to int64 conversions don't work correctly, because
the "div" variable has an infinite value, since 2^32 isn't
representable as a 16-bit float, which causes the result of of rem(x,
div) to be NaN for all inputs, leading to an incorrect result.  Since
no values of magnitude greater than 2^32 are representable as a
float16 we don't actually need to do the fdiv/frem operations, the
conversion is equivalent to f2u32 with the result padded to 64 bits.

Rework:
 * Jordan: Handle f16 in if/else rather than conditional

Fixes: 936c58c8fcc ("nir: Extend nir_lower_int64() to support i2f/f2i lowering")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19391>
(cherry picked from commit e14f85366ebbc57f45d2561e0d3f0804f8adb549)

74e3535b

by Marek Vasut at 2022-11-08T15:11:35-08:00

etnaviv: Use old set of state registers for PE configuration on GC880

While the GC880 is HALTI0, it still uses the old set of state registers
for PE pipe configuration. This is another specialty of the GC880, readd
the missing handling for this GPU otherwise e.g. Qt5 cube example suffers
from rendering corruption with both eglfs and wayland backends.

Fixes: 7c46a488362 ("etnaviv: use new PE pipe address states on >= HALTI0")
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19562>
(cherry picked from commit 20984aab0f6717f5fbf79fc21c2c5f442472b605)

3f1fe4b6

by Mauro Rossi at 2022-11-08T15:11:36-08:00

Android.mk: Fix gnu++14 related build failures

This patch filters-out '-std=gnu++14' from the cflags obtained
from AOSP/KATI dummy target output to avoid the following building errors:

FAILED: src/gallium/drivers/r600/45f68e3@@r600@sta/sfn_sfn_assembler.cpp.o
...
clang++ ... -std=c++17 ... -std=gnu++14
...
In file included from ../src/gallium/drivers/r600/sfn/sfn_assembler.cpp:27:
In file included from ../src/gallium/drivers/r600/sfn/sfn_assembler.h:32:
In file included from ../src/gallium/drivers/r600/sfn/sfn_shader.h:31:
../src/gallium/drivers/r600/sfn/sfn_instr.h:369:56: error: no template named 'is_base_of_v' in namespace 'std'; did you mean 'is_base_of'?
template <typename T, typename = std::enable_if_t<std::is_base_of_v<Instr, T>>>
                                                  ~~~~~^~~~~~~~~~~~
                                                       is_base_of
/home/utente/pie-x86_kernel/external/libcxx/include/type_traits:1412:29: note: 'is_base_of' declared here
struct _LIBCPP_TEMPLATE_VIS is_base_of
                            ^
In file included from ../src/gallium/drivers/r600/sfn/sfn_assembler.cpp:27:
In file included from ../src/gallium/drivers/r600/sfn/sfn_assembler.h:32:
In file included from ../src/gallium/drivers/r600/sfn/sfn_shader.h:31:
../src/gallium/drivers/r600/sfn/sfn_instr.h:369:51: error: template argument for non-type template parameter must be an _expression_
template <typename T, typename = std::enable_if_t<std::is_base_of_v<Instr, T>>>
                                                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/utente/pie-x86_kernel/external/libcxx/include/type_traits:439:16: note: template parameter is declared here
template <bool _Bp, class _Tp = void> using enable_if_t = typename enable_if<_Bp, _Tp>::type;
               ^
2 errors generated.

Cc: "22.2" "22.3" mesa-stable
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19563>
(cherry picked from commit fd8ec189e575d5220d8b4c30647fa6de57928e07)

b7a7e78a

by Ian Romanick at 2022-11-08T15:11:37-08:00

intel/fs: Fix constant propagation into 32x16 integer multiplication

Don't copy propagate the constant in situations like

    mov(8)          g8<1>D          0x7fffffffD
    mul(8)          g16<1>D         g8<8,8,1>D      g15<16,8,2>W

On platforms that only have a 32x16 multiplier, this will result in
lowering the multiply to

    mul(8)          g15<1>D         g14<8,8,1>D     0xffffUW
    mul(8)          g16<1>D         g14<8,8,1>D     0x7fffUW
    add(8)          g15.1<2>UW      g15.1<16,8,2>UW g16<16,8,2>UW

On Gfx8 and Gfx9, which have the full 32x32 multiplier, it results in

    mul(8)          g16<1>D         g15<16,8,2>W    0x7fffffffD

Volume 2a of the Skylake PRM says:

    When multiplying a DW and any lower precision integer, the
    DW operand must on src0.

See also https://gitlab.freedesktop.org/mesa/crucible/-/merge_requests/104.

Previous to INTEL_shader_integer_functions2 (in Vulkan or OpenGL), I
don't think it would be possible to create a situation where this could
occur.  I discovered this via some optimizations that can determine that
the non-constant source must be able to fit in 16-bits.  The case listed
above came from piglit's "ext_transform_feedback-order arrays points"
with those optimizations in place.

No shader-db or fossil-db changes on any Intel platform.

Fixes: de6c0f84879 ("intel/fs: Implement support for NIR opcodes for INTEL_shader_integer_functions2")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17718>
(cherry picked from commit db204121686726c74dd0aba2d1c1790d40e7baba)

40bdc68a

by Dylan Baker at 2022-11-09T09:33:39-08:00

.pick_status.json: Update to 4ca61b5420ed26683891664aa35dc5f1a3bad063

3801b943

by Caio Oliveira at 2022-11-09T09:33:45-08:00

nir: Don't reorder volatile intrinsics

Fixes issue with "is helper invocation" that in recent SPIR-V is mapped to
a volatile Load.  The CSE was catching the loads before they were transformed
in the new is_helper_invocation intrinsic (that is not reorderable).

Fixes: 729df14e452 ("nir: Handle volatile semantics for loading HelperInvocation builtin")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19432>
(cherry picked from commit 8ab628ab2e4d4f460e2eabdb11876997c0ab13bc)

2a0c174d

by Alyssa Rosenzweig at 2022-11-09T09:33:49-08:00

panfrost: Copy resources when necessary

If the map doesn't set MAP_DISCARD_RANGE, we do have to copy the existing
contents over. MAP_WRITE on its only gives permission to replace the contents,
unfortunately it does not require that the application actually do so.

Closes: #7640
Fixes: 0b26a9f7739 ("panfrost: Don't copy resources if replaced")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: Roman Elshin
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19576>
(cherry picked from commit cf7a3906b0629b2b6aadd3b18a39eae06b10fd6a)

caf17bfa

by Dylan Baker at 2022-11-10T11:41:42-08:00

.pick_status.json: Update to ecc2dfc503dcf62573fa539b49caa874f908c1cf

b2a3f0d4

by Iago Toral Quiroga at 2022-11-10T12:02:09-08:00

broadcom/compiler: avoid using ldvary sequence to hide latency of branching

This can cause us to stomp the contents of r5 before we have a chance to read
it, like this:

0x3d103186bb800000 nop                           ; nop                         ; ldvary.r0
0x3d105686bbf40000 nop                           ; mov rf26, r5                ; ldvary.r1
0x020000ef0000d000 bu.allna  232, r:unif (0x0000001c / 0.000000)
0x3d1096c6bbf40000 nop                           ; mov rf27, r5                ; ldvary.r2

Here, the MOV in the last instruction is supposed to read r5 produced from
ldvary.r0, but because we have inserted the bu instruction in between now
that read happens at the same time that ldvary.r1 updates r5, stomping the
value we were supposed to read.

Fix this by disallowing injection of a branch instruction in between an ldvary
instruction and its write to the r5 register 2 instructions later.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7062
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19616>
(cherry picked from commit 1174f376096ed6ceebb0fb2810456f1501a68df7)

91c675a0

by Karol Herbst at 2022-11-10T12:02:10-08:00

glsl: fix buffer texture type

Fixes: 3ace6b968b3 ("compiler/types: Add a texture type")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
(cherry picked from commit 87526f79db68a13ebd448cfd6b1be4b25616c801)

e1fe4a64

by Alyssa Rosenzweig at 2022-11-10T12:02:11-08:00

panfrost: Require 64-byte alignment on imports

While Panfrost allocates linear images with strides that are a multiple of 64
bytes, other dma-buf producers on the system may not satisfy this requirement.
However, at least on v7 and newer, any image with a regular format must have a
stride that is a multiple of 64 bytes.

This fixes a real bug in an application that created a linear R8_UNORM image
with stride 480 bytes, imported it as an EGL_image, and then tried to texture
from it with the GPU. Previously, the driver allowed this situation but it
resulted in an imprecise fault from the GPU. This patch corrects the driver to
reject the import as invalid due to the unaligned stride, ensuring we never
attempt to texture from such a resource.

To implement, we add some new layout queries to centralize knowledge about the
stride alignment requirements, and we sprinkle in asserts to show how the
invariant is upheld throughout the lifecycle of image creation to texturing.

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19620>
(cherry picked from commit 811f8a19469722bea32f3c539b8cf0939fe3b057)

80570915

by Yonggang Luo at 2022-11-11T00:17:26+00:00

ci: Fixes macos.yml

Stick to macos-11 to prevent accident broken
always install meson with pip to prevent pull new version of python

Cc: mesa-stable

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Acked-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19640>

1867648d