[Git][xorg-team/lib/mesa][upstream-unstable] 56 commits: .pick_status.json: Update to a65285f54be6d756a8a558f638c18bb4f075222c

Timo Aaltonen pushed to branch upstream-unstable at X Strike Force / lib / mesa

Commits:

16e281c4

by Eric Engestrom at 2021-12-17T22:30:44+00:00

.pick_status.json: Update to a65285f54be6d756a8a558f638c18bb4f075222c

04ccbf5f

by Lionel Landwerlin at 2021-12-17T22:30:48+00:00

nir/opt_deref: don't try to cast empty structures

Found while running valgrind :

==3583454== Invalid read of size 4
==3583454==    at 0xF48336: glsl_get_struct_field_offset (nir_types.cpp:84)
==3583454==    by 0xC7CD0D: opt_replace_struct_wrapper_cast (nir_deref.c:1068)
==3583454==    by 0xC7CDD9: opt_deref_cast (nir_deref.c:1087)
==3583454==    by 0xC7DD8E: nir_opt_deref_impl (nir_deref.c:1369)
==3583454==    by 0xC7DF4E: nir_opt_deref (nir_deref.c:1428)
==3583454==    by 0xA63F3C: brw_kernel_from_spirv (brw_kernel.c:325)
==3583454==    by 0xA3BC2C: main (intel_clc.c:481)
==3583454==  Address 0xe4f7e88 is 24 bytes after a block of size 48 in arena "client"

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13952>
(cherry picked from commit 8e568d3f00b31344bc86a7ee1d8e57eb430314a5)

0025ef98

by Tapani Pälli at 2021-12-17T22:30:48+00:00

anv: allow VK_IMAGE_LAYOUT_UNDEFINED as final layout

>From VK_KHR_synchronization2:
   "Image memory barriers that do not perform an image layout
    transition can be specified by setting oldLayout equal to
    newLayout.

    E.g. the old and new layout can both be set to
    VK_IMAGE_LAYOUT_UNDEFINED, without discarding data in the
    image."

v2: make assert more readable (Lionel Landwerlin)

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14008>
(cherry picked from commit d44d2e823f6fae31bff5876835717b64149414c2)

b0ce6f5f

by Lionel Landwerlin at 2021-12-17T22:30:48+00:00

intel/nir: preserve access value when duping intrinsic

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 6339aba775ecdc ("intel/compiler: Lower SSBO and shared loads/stores in NIR")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
(cherry picked from commit 7661237a313cdac13aee866041963a1f00c13f3a)

26a01fc0

by Lionel Landwerlin at 2021-12-17T22:30:49+00:00

nir/lower_io: include the variable access in the lowered intrinsic

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
(cherry picked from commit f98984ad1390098f2a5cf5d8770b35ad8fcf6d6a)

4b38a272

by Jakob Bornecrantz at 2021-12-17T22:30:49+00:00

vulkan-device-select: Don't leak drmDevicePtr

ASAN found a leak:

```
Direct leak of 1440 byte(s) in 10 object(s) allocated from:
    #0 0x4a9a92 in calloc (build-Monado-CMake/src/xrt/targets/service/monado-service+0x4a9a92)
    #1 0x7fdf82afed06 in drmDeviceAlloc build-drm/../drm/xf86drm.c:3933:14
    #2 0x7fdf82b00203 in drmProcessPciDevice build-drm/../drm/xf86drm.c:3965:11
    #3 0x7fdf82b00203 in process_device build-drm/../drm/xf86drm.c:4359:16
    #4 0x7fdf82b0485e in drmGetDevice2 build-drm/../drm/xf86drm.c:4528:15
    #5 0x7fdf70751113 in device_select_find_xcb_pci_default ../src/vulkan/device-select-layer/device_select_x11.c:95:13
    #6 0x7fdf70751113 in get_default_device ../src/vulkan/device-select-layer/device_select_layer.c:395:21
    #7 0x7fdf70751113 in device_select_EnumeratePhysicalDevices ../src/vulkan/device-select-layer/device_select_layer.c:456:33
```

Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14068>
(cherry picked from commit 555f93cdcd9e8f41b860513bcfedc85076f98ff0)

898308f1

by Alyssa Rosenzweig at 2021-12-17T22:30:49+00:00

panfrost: Don't shadow Mesa's fui()

Will fix a compiler error when we #include the Valhall disassembler
header from pandecode.

Fixes: 688827f3c52 ("pan/va: Add disassembler generator")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
(cherry picked from commit 745d7db74813b8e1ce52c879e0bbffde2ca6e6c1)

d1f28201

by Francisco Jerez at 2021-12-17T22:30:49+00:00

intel/fs/xehp: Teach SWSB pass about the exec pipeline of FS_OPCODE_PACK_HALF_2x16_SPLIT.

This virtual instruction is translated into multiple half float
physical instructions, even though its destination is typically of
integer type, which prevents the software scoreboard pass from
inferring the correct execution pipeline for the virtual instruction
on XeHP+ platforms.  Teach the SWSB lowering pass about this
inconsistency between the IR and physical instruction types.

Fixes among other tests:

dEQP-GLES31.functional.shaders.builtin_functions.pack_unpack.packhalf2x16_compute

Fixes: d4537770bbf ("intel/fs: Add helper functions inferring sync and exec pipeline of an instruction.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5685
Reported-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14002>
(cherry picked from commit de55fd358fa4b3e3620145c71557090403b8ec6c)

0cc65a56

by James Jones at 2021-12-17T22:30:49+00:00

gbm: Don't pass default usage flags on ABIs < 1

Older drivers will not expect any flags from the
GBM front-end when modifiers are in use, and will
likely fail the allocation or handle them
incorrectly as a result. Only specify usage flags
when allocating from a backend with an ABI >= 1,
as that's the ABI version that added support for
specifying usage flags along with modifiers.

Fixes: ad50b47a14e9 ("gbm: assume USE_SCANOUT in create_with_modifiers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5709
Signed-off-by: James Jones <jajones@nvidia.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Tested-by: Olivier Fourdan <ofourdan@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14049>
(cherry picked from commit c2550d1b7ca8146283265ce6f4267fa2b3591946)

69b8f9c6

by Roman Stratiienko at 2021-12-17T22:30:49+00:00

v3dv: Fix dEQP-VK.info#instance_extensions test

When mesa3d is built without VK_USE_PLATFORM_DISPLAY_KHR definition,
dEQP test fails:

    dEQP    : Test case 'dEQP-VK.info.instance_extensions'..
    dEQP    :   Fail (Extension VK_KHR_get_display_properties2 is missing
                                                 dependency: VK_KHR_display)
    dEQP    : DONE!

Enable KHR_get_display_properties2 only if VK_USE_PLATFORM_DISPLAY_KHR
is enabled.

Fixes: f884c2e3be36 ("v3dv: implement VK_KHR_get_display_properties2")
Signed-off-by: Roman Stratiienko <roman.o.stratiienko@globallogic.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14047>
(cherry picked from commit 72db15913f63344cd8f01e6682c2079727762d3b)

55d80bc2

by Ian Romanick at 2021-12-17T22:30:49+00:00

intel/compiler: Don't predicate a WHILE if there is a CONT

Previously a predicated BREAK that appeared immediately before the WHILE
would get merged into the WHILE.  This doesn't work if other flow
control (e.g., a CONT) can transfer directly to the WHILE.

On Intel platforms, this fixes the CTS test
dEQP-VK.graphicsfuzz.stable-binarysearch-tree-nested-if-and-conditional.

No shader-db changes on any Intel platform.

When this commit was first created (over a month before it is going to
land), there were some regressions that were prevented by other commits
in MR !13095.  That does not appear to be the case now, so I don't know
what changed.  Basically, the treatment of discard as a combination of
demote and terminate causes additional continues in some loops, and
those continues trigger this bug.  The other commits from that MR
prevent those continues from being generated in the first place.

All Intel platforms had simlar fossil-db results. (Ice Lake shown)
Instructions in all programs: 144419989 -> 144419995 (+0.0%)
SENDs in all programs: 6947332 -> 6947332 (+0.0%)
Loops in all programs: 38277 -> 38277 (+0.0%)
Spills in all programs: 204075 -> 204075 (+0.0%)
Fills in all programs: 319480 -> 319480 (+0.0%)

A few shaders in Doom 2016 were hurt by one instruction each.  It seems
likely that these shaders would have experienced at least some
mis-rendering.

Closes: #4213
Fixes: d13bcdb3a9f ("i965/fs: Extend predicated break pass to predicate WHILE.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14128>
(cherry picked from commit 4563261ad18c5e82d8fa869e87f938dc123e10b1)

519ea904

by Timur Kristóf at 2021-12-17T22:30:49+00:00

aco: Clean up and fix quad group instructions with WQM.

According to the Vulkan spec chapter 9.25 Helper Invocations,
quad group operations have to be executed by helper invocations.

This commit cleans up the code for quad group instructions by
unifying the code path of quad broadcast with the others, and then
calling emit_wqm just once at the end.

Fixes: 93c8ebfa780ebd1495095e794731881aef29e7d3
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5570
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13929>
(cherry picked from commit 77db4e27b1814fb48036abe457d7fbe1a6965409)

7aca70e1

by Danylo Piliaiev at 2021-12-17T22:30:49+00:00

turnip: Fix operator precedence in address calculation macros for queries

Fixes crash in Oblivion, Skyrim, Crysis running through DXVK on 32b
systems.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5723
Fixes: 937dd76426b2b372a18be35e1416eed291524af7 "turnip: Implement VK_KHR_performance_query"

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14148>
(cherry picked from commit c82d7e36174198b5dea3811fb11672d33aed4acb)

0d8d9dde

by Jason Ekstrand at 2021-12-17T22:30:49+00:00

crocus: wm_prog_key::key_alpha_test uses GL enums

Fixes: f3630548f1da ("crocus: initial gallium driver for Intel gfx 4-7")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14141>
(cherry picked from commit 4175ed50994a27b7d0b36471da58195670aa4192)

29fcb94b

by Jason Ekstrand at 2021-12-17T22:30:50+00:00

anv: Stop doing too much per-sample shading

We were setting anv_pipeline::sample_shading_enable based on
sampleShadingEnable without looking at minSampleShading.  We would then
pass this value into nir_lower_wpos_center which would add sample_pos to
frag_coord.  Then the back-end compiler picks up on the existence of
sample_pos and forces persample dispatch.  This leads to doing
per-sample dispatch whenever sampleShadingEnable = VK_TRUE regardless of
the value of minSampleShading.  This is almost certainly costing us
perf somewhere.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14022>
(cherry picked from commit 1f559930b6b7a633d93cd4e9cc4965b3f5e7c607)

7dd3b99e

by Mauro Rossi at 2021-12-17T22:30:50+00:00

android: add support for classic dri-drivers (v2)

(v1) Changelog:

-Ddri-drivers option is added in MESON_GEN_NINJA
$(foreach ) cycle copies *_dri.so files to /vendor/lib{64}/dri/

(v2) Changelog

Remove unwanted Symlinks created for classic dri drivers
Update the comments describing each step
Rename .symlinks.timestamp to .targets.timestamp
Squash all the changes in one commit to facilitate picking in mesa stable

HowTo:
BoardConfig.mk: BOARD_MESA3D_CLASSIC_DRIVERS defines the list of classic dri drivers
example: BOARD_MESA3D_CLASSIC_DRIVERS := i965

Fixes: 8621bd8d ("android: Add scripts to build using meson")
Cc: "21.3" "21.2" mesa-stable
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13973>

6b5c69da

by Dave Airlie at 2021-12-17T22:30:50+00:00

crocus: cleanup bo exports for external objects

This might have led to a leak in firefox/webrender/webgl scenarios

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: f3630548f1da ("crocus: initial gallium driver for Intel gfx 4-7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14167>
(cherry picked from commit 76da4569544f8b08de0d3044b7e4bc74a6a1df45)

e5c982b3

by Roman Stratiienko at 2021-12-17T22:30:50+00:00

v3dv: Fix V3DV_HAS_SURFACE preprocessor condition

Currently V3DV_HAS_SURFACE is always defined.
There is no WSI for Android in mesa3d, therefore WSI related extensions
should not be exposed.

1. Define V3DV_HAS_SURFACE only for platforms which has WSI implemented.
2. Rename V3DV_HAS_SURFACE -> V3DV_USE_WSI_PLATFORM to align naming
with other platforms.

Fixes dEQP-VK.wsi.android.surface#query_protected_capabilities

Fixes: 79e445143054 ("v3dv: move extensions table to v3dv_device")
Signed-off-by: Roman Stratiienko <roman.o.stratiienko@globallogic.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14144>
(cherry picked from commit fcfc4ddfccd5ab998409304c164b73b62bb3c480)

41f98661

by Pierre-Eric Pelloux-Prayer at 2021-12-17T22:30:50+00:00

radeonsi: fix fast clear / depth decompression corruption

Insert a flush after a depth decompression pass if the texture
was fast cleared.
This fixes a corruption which seems to only affect gfx10.3 chips.

Ideally we should also clear tex->need_flush_after_depth_decompression
after a flush but there's no easy way for this so this commit will
introduce extra flushes.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14089>
(cherry picked from commit 573d6451335a0b3c947aa2823619e31017d0362c)

d6f3d5f5

by Nanley Chery at 2021-12-17T22:30:50+00:00

iris: Free the local cache bucket in bufmgr_destroy

Fixes: 55be94dcab4 ("iris/bufmgr: Add new set of buckets for local memory.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14012>
(cherry picked from commit f93892c5d3300127faabb5ba8cbf986d11cc38a4)

2198488b

by Rhys Perry at 2021-12-17T22:30:50+00:00

radv: have the null winsys set more fields

I copied stuff from ac_gpu_info.c until there were no Sienna Cichild or
Polaris10 fossil-db changes between real hardware and RADV_FORCE_FAMILY.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14126>
(cherry picked from commit 451e6c1b32c2ea43d84ab60513dc6fde2373431c)

709c5d14

by Caio Oliveira at 2021-12-17T22:30:50+00:00

nir: Initialize nir_register::divergent

Fixes: c7fc44f9ebb ("nir/from_ssa: Respect and populate divergence information")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14205>
(cherry picked from commit dcc7b19cae924ecbcee88186a11df0290e5c7a8e)

c51e2664

by Michel Zou at 2021-12-17T22:30:50+00:00

meson: correctly detect linker arguments

Fixes: 22673a98 ("meson: Check arguments before adding")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13961>
(cherry picked from commit 631b3fe3e9e27302d48051f7d5bef5e4e1bb0e40)

fd54eeb8

by Ian Romanick at 2021-12-17T22:30:50+00:00

intel/stub: Silence "initialized field overwritten" warning

src/intel/tools/intel_noop_drm_shim.c:459:36: warning: initialized field overwritten [-Woverride-init]
  459 |    [DRM_I915_GEM_EXECBUFFER2_WR] = i915_ioctl_noop,
      |                                    ^~~~~~~~~~~~~~~

Fixes: 0f4f1d70bfe ("intel: add stub_gpu tool")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14218>
(cherry picked from commit 2dc7c24b80147709e00cc47a2d1da1ca6058e9d2)

09ead89f

by Lionel Landwerlin at 2021-12-17T22:30:50+00:00

vulkan: fix missing handling of WSI memory signal

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b996fa8efaa4 ("anv: implement VK_KHR_synchronization2")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5744
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14237>
(cherry picked from commit cdf101455d488a9dadb74765d5250dbc34472165)

1b8f73b5

by Jason Ekstrand at 2021-12-17T22:30:51+00:00

radeonsi/nir: Check for VARYING_SLOT_PRIMITIVE_ID not SYSTEM_VALUE

This function is called on load/store_input/output.  It makes no sense
for it to get a SYSTEM_VALUE enum.  This only doesn't explode because
SYSTEM_VALUE_PRIMITIVE_ID happens to be below VARYING_SLOT_VAR0 so it
doesn't interact with any actual varyings.  The next commit is going to
add another system value which will push SYSTEM_VALUE_PRIMITIVE_ID up by
one so it will equal VARYING_SLOT_VAR0 and then the first FS input will
always get smashed to flat which isn't what we want.

Fixes: b59bb9c07ae4 ("radeonsi: force flat for PrimID early in si_nir_scan_shader")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14198>
(cherry picked from commit 732b234ddba7ed697cb1ed351d56cc4a8b56539a)

4b6c14cc
by Eric Engestrom at 2021-12-17T22:31:13+00:00
```
docs: add release notes for 21.3.2
```
a06cd045
by Eric Engestrom at 2021-12-17T22:31:25+00:00
```
VERSION: bump for 21.3.2
```

524fb244

by Eric Engestrom at 2021-12-29T20:55:53+00:00

.pick_status.json: Update to 4942e108909bbe0f53ec5fd52a3c7ae14c60abe6

4d28da1f

by Eric Engestrom at 2021-12-29T20:56:28+00:00

.pick_status.json: Mark d49d092259829ad9e33d0d9fc8eef9759d9fe56e as denominated

d8715ff1

by Jason Ekstrand at 2021-12-29T20:56:28+00:00

vulkan/log: Don't assert on non-client-visible objects

We already have code to deal with non-client-visible objects but we were
asserting if it didn't fall into one of the clearly mappable error
cases.  However, we didn't have a mapping for VK_ERROR_NOT_PERMITTED
which can happen during object creation.  Let's just be sloppy and drop
the assert.  Worst case, the client gets an error with no object.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13341>
(cherry picked from commit 116e23e3855a28e74e09517d0005200fd139dc88)

7342fa5e

by Alyssa Rosenzweig at 2021-12-29T20:56:28+00:00

pan/indirect_draw: Don't upload garbage UBO

There should never be a CPU pointer in GPU memory, let's say that...

Fixes: 2e6d94c198e ("panfrost: Add helpers to support indirect draws")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
(cherry picked from commit d696183d4dc2ac695f74f802e03b893397e9567d)

aade2545

by Alyssa Rosenzweig at 2021-12-29T20:56:28+00:00

panfrost: Fix Secondary Shader field

Off-by-one on the start.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: Icecream95 <ixn@disroot.org>
Fixes: 73e80994d50 ("panfrost: Add secondary shader XML fields")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
(cherry picked from commit 8dc1936faac8804669e21901bacf170e1c009291)

63af1b93

by Rob Clark at 2021-12-29T20:56:28+00:00

freedreno/ir3: Handle instr->address when cloning

Without this, a cloned instruction that takes full regs will trigger an
ir3_validate assert.  This can happen, for ex, if an instruction that
writes p0.x and has a relative src gets cloned in ir3_sched.

Fixes an assert in Genshin Impact with a debug build.

Fixes: 9af795d9b98 ("ir3: Make ir3_instruction::address a normal register")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14231>
(cherry picked from commit 78c53f48888bf936d41e16b8bcf020beb5c5ff99)

d93b0b48

by Rob Clark at 2021-12-29T20:56:28+00:00

freedreno/computerator: Fix @buf header

Order is important in the grammar, the more specific match needs to go
first.

Fixes: ba1c989348d ("freedreno/computerator: pass iova of buffer to const register")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14231>
(cherry picked from commit d1edc6d9a14cd8f53d6c308a55b2d9ace4675c79)

03f6edd5

by Francisco Jerez at 2021-12-29T20:56:29+00:00

intel/fs: Add physical fall-through CFG edge for unconditional BREAK instruction.

This adds a missing CFG edge that represents a possible physical
control flow path the EU might take under some conditions which isn't
part of the logical CFG of the program.  This possibility shouldn't
have led to problems on platforms prior to Gfx12, since the missing
control flow edge cannot possibly influence liveness intervals.
However on Gfx12+ it becomes the compiler's responsibility to resolve
data dependencies across instructions, and the missing physical
control flow paths may lead to a WaR data hazard currently not visible
to the software scoreboard pass, which could lead to data corruption.

Worse, the possibility for this path to be taken by the EU increases
on Gfx12+ due to a hardware bug affecting EU fusion -- However the
same physical path can be potentially taken on earlier platforms as
well, so this patch extends the CFG on all platforms for consistency,
even though the lack of this edge shouldn't lead to any functional
issues on platforms earlier than Gfx12.  There are no shader-db
changes on earlier platforms, so there seems to be no disadvantage
from using the same CFG representation as on later platforms.

This issue has ben reported on TGL with the following conformance
test, thanks to Ian for bringing the FULSIM dependency check warning
to my attention:

   dEQP-VK.graphicsfuzz.spv-stable-pillars-volatile-nontemporal-store

Fixes: 4d1959e69328cf ("intel/cfg: Represent divergent control flow paths caused by non-uniform loop execution.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4940
Reported-by: Tapani Pälli <tapani.palli@intel.com>
Reported-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14248>
(cherry picked from commit e7470a40c569025b18d4d6767aa21caaa862a5b5)

1c44a60f

by Daniel Schürmann at 2021-12-29T20:56:29+00:00

aco/optimizer: fix fneg modifier propagation on VOP3P

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13688>
(cherry picked from commit 193bd740ab8ca4ee978562eb18361448ad79146b)

6c510c48

by Daniel Schürmann at 2021-12-29T20:56:29+00:00

aco/ra: fix get_reg_for_operand() in case of stride mismatches

We have to clear the register file from the previous operand
as otherwise, there might be no space left.

Totals from 5 (0.00% of 134572) affected shaders: (GFX10.3)
CodeSize: 21144 -> 21000 (-0.68%); split: -0.72%, +0.04%
Instrs: 3738 -> 3720 (-0.48%); split: -0.51%, +0.03%
Latency: 517229 -> 516319 (-0.18%); split: -0.18%, +0.00%
InvThroughput: 49068 -> 48902 (-0.34%); split: -0.38%, +0.04%
Copies: 501 -> 483 (-3.59%); split: -3.79%, +0.20%

Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14279>
(cherry picked from commit d36a43598c2dd2c490e8e8cb901d067fa56aeb8d)

0fb58901

by Timur Kristóf at 2021-12-29T20:56:29+00:00

aco/optimizer_postRA: Fix combining DPP into VALU.

Fixes: 4ac47ad1cd7976d7effbbfae37fa69e26a288ad2
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14281>
(cherry picked from commit ce4daa259cd97dd0c9d27aacb255e4afad8295c4)

11ef5221

by Timur Kristóf at 2021-12-29T20:56:29+00:00

aco/optimizer_postRA: Fix applying VCC to branches.

Fixes: a93092d0edc92eea8e8e96709ad9857f05c45cef
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14281>
(cherry picked from commit b293299776069676af1bc76aeb1d48223e0e7de2)

4f848d9f

by Vinson Lee at 2021-12-29T20:56:29+00:00

panfrost: Avoid double unlock.

Fix defect reported by Coverity Scan.

Double unlock (LOCK)
double_unlock: pthread_mutex_unlock unlocks dev->indirect_draw_shaders.lock while it is unlocked.

Fixes: 2e6d94c198e ("panfrost: Add helpers to support indirect draws")
Suggested-by: Alyssa Rosenzweig <alyssa@collabora.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14262>
(cherry picked from commit 9f8a204645c60f16681309a78ca3a28a276ec5fa)

7c59c309

by Tapani Pälli at 2021-12-29T20:56:29+00:00

glsl: fix invariant qualifer usage and matching rule for GLSL 4.20

I noticed that GLSL version referenced here was wrong, version 4.20 is
first spec that does not allow invariant keyword for inputs.

v2: fix all comments (Timothy Arceri)

Fixes: f9f462936ad ("glsl: Fix invariant matching in GLSL 4.30 and GLSL ES 1.00.")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14241>
(cherry picked from commit ebd1f202ae10f851b23392c022e059467b90475d)

ae068af2

by pal1000 at 2021-12-29T20:56:29+00:00

swr: Fix MSVC build

Fixes: e002f5a086 ("gallium: change pipe_vertex_element::src_format to uint8_t")
Closes: #5550
Authored-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13908>

507ec266

by Jesse Natalie at 2021-12-29T20:56:29+00:00

microsoft/compiler: Implement inot

Fixes: cb283616 ("nir/algebraic: Small optimizations for SpvOpFOrdNotEqual and SpvOpFUnordEqual")
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14140>
(cherry picked from commit 45354be410f088b7b30beca62c1ca87b598c35c1)

d4bbc126