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1
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+diff --git a/src/amd/common/ac_surface_modifier_test.c b/src/amd/common/ac_surface_modifier_test.c
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2
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+index 8c2f90fc8cc9567acd6c875a05f52a74e4fb5f0e..b017699979c5f662ab87271c9c6b8180e9fa857d 100644
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|
3
|
+--- a/src/amd/common/ac_surface_modifier_test.c
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4
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++++ b/src/amd/common/ac_surface_modifier_test.c
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5
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+@@ -24,7 +24,7 @@
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6
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+ * not change the meaning of existing modifiers.
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7
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+ */
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8
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+
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9
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+-struct test_entry {
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|
10
|
++struct ALIGN32 test_entry {
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11
|
+ /* key part */
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12
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+ uint64_t modifier;
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13
|
+ unsigned w;
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14
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+@@ -32,20 +32,14 @@ struct test_entry {
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15
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+ enum pipe_format format;
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16
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+
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17
|
+ /* debug info */
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18
|
+- const char *name;
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19
|
+ uint8_t pipes;
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20
|
+ uint8_t rb;
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21
|
+ uint8_t banks_or_pkrs;
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22
|
+ uint8_t se;
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23
|
++ const char *name;
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24
|
+
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25
|
+ /* value to determine uniqueness */
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26
|
+ unsigned char hash[20];
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27
|
+-
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28
|
+- /* u_vector requires power of two sizing */
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29
|
+- char padding[8];
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|
30
|
+-#ifdef PIPE_ARCH_X86
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31
|
+- char padding2[8];
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|
|
32
|
+-#endif
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|
33
|
+ };
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34
|
+
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35
|
+ static uint64_t
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|
36
|
+@@ -234,19 +228,19 @@ static void test_modifier(const struct radeon_info *info,
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|
37
|
+ },
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|
|
38
|
+ };
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|
39
|
+
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|
|
40
|
+- struct test_entry entry = {
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|
|
41
|
+- .modifier = modifier,
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|
|
42
|
+- .w = config.info.width,
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|
|
43
|
+- .h = config.info.height,
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|
|
44
|
+- .format = format,
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|
|
45
|
+- .name = name,
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|
|
46
|
+- .pipes = G_0098F8_NUM_PIPES(info->gb_addr_config),
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|
|
47
|
+- .rb = G_0098F8_NUM_RB_PER_SE(info->gb_addr_config) +
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|
|
48
|
+- G_0098F8_NUM_SHADER_ENGINES_GFX9(info->gb_addr_config),
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|
49
|
+- .se = G_0098F8_NUM_SHADER_ENGINES_GFX9(info->gb_addr_config),
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|
|
50
|
+- .banks_or_pkrs = info->chip_class >= GFX10 ?
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|
|
51
|
+- (info->gb_addr_config) : G_0098F8_NUM_BANKS(info->gb_addr_config)
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|
|
52
|
+- };
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|
|
53
|
++ struct test_entry entry;
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|
|
54
|
++ memset(&entry, 0, sizeof(entry));
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|
|
55
|
++ entry.modifier = modifier;
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|
|
56
|
++ entry.w = config.info.width;
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|
|
57
|
++ entry.h = config.info.height;
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|
|
58
|
++ entry.format = format;
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|
|
59
|
++ entry.name = name;
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|
|
60
|
++ entry.pipes = G_0098F8_NUM_PIPES(info->gb_addr_config);
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|
|
61
|
++ entry.rb = G_0098F8_NUM_RB_PER_SE(info->gb_addr_config) +
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|
|
62
|
++ G_0098F8_NUM_SHADER_ENGINES_GFX9(info->gb_addr_config);
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|
|
63
|
++ entry.se = G_0098F8_NUM_SHADER_ENGINES_GFX9(info->gb_addr_config);
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|
|
64
|
++ entry.banks_or_pkrs = info->chip_class >= GFX10 ?
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|
|
65
|
++ (info->gb_addr_config) : G_0098F8_NUM_BANKS(info->gb_addr_config);
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|
|
66
|
+
|
|
|
67
|
+ struct radeon_surf surf = (struct radeon_surf) {
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|
|
68
|
+ .blk_w = 1,
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|
|
69
|
+diff --git a/src/util/macros.h b/src/util/macros.h
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|
|
70
|
+index 1fc9e23355b0b418ad7d2597dd2b76647e2d3087..7cd666c1395ddcae7b63bb2ce54142d86b435725 100644
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|
|
71
|
+--- a/src/util/macros.h
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|
|
72
|
++++ b/src/util/macros.h
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|
|
73
|
+@@ -234,8 +234,10 @@ do { \
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|
|
74
|
+
|
|
|
75
|
+ #ifdef _MSC_VER
|
|
|
76
|
+ #define ALIGN16 __declspec(align(16))
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|
|
77
|
++#define ALIGN32 __declspec(align(32))
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|
|
78
|
+ #else
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|
|
79
|
+ #define ALIGN16 __attribute__((aligned(16)))
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|
|
80
|
++#define ALIGN32 __attribute__((aligned(32)))
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|
|
81
|
+ #endif
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|
|
82
|
+
|
|
|
83
|
+ #ifdef __cplusplus
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