[Git][xorg-team/lib/mesa][debian-experimental] 65 commits: .pick_status.json: Update to 8ed874d73fafcfbcb54730dc5c20e58f24d55f5e

[Timo Aaltonen <tjaalton@debian.org>]

Title: GitLab

Timo Aaltonen pushed to branch debian-experimental at X Strike Force / lib / mesa

Commits:

• a181bc63
  by Dylan Baker at 2021-02-10T15:10:54-08:00

  .pick_status.json: Update to 8ed874d73fafcfbcb54730dc5c20e58f24d55f5e
  

• ca39949a
  by Jason Ekstrand at 2021-02-10T15:10:58-08:00

  vulkan: Make vk_debug_report_callback derive from vk_object_base
  
  Fixes: 51c6bc13ce3a "anv,vulkan: Implement VK_EXT_private_data"
  Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8676>
  (cherry picked from commit bd1705a4808f61513f5ff818679efd5c5f105f8a)
  

• 60f12ee1
  by Samuel Pitoiset at 2021-02-10T15:10:59-08:00

  radv: fix waiting on the last enabled RB for occlusion queries
  
  Wait on the last enabled RB, not the last RB. This fixes GPU hangs
  because the GPU was waiting forever.
  
  Cc: mesa-stable
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4212
  Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
  Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8836>
  (cherry picked from commit 7e47fe9a940f3989caf98024fdc584641601fa2e)
  

• bf0b3c65
  by Dave Airlie at 2021-02-10T15:11:00-08:00

  zink: don't pick a cpu device ever.
  
  This goes down the list and picks the first non-cpu device, when
  we merge the CI patch we should add a forcing env var in here.
  
  Fixes: 8d46e35d1 ("zink: introduce opengl over vulkan")
  Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8845>
  (cherry picked from commit e41b0202c9af96d511546e2e9c78742e86fb981f)
  

• 664a5ef7
  by Jesse Natalie at 2021-02-10T15:11:01-08:00

  drisw: Disable automatic use of layered drivers with LIBGL_ALWAYS_SOFTWARE
  
  If LIBGL_ALWAYS_SOFTWARE is set, then drisw is selected, and internally,
  drisw should choose one of the actual software drivers. If it's not set,
  but drisw is still selected (no hardware DRM driver, like in WSL), then
  layered drivers are preferred over pure software.
  
  Fixes: 4a3b42a7 ("drisw: Prefer hardware-layered sw-winsys drivers over pure sw")
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4171
  Acked-by: Daniel Stone <daniels@collabora.com>
  Reviewed-by: Dave Airlie <airlied@redhat.com>
  Reviewed-by: Adam Jackson <ajax@redhat.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8782>
  (cherry picked from commit a88cd98315c6eecd8026402cf785ca5092589b58)
  

• 00b62f38
  by Boris Brezillon at 2021-02-10T15:11:01-08:00

  panfrost: Fix a polygon list corruption in the multi-context case
  
  The polygon list is written by tiler jobs and read by fragment ones,
  and nothing should re-use the heap until the fragment job is done.
  4fec6c944817 ("panfrost: Add the tiler heap to fragment jobs") fixed
  this for the !multi-context case by adding the heap BO to fragment job.
  But the tiler heap is shared accross contexts, and vertex/tiler+fragment
  job submission is done through 2 separate ioctls, meaning that
  vertex/tiler and fragment jobs from 2 different context might be
  interleaved.
  
  Add a lock at the device level to ensure tiler/vertex+fragment jobs are
  submitted sequentially, with no other jobs using the same tiler heap
  in-between.
  
  Cc: mesa-stable
  Fixes: d8deb1eb6a22 ("panfrost: Share tiler_heap across batches/contexts")
  Reported-by: Icecream95 <ixn@disroot.org>
  Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
  Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  Tested-by: Icecream95 <ixn@disroot.org>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8822>
  (cherry picked from commit 66125c429fe7ced20e1125b9a439ae98d5fab993)
  

• bb2aea8d
  by Rhys Perry at 2021-02-10T15:11:02-08:00

  aco: always set exec_live=false
  
  Register demand calculation for exec masks doesn't always match
  get_live_changes() and get_temp_registers(). For now, just set
  exec_live=false.
  
  fossil-db (GFX10.3):
  Totals from 108230 (77.64% of 139391) affected shaders:
  SGPRs: 5759658 -> 5756818 (-0.05%); split: -0.08%, +0.03%
  VGPRs: 4061104 -> 4061248 (+0.00%); split: -0.00%, +0.01%
  SpillSGPRs: 14114 -> 15198 (+7.68%); split: -0.10%, +7.78%
  CodeSize: 266548396 -> 266603288 (+0.02%); split: -0.01%, +0.03%
  MaxWaves: 1390885 -> 1390855 (-0.00%); split: +0.00%, -0.00%
  Instrs: 50983353 -> 50992972 (+0.02%); split: -0.02%, +0.04%
  Cycles: 1733042048 -> 1735443264 (+0.14%); split: -0.02%, +0.16%
  VMEM: 41933625 -> 41914722 (-0.05%); split: +0.04%, -0.09%
  SMEM: 7197675 -> 7197789 (+0.00%); split: +0.16%, -0.16%
  VClause: 1050885 -> 1050978 (+0.01%); split: -0.02%, +0.03%
  SClause: 2074913 -> 2071844 (-0.15%); split: -0.23%, +0.08%
  Copies: 3181464 -> 3188125 (+0.21%); split: -0.38%, +0.59%
  Branches: 1127526 -> 1127716 (+0.02%); split: -0.10%, +0.12%
  PreSGPRs: 3376687 -> 3586076 (+6.20%); split: -0.00%, +6.20%
  PreVGPRs: 3339740 -> 3339811 (+0.00%)
  
  Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
  Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
  Cc: mesa-stable
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8807>
  (cherry picked from commit d1f93261b17d73eceb16b7081000b5bb8f6608f2)
  

• bde380bd
  by Mike Blumenkrantz at 2021-02-10T15:11:06-08:00

  radv: null bo list pointer for null descriptors on update
  
  failing to unset any existing pointers here leads to stale bo entries in
  the list and then the kernel rejecting the cmdbuf with ENOENT
  
  Fixes: 126d5adb11e ("radv: Use host memory pool for non-freeable descriptors.")
  
  Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8840>
  (cherry picked from commit 2f534c2e2ee97b89c43f155c0e2f9efe5a3dffac)
  

• 0ea5fe87
  by Mike Blumenkrantz at 2021-02-10T15:11:06-08:00

  radv: zero the bo descriptor array when allocating a new set
  
  this must be reset to avoid issues when using VK_DESCRIPTOR_BINDING_PARTIALLY_BOUND_BIT_EXT
  when some descriptors in the set may not have been bound
  
  fixes #4219
  
  Fixes: 126d5adb11e ("radv: Use host memory pool for non-freeable descriptors.")
  
  Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8840>
  (cherry picked from commit 09ce403b2d77ca80eade07562839103ed9b46f0b)
  

• a1248b81
  by Bas Nieuwenhuizen at 2021-02-10T15:11:07-08:00

  radv: Improve spilling on discrete GPUs.
  
  The linked bug gets better performance and I personally verified
  better spilling performance on HZD so let us make this step for now.
  
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3183
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3698
  Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
  CC: mesa-stable
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6833>
  (cherry picked from commit 862b6a9a97ad9c47c14dbc76ea892293573c746f)
  

• 6a526efc
  by Ilia Mirkin at 2021-02-10T15:11:09-08:00

  nouveau: reinstate fencing on screen destroy
  
  As it turns out, the wait is required as the driver expects for
  rendering to be quiesced on exit. This can trigger channel failures,
  which in turn trigger recovery. This can fail and destroy the whole
  system.
  
  Fixes: 28a781323fb ("nouveau: change fence destruction logic on screen destroy")
  References: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4223
  Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
  Reviewed-by: Karol Herbst <kherbst@redhat.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8867>
  (cherry picked from commit 92f12952f32ee08cd302f8591ab059ca5f167239)
  

• 0a1f910f
  by Simon Ser at 2021-02-10T15:11:10-08:00

  nouveau/nvc0: fix linear buffer alignment for scan-out/cursors
  
  The hardware can only scan-out linear buffers with a pitch
  aligned to 256. It can only use packed buffers for cursors.
  
  Signed-off-by: Simon Ser <contact@emersion.fr>
  Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
  Closes: https://gitlab.freedesktop.org/drm/nouveau/-/issues/36
  Cc: mesa-stable
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8500>
  (cherry picked from commit 6650c53e64198d1b2a283778e620be8458765dae)
  

• 7d994745
  by Simon Ser at 2021-02-10T15:11:10-08:00

  nouveau/nv50: fix linear buffer alignment for scan-out/cursors
  
  The hardware can only scan-out linear buffers with a pitch
  aligned to 256. It can only use packed buffers for cursors.
  
  Signed-off-by: Simon Ser <contact@emersion.fr>
  Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
  Cc: mesa-stable
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8500>
  (cherry picked from commit a4c11385b7107c89558f3d0e23234bfcb52664a6)
  

• bcde7c14
  by Ian Romanick at 2021-02-10T15:11:11-08:00

  nir/algebraic: Fix a >> #b << #b for sizes other than 32-bit
  
  The base mask previously used was 0xffffffff.  This is not correct (but
  should still work) for 16-bit and 8-bit values, but it means the high
  32-bits of 64-bit values will get chopped off.
  
  Instead of just restricting the pattern to 32-bits (as was done before
  00b28a50b2c), this extends the optimization in two ways:
  
  1. Make it correct for other bit sizes.
  2. Make it work for arbitrary shift counts.
  
  This has the added benefit of reducing the number of patterns actually
  added (7 previously, 4 now).
  
  The "Reassociate for improved CSE" part is just reverted to its
  pre-00b28a50b2c behavior.  I doubt that pattern is likely to have much
  impact outside 32-bits.
  
  This change fixes the piglit tests
  tests/spec/arb_gpu_shader_int64/fs-shl-of-shr-int64.shader_test and
  tests/spec/arb_gpu_shader_int64/fs-iand-of-iadd-int64.shader_test.
  
  All of the shaders helped in shader-db are vertex shaders on platforms
  with vector-oriented vertex processing.  The shaders contain ((x >> 16)
  << 16).  These platforms set lower_extract_word, so the optimization
  that transforms (x >> 16) to extract_u16 doesn't trigger.  With only ~60
  shaders involved, I didn't bother trying to add extract_XYZ versions of
  these patterns to try to get those cases.
  
  Fixes: 00b28a50b2c ("nir/algebraic: trivially enable existing 32-bit patterns for all bit sizes")
  Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
  
  Haswell and earlier Intel GPUs had simlar results. (Haswell shown)
  total instructions in shared programs: 16397554 -> 16397496 (<.01%)
  instructions in affected programs: 7961 -> 7903 (-0.73%)
  helped: 58
  HURT: 0
  helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
  helped stats (rel) min: 0.36% max: 1.89% x̄: 0.99% x̃: 0.78%
  95% mean confidence interval for instructions value: -1.00 -1.00
  95% mean confidence interval for instructions %-change: -1.13% -0.85%
  Instructions are helped.
  
  total cycles in shared programs: 1035483770 -> 1035483504 (<.01%)
  cycles in affected programs: 75922 -> 75656 (-0.35%)
  helped: 44
  HURT: 2
  helped stats (abs) min: 2 max: 12 x̄: 6.14 x̃: 2
  helped stats (rel) min: 0.05% max: 1.67% x̄: 0.87% x̃: 0.72%
  HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
  HURT stats (rel)   min: 0.06% max: 0.06% x̄: 0.06% x̃: 0.06%
  95% mean confidence interval for cycles value: -7.28 -4.29
  95% mean confidence interval for cycles %-change: -1.03% -0.63%
  Cycles are helped.
  
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8852>
  (cherry picked from commit 6b0443a9008ac4c004b1f3fb846b5c1e8c961df2)
  

• 40f3ce14
  by Alyssa Rosenzweig at 2021-02-10T15:11:11-08:00

  pan/bi: Fix FLOG_TABLE modifier handling
  
  These should not be in a union together.
  
  [Note: this does not need to be backported, since the affected
  instruction is not emitted under any circumstances in the stable
  branches]
  
  Fixes: dd11e5076e6 ("pan/bi: Add new bi_instr data structure")
  Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8894>
  (cherry picked from commit 94fed29680c74f8857036ec97c3f762abfd6c014)
  

• e28d43f1
  by Caio Marcelo de Oliveira Filho at 2021-02-10T15:11:12-08:00

  spirv: Allow variable pointers pointing to an array of blocks
  
  Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
  Cc: mesa-stable
  Tested-by: Tapani Pälli <tapani.palli@intel.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8864>
  (cherry picked from commit 568a66825912d17d5a1a7f9a0dea188c079c51fc)
  

• 0bb75ccf
  by Bas Nieuwenhuizen at 2021-02-10T15:11:13-08:00

  radv: Fix vram override with fully visible VRAM.
  
  Fixes: cf2eebdf4f1 ("radv,gallium: Add driconf option to reduce advertised VRAM size.")
  Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
  Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8915>
  (cherry picked from commit bd7d8a77e9a767b81d73e7820c48c2325101ffac)
  

• a6dd1fda
  by Rhys Perry at 2021-02-10T15:11:14-08:00

  aco: do not flag all blocks WQM to ensure we enter all nested loops in WQM
  
  This should no longer be necessary since the mark_block_wqm() we use to
  flag break conditions as WQM now adds block to the worklist. With them
  added to the worklist, get_block_needs() will add WQM to block_needs.
  
  Adding WQM to block_needs here without adding the block to the worklist
  (like we do here) can cause issues because it does not ensure that the
  predecessors' branches are in WQM (needed for it to be possible to
  transition to WQM in the block). This happened in an Overwatch shader.
  
  No fossil-db changes.
  
  Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
  Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
  Fixes: 661922f6ac9 ("aco: add block to worklist in mark_block_wqm()")
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4066
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8446>
  (cherry picked from commit f0074a6f0532196f5d9d2be00a9d884100401816)
  

• a7abc65a
  by Lionel Landwerlin at 2021-02-10T15:11:14-08:00

  anv: only signal wsi fence BO on last command buffer
  
  I'm pretty sure this doesn't fix anything because the WSI code only
  use a single VkSubmitInfo, but better be safe.
  
  Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
  Fixes: ccb7d606f1a293 ("anv: Use submit-time implicit sync instead of allocate-time")
  Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8934>
  (cherry picked from commit 64cb03a52dc97e737b1e24eec6499223021174ce)
  

• 6723819c
  by Eric Anholt at 2021-02-10T15:11:15-08:00

  vc4: Remove vestiges of alpha test lowering.
  
  We stopped reporting the alpha test screen cap, and stopped using the
  value in the key, so now shrink the key.  This gets another switch case
  out of the hot uniforms upload path.
  
  Fixes: 1404b8b1e5b6 ("vc4: do not report alpha-test as supported")
  Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8601>
  (cherry picked from commit cc0841c82aec18cb93f4f1d52ea193c70cb846a8)
  

• fd7be16b
  by Eric Anholt at 2021-02-10T15:11:15-08:00

  v3d: Clean up vestiges of alpha test lowering.
  
  We had an unnecessary case in our uniforms upload switch statement, since
  we no longer advertise the cap.
  
  Fixes: 8ad931808e2d ("v3d: do not report alpha-test as supported")
  Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8601>
  (cherry picked from commit 5ddc2f916fbe32af2443af59727dbbc543e04b88)
  

• d851b07f
  by Adam Jackson at 2021-02-10T15:11:17-08:00

  osmesa: Pacify MSVC in the test code
  
  Not smart enough to think this is const, eh.
  
  Fixes: mesa/mesa#4119
  Fixes: c5c1aa7c75c05927017325829cb3f354654d0b73 ("gallium/osmesa: Fix flushing and Y-flipping of the depth buffer.")
  Reviewed-by: Eric Anholt <eric@anholt.net>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8936>
  (cherry picked from commit 88ca480c8babc684c22a6b53de4caaeb3bd9b0b9)
  

• 86a28983
  by Dylan Baker at 2021-02-18T11:26:55-08:00

  .pick_status.json: Update to 03d3294e35befc2be6ed0ed66ed92fab991c166d
  

• 0ce1f091
  by Dylan Baker at 2021-02-18T11:29:07-08:00

  Revert "vulkan: Make vk_debug_report_callback derive from vk_object_base"
  
  This reverts commit ca39949a27dcd4d9715afbb616a9896ce2e8b388.
  

• 339c9e52
  by Rhys Perry at 2021-02-18T20:12:41+00:00

  aco: add fallback algorithm in get_reg()
  
  The generated code is often terrible, but the situations where this is
  needed are rare.
  
  Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
  Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
  Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8881>
  

• 51808a20
  by Ian Romanick at 2021-02-18T20:39:16+00:00

  intel/compiler: Properly handle shift count for 8-bit sources
  
  This fixes the Crucible func.shader.shift.int8_t test on Gen8 and Gen9.
  See https://gitlab.freedesktop.org/mesa/crucible/-/merge_requests/76.
  
  No changes in fossil-db because there are no shaders in fossil-db that
  use shaderInt8. :(
  
  A couple alternatives were considered.
  
  1. Lower 8-bit integers to 16-bit on all platforms.  I looked at the
     output of a few shaders from the Vulkan CTS, and it was a mess.
     There were so many extra type converting MOVs.  I think all of that
     could be cleaned up, but it would be more work.  It would also not be
     great for cherry-picking to a stable branch.
  
     This *is* the approach that will be taken Mesa 21.1.  See also
     https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8730.
  
  2. Disable the optimization that prunes the `& 7`.  This would be more
     optimal in shaders that don't have the explicit mask, but it's not
     very future proof.  It would potentially require auditing future
     optimizations to make sure they don't run afoul of this problem.
  
  In the end, the easiest solution seems to be adding the extra mask to
  implement the specified semantics of the NIR shift instructions...
  especially since the only shaders we have that use shaderInt8 are from
  the CTS.
  
  v2: Use braces in the else part because they were used in the then part.
  Suggested by Jason.
  
  Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
  Fixes: 26fc5e1f4a8 ("nir/algebraic: expand existing 32-bit patterns to all bit sizes using loops")
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9001>
  

• b96190e9
  by Dave Airlie at 2021-02-18T12:59:36-08:00

  glsl: fix leak in gl_nir_link_uniform_blocks
  
  asan on llvmpipe with piglit tests/spec/arb_gl_spirv/execution/ssbo/array-indirect.shader_test
  reported.
  
  =================================================================
  ==3288325==ERROR: LeakSanitizer: detected memory leaks
  
  Direct leak of 48 byte(s) in 1 object(s) allocated from:
      #0 0x7f5b2d6513cf in __interceptor_malloc (/lib64/libasan.so.6+0xab3cf)
      #1 0x7f5b2a1ae810 in ralloc_size ../src/util/ralloc.c:133
      #2 0x7f5b2a1ae7e1 in ralloc_context ../src/util/ralloc.c:120
      #3 0x7f5b2b210177 in gl_nir_link_uniform_blocks ../src/compiler/glsl/gl_nir_link_uniform_blocks.c:585
      #4 0x7f5b2af7f52d in gl_nir_link_spirv ../src/compiler/glsl/gl_nir_linker.c:614
      #5 0x7f5b2a3b76fa in st_link_nir ../src/mesa/state_tracker/st_glsl_to_nir.cpp:765
      #6 0x7f5b2a3ace7b in st_link_shader ../src/mesa/state_tracker/st_glsl_to_ir.cpp:65
      #7 0x7f5b2a471165 in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3122
      #8 0x7f5b2a97a6d8 in link_program ../src/mesa/main/shaderapi.c:1311
      #9 0x7f5b2a97a6d8 in link_program_error ../src/mesa/main/shaderapi.c:1419
      #10 0x7f5b2a97df45 in _mesa_LinkProgram ../src/mesa/main/shaderapi.c:1911
      #11 0x7f5b299b59e5 in stub_glLinkProgram /mnt/devel/gl/piglit/tests/util/piglit-dispatch-gen.c:33956
      #12 0x40a71a in link_and_use_shaders /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:1604
      #13 0x415722 in init_test /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:5225
      #14 0x4164ce in piglit_init /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:5597
      #15 0x7f5b29a214e9 in run_test /mnt/devel/gl/piglit/tests/util/piglit-framework-gl/piglit_winsys_framework.c:73
      #16 0x7f5b29a103fe in piglit_gl_test_run /mnt/devel/gl/piglit/tests/util/piglit-framework-gl.c:229
      #17 0x407847 in main /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:72
      #18 0x7f5b2928f1e1 in __libc_start_main (/lib64/libc.so.6+0x281e1)
  
  SUMMARY: AddressSanitizer: 48 byte(s) leaked in 1 allocation(s).
  
  Fixes: 57239192 ("nir/linker: add gl_nir_link_uniform_blocks.c")
  Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8974>
  (cherry picked from commit 14b2dc0013c73fbd47d232b2f3ff47d29f1f624c)
  

• 37c4ed46
  by Timur Kristóf at 2021-02-18T12:59:37-08:00

  tgsi_to_nir: Fix uniform ranges.
  
  Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
  Reviewed-by: Eric Anholt <eric@anholt.net>
  Fixes: f3b33a5a35e605101d45213bddf52f2f800a52bb
  Closes: #4127
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8920>
  (cherry picked from commit e163f1c9493c7eab4c6c5f86e3dbf5f097729c18)
  

• 9948a0f1
  by Lionel Landwerlin at 2021-02-18T12:59:38-08:00

  anv: discard all timeline wait/signal value=0
  
  Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
  Fixes: 34f32a6d664807 ("anv: implement VK_KHR_timeline_semaphore")
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4277
  Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8987>
  (cherry picked from commit 6673c40011c0183953718f45bf0b9b4cba06bee5)
  

• 7ac677a0
  by Giovanni Mascellani at 2021-02-18T12:59:39-08:00

  disk_cache: Fail creation when cannot inizialize queue.
  
  Signed-off-by: Giovanni Mascellani <gmascellani@codeweavers.com>
  Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
  Fixes: e2c4435b078a ("util/disk_cache: add thread queue to disk cache")
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8983>
  (cherry picked from commit c6731daa5e70a28f5577a7aa572cad59e49caba2)
  

• 2e980353
  by Giovanni Mascellani at 2021-02-18T12:59:40-08:00

  anv: Allow null handle in DestroyDescriptorUpdateTemplate.
  
  By the Vulkan specification, and similarly to many other Vulkan calls,
  it is allowed to destroy a null descriptor update template.
  
  Signed-off-by: Giovanni Mascellani <gmascellani@codeweavers.com>
  Fixes: af5f13e58c9dfe ("anv: add VK_KHR_descriptor_update_template support")
  Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9005>
  (cherry picked from commit 72b8e643b0232dfcdcbc9f071c410653bc10d079)
  

• 67db4ad0
  by Bas Nieuwenhuizen at 2021-02-18T12:59:40-08:00

  radv: Ignore WC flags for VRAM.
  
  Otherwise there might be buffers for which we don't have a type.
  
  Fixes: 7262c743dc8 ("radv: Determine memory type for import based on fd.")
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4280
  Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8996>
  (cherry picked from commit 045a85085afeed0afae1969a6fc52610f060bab5)
  

• 63d0fbb0
  by Alyssa Rosenzweig at 2021-02-18T14:05:47-08:00

  pan/bi: Fix empty shader handling
  
  Fixes INSTR_INVALID_ENC fault on dEQP-GLES31.functional.compute.basic.empty
  
  Fixes: bfcdc8f1747 ("pan/bi: Add some zero bytes after shaders on Bifrost")
  Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9011>
  (cherry picked from commit 9bf8bfe3c8db1a0e10eb0471fa6916f924e06e1c)
  
   Conflicts:
  	src/panfrost/bifrost/bifrost_compile.c
  

• 83f99bbb
  by Jesse Natalie at 2021-02-18T14:05:49-08:00

  wgl: Refactor screen creation to a function
  
  Fixes: 8955980f ("gallium/targets/libgl-gdi: prefer d3d12 driver")
  Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
  Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4022
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8865>
  (cherry picked from commit e6cf34d611cbb6432e50570b239971da140c101f)
  

• aa7a38dd
  by Jesse Natalie at 2021-02-18T14:05:50-08:00

  wgl: Add a loop for screen creation with an ordered list of fallbacks
  
  Fixes: 8955980f ("gallium/targets/libgl-gdi: prefer d3d12 driver")
  Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
  Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4022
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8865>
  (cherry picked from commit f66b0c73031f1525426e4eb2dfeacbc84da4c7b7)
  

• fb2f644b
  by Jesse Natalie at 2021-02-18T14:05:51-08:00

  d3d12: Fail screen creation if a shader validator is needed and can't be created
  
  Also fail screen creation if experimental shader models are requested, but can't be enabled
  
  Fixes: 2ea15cd6 ("d3d12: introduce d3d12 gallium driver")
  Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
  Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4022
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8865>
  (cherry picked from commit 2ddafc26765796934fcdbcec2286810e468f67c6)
  

• 93be7a0a
  by Jesse Natalie at 2021-02-18T14:05:52-08:00

  wgl: Disable automatic use of layered drivers with LIBGL_ALWAYS_SOFTWARE
  
  Fixes: 8955980f ("gallium/targets/libgl-gdi: prefer d3d12 driver")
  Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
  Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8865>
  (cherry picked from commit 41e8dec75cdb3d06a94fb958f3063d8704e814d4)
  

• f9a57d53
  by Mike Blumenkrantz at 2021-02-18T14:05:53-08:00

  zink: fix streamout for tess stage
  
  the tess shader needs to actually emit xfb stuff in order for it to work
  
  Fixes: 2891e0b74e6 ("zink: pull xfb info from tess shader when applicable")
  
  Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9013>
  (cherry picked from commit 8721a6cbf2a03fd9925eb01ec73c5cf419a5cdf4)
  

• 8e8ba340
  by Daniel Schürmann at 2021-02-18T14:07:19-08:00

  aco: fix shared VGPR allocation on RDNA2
  
  VGPRs are now allocated in blocks of 8 normal
  or 16 shared VGPRs, respectively.
  
  Fixes: 14a5021aff661a26d76f330fec55d400d35443a8 ('aco/gfx10: Refactor of GFX10 wave64 bpermute.')
  
  Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
  (cherry picked from commit bacc3b36f55ed1f0fbb8a7efdfb072a0f3ee4ee1)
  

• 714e9a02
  by Alyssa Rosenzweig at 2021-02-18T14:07:20-08:00

  panfrost: Add panfrost_sample_pattern helper
  
  We always use rotated grids to preserve current behaviour.
  
  Cc stable as it is required for the next commit. If deemed too invasive,
  a simpler fix could be backported.
  
  Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  Cc: 21.0 <mesa-stable@lists.freedesktop.org>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
  (cherry picked from commit b08100fb96e1568aabc9b9512b9a509c56bb5c8b)
  

• 25a9312d
  by Alyssa Rosenzweig at 2021-02-18T14:07:21-08:00

  panfrost: Set tiler descriptor sampler pattern
  
  Bifrost requires this to match the framebuffer descriptor's sample
  pattern, but we were leaving the default (single-sampled)
  unconditionally, leading to undefined behaviour.
  
  It is unknown if this fixes any user-visible bugs, but without the
  commit the descriptor is likely out-of-spec.
  
  Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  Cc: 21.0 <mesa-stable@lists.freedesktop.org>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
  (cherry picked from commit bea7839c1ea2ffb190a083a0399806bf032de37d)
  

• 9b7500df
  by Eric Anholt at 2021-02-18T14:07:22-08:00

  freedreno: Add missing dep on freedreno tracepoints.
  
  We were only get guaranteed that libfreedreno (and thus the tracepoints
  generation) was ready when we linked, not when we compiled the gmemtool.c
  that also used it.
  
  Fixes: a02dcb970fff ("freedreno: Add GPU tracepoints")
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9056>
  (cherry picked from commit eabee821e9d7b1529301e7418dfda0f7e030e84b)
  

• 0ba7fae4
  by Mike Blumenkrantz at 2021-02-18T14:09:01-08:00

  zink: fix slot mapping for legacy gl io with tess stages
  
  e.g., gl_BackColor is a thing
  
  Fixes: aec03553e1b ("zink: fix tess shader i/o variables")
  
  Reviewed-by: Dave Airlie <airlied@redhat.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9019>
  (cherry picked from commit e3428419fb9ccd01e8f1b1f7f2b9d864a36f38d6)
  

• fe83bea3
  by Mike Blumenkrantz at 2021-02-18T14:09:02-08:00

  zink: handle 1bit undef values in ntv
  
  spirv requires that 1bit values be bool types, not uints
  
  Fixes: 93af00502eb ("zink: use uvec for undefs")
  
  Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9059>
  (cherry picked from commit 8300bc1f1694dadb4af4a134ed1100de152e5eaf)
  

• d03634d4
  by Samuel Pitoiset at 2021-02-18T14:09:02-08:00

  radv: only apply the MRT output NaN fixup to non-meta shaders
  
  We only want this workaround to be applied for game shaders.
  
  Cc: mesa-stable
  Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4163
  Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
  Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9048>
  (cherry picked from commit f502bdf1ab629e29a76611a16a2bbee257c27570)
  

• 379d31bc
  by Bas Nieuwenhuizen at 2021-02-18T14:09:03-08:00

  radv: Do pipe misalignment check per plane.
  
  Fixes: 4c99d6ff54b ("radv: flush L2 for images affected by the pipe misaligned issue on GFX10+")
  Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9078>
  (cherry picked from commit 596fb88c01d5eec8c9d06c6f1f691650c0754505)
  

• eca7fc49
  by Icecream95 at 2021-02-18T14:09:04-08:00

  pan/bi: Use the correct size for UBO loads
  
  Multiply by the destination bit size to get the number of bits to
  load instead of assuming 32 bits.
  
  Fixes: 2e57684d2d3 ("pan/bi: Implement load_ubo with the builder")
  Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9071>
  (cherry picked from commit 9bb376bbdb7ad1f49737cb9f736a1bf68da94eda)
  

• 1d23aa26
  by Jason Ekstrand at 2021-02-18T14:09:05-08:00

  nir: Don't optimize bcsel-of-shuffle across blocks
  
  We can't move the shuffle to a new block so this only works if the
  shuffle and the bcsel are in the same block.  Fortunately, in the
  motivating case, this is true.
  
  Also, we have to be careful around discard.  We could try really hard to
  just avoid moving them past discard but we choose to simply bail if we
  see a discard instead.
  
  Fixes: 4ff4d4e56966a40 "nir/opt_intrinsic: Optimize bcsel(b, shuffle..."
  Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
  Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
  (cherry picked from commit ceb6986d341abc97908af96461ddc6fc3c85b3a8)
  

• 2b5651e0
  by Jason Ekstrand at 2021-02-18T14:09:05-08:00

  nir: Fix parameter order in the bcsel-of-shuffle optimization
  
  Fixes: 4ff4d4e56966a40 "nir/opt_intrinsic: Optimize bcsel(b, shuffle..."
  Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
  (cherry picked from commit 8b133a1b25c17198193dafd6b356dfa42bc27028)
  

• eeb7cb93
  by Jason Ekstrand at 2021-02-18T14:09:06-08:00

  intel/fs: Shuffle can't handle source modifiers
  
  On Gen7, we have to split shuffles into two MOVs for 64-bit types so we
  can't handle source modifiers.  On Gen12.5, we have to use integer types
  all the time so we can't use them there either.  Fixing that will be a
  different commit but it interacts with this one.
  
  Fixes: 90c9f29518d "i965/fs: Add support for nir_intrinsic_shuffle"
  Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
  (cherry picked from commit 3ce6ca7214d022d04414dd9618d2c8146dc1da4f)
  

• c6140fb0
  by Vinson Lee at 2021-02-18T14:09:07-08:00

  etnaviv: Fix memory leak in etna_vertex_elements_state_create.
  
  Fix defect reported by Coverity Scan.
  
  Resource leak (RESOURCE_LEAK)
  leaked_storage: Variable cs going out of scope leaks the storage it points to.
  
  Fixes: c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs")
  Signed-off-by: Vinson Lee <vlee@freedesktop.org>
  Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9034>
  (cherry picked from commit a7a7d25e5b909711e3649eba2f24cc04dca8ab20)
  

• 07029efa
  by Mike Blumenkrantz at 2021-02-18T14:42:17-08:00

  gallium/trace: add a pipe_screen::get_compiler_options method
  
  this fixes crashes on startup
  
  Fixes: a3512ddfdf7 ("st/mesa: don't enable NV_copy_depth_to_color if NIR doesn't support FP64")
  
  fixes mesa/mesa#4312
  
  Reviewed-by: Marek Olšák <marek.olsak@amd.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9082>
  (cherry picked from commit 4feca7ecde9f5486a55dffe8d6899d1114b799bf)
  

• 291b34ef
  by Anuj Phogat at 2021-02-18T14:42:17-08:00

  intel/anv: Fix condition to set MipModeFilter for YUV surface
  
  Mip Mode Filter must be set to MIPFILTER_NONE for Planar YUV surfaces.
  Add the missing condition to check for planar format.
  
  Fixes: b24b93d5843 "anv: enable VK_KHR_sampler_ycbcr_conversion"
  Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
  Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
  Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
  (cherry picked from commit 226316116cd1e48a8f0734aa58669f98294d3d19)
  

• 674a5368
  by Ian Romanick at 2021-02-18T14:42:17-08:00

  intel/compiler: Enable the ability to emit CMPN instructions
  
  v2: Move checks to the EU validator.  Suggested by Jason.
  
  Fixes: 2f2c00c7279 ("i965: Lower min/max after optimization on Gen4/5.")
  Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
  (cherry picked from commit 6c8e2e9317fe221eb360c37021e0a43155701a06)
  

• 56a31d52
  by Ian Romanick at 2021-02-18T14:42:17-08:00

  intel/compiler: Make the CMPN builder work like the CMP builder
  
  Since the CMPN builder was never used, there was no reason to make its
  interface usable. :)
  
  Fixes: 2f2c00c7279 ("i965: Lower min/max after optimization on Gen4/5.")
  Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
  (cherry picked from commit 684ec33c79a068bacff70c3414342ee895501926)
  

• 47cffe6d
  by Ian Romanick at 2021-02-18T14:42:17-08:00

  intel/compiler: Use CMPN for min / max on Gen4 and Gen5
  
  On Intel platforms before Gen6, there is no min or max instruction.
  Instead, a comparison instruction (*more on this below) and a SEL
  instruction are used.  Per other IEEE rules, the regular comparison
  instruction, CMP, will always return false if either source is NaN.  A
  sequence like
  
      cmp.l.f0.0(16)  null<1>F        g30<8,8,1>F     g22<8,8,1>F
      (+f0.0) sel(16) g8<1>F          g30<8,8,1>F     g22<8,8,1>F
  
  will generate the wrong result for min if g22 is NaN.  The CMP will
  return false, and the SEL will pick g22.
  
  To account for this, the hardware has a special comparison instruction
  CMPN.  This instruction behaves just like CMP, except if the second
  source is NaN, it will return true.  The intention is to use it for min
  and max.  This sequence will always generate the correct result:
  
      cmpn.l.f0.0(16) null<1>F        g30<8,8,1>F     g22<8,8,1>F
      (+f0.0) sel(16) g8<1>F          g30<8,8,1>F     g22<8,8,1>F
  
  The problem is... for whatever reason, we don't emit CMPN.  There was
  even a comment in lower_minmax that calls out this very issue!  The bug
  is actually older than the "Fixes" below even implies.  That's just when
  the comment was added.  That we know of, we never observed a failure
  until #4254.
  
  If src1 is known to be a number, either because it's not float or it's
  an immediate number, use CMP.  This allows cmod propagation to still do
  its thing.  Without this slight optimization, about 8,300 shaders from
  shader-db are hurt on Iron Lake.
  
  Fixes the following piglit tests (from piglit!475):
  
      tests/spec/glsl-1.20/execution/fs-nan-builtin-max.shader_test
      tests/spec/glsl-1.20/execution/fs-nan-builtin-min.shader_test
      tests/spec/glsl-1.20/execution/vs-nan-builtin-max.shader_test
      tests/spec/glsl-1.20/execution/vs-nan-builtin-min.shader_test
  
  Closes: #4254
  Fixes: 2f2c00c7279 ("i965: Lower min/max after optimization on Gen4/5.")
  Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
  
  Iron Lake and GM45 had similar results. (Iron Lake shown)
  total instructions in shared programs: 8115134 -> 8115135 (<.01%)
  instructions in affected programs: 229 -> 230 (0.44%)
  helped: 0
  
  HURT: 1
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
  (cherry picked from commit 3c31364f5e7d34fdc977de20808bbb361f77184e)
  

• 811f4b21
  by Anuj Phogat at 2021-02-18T14:42:17-08:00

  intel/anv: Fix condition for planar yuv surface
  
  Test the sampler->conversion for NULL pointer before dereferencing it.
  
  Fixes: Regressions in VulkanCTS.
  Fixes: 226316116cd "intel/anv: Fix condition to set MipModeFilter for YUV surface"
  Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
  Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
  Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
  (cherry picked from commit 69e94e8939f79041b9cc21f03286b24166a0d746)
  

• 7047adf4
  by Jason Ekstrand at 2021-02-18T14:42:17-08:00

  anv/formats: Advertise linear sampling on depth formats
  
  They've all supported it since either forever or Iron Lake which is
  equivalent to forever for Vulkan.
  
  >From Kenneth Graunke's GitLab review:
  
      "Linear blending of depth buffer data is usually fairly nonsense
      (something's 2 meters away?  another thing's 6 meters away?  let's
      just report 4 meters?)...but it's definitely a thing we can do, so
      we may as well let apps do it, and trust them not when it doesn't
      make sense."
  
  Cc: mesa-stable@lists.freedesktop.org
  Reviewed-by: Eric Anholt <eric@anholt.net>
  Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9110>
  (cherry picked from commit 56d005c21c1e679c62214e89497766d097da6f38)
  

• dde6de9c
  by Timur Kristóf at 2021-02-18T14:42:17-08:00

  radv/llvm: Fix reporting LDS stats of tess control shaders.
  
  The LLVM backend forgot to set config->lds_size, which is used
  for reporting LDS stats.
  
  Fixes: cf89bdb9ba9c7a7ba39d142ee3c83e0379c2092a "radv: align the LDS size in calculate_tess_lds_size()"
  Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
  Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9098>
  (cherry picked from commit 72c348f85c746a574974e18d3d0a3a30b2c43a26)
  

• c6f1d33a
  by Timur Kristóf at 2021-02-18T14:42:17-08:00

  aco: Disallow LSHS temp-only I/O when VS output is written indirectly.
  
  Cc: mesa-stable
  Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
  Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9100>
  (cherry picked from commit a6e1178f917f73261940dee66cfba3e5211c29f9)
  

• 202ff54b
  by Timur Kristóf at 2021-02-18T14:42:17-08:00

  aco: Fix LDS statistics of tess control shaders.
  
  The calculate_tess_lds_size function already returns the size in blocks
  of the encoding granule, but we forgot to adjust config->lds_size.
  This variable is not used to actually set the LDS size used for TCS,
  but by ACO to make scheduling decisions.
  
  Fossil DB stats on Sienna Cichlid:
  Please note that the +3729.43% is NOT a regression.
  The real LDS size used didn't change, it was just reported incorrectly.
  
  Totals from 1342 (0.96% of 139391) affected shaders:
  VGPRs: 60880 -> 80240 (+31.80%); split: -0.05%, +31.85%
  CodeSize: 3378456 -> 3381224 (+0.08%); split: -0.23%, +0.31%
  LDS: 687104 -> 26312192 (+3729.43%)
  MaxWaves: 29794 -> 23962 (-19.57%)
  Instrs: 644194 -> 644610 (+0.06%); split: -0.32%, +0.39%
  Cycles: 2675068 -> 2676804 (+0.06%); split: -0.31%, +0.38%
  VMEM: 428840 -> 517418 (+20.66%); split: +22.53%, -1.88%
  SMEM: 91831 -> 88587 (-3.53%); split: +5.70%, -9.23%
  VClause: 22740 -> 19384 (-14.76%); split: -16.18%, +1.42%
  SClause: 19116 -> 18373 (-3.89%); split: -4.34%, +0.46%
  Copies: 66662 -> 63448 (-4.82%); split: -5.55%, +0.73%
  
  Fixes: cf89bdb9ba9c7a7ba39d142ee3c83e0379c2092a "radv: align the LDS size in calculate_tess_lds_size()"
  Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
  Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
  Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9098>
  (cherry picked from commit 48f349971fdb90e5c782daed3a5f971281cc57b3)
  

• 99ea47ad
  by Dylan Baker at 2021-02-19T10:00:44-08:00

  VERSION: bump for 21.0.0-rc5
  

• a2e58261
  by Timo Aaltonen at 2021-02-22T10:16:30+02:00

  Merge branch 'upstream-experimental' into debian-experimental
  

• e0955395
  by Timo Aaltonen at 2021-02-22T10:17:37+02:00

  bump the version
  

• 6015d264
  by Timo Aaltonen at 2021-02-22T10:32:48+02:00

  release to experimental
  

30 changed files:

• .pick_status.json
• VERSION
• debian/changelog
• src/amd/compiler/aco_insert_exec_mask.cpp
• src/amd/compiler/aco_instruction_selection.cpp
• src/amd/compiler/aco_instruction_selection_setup.cpp
• src/amd/compiler/aco_live_var_analysis.cpp
• src/amd/compiler/aco_register_allocation.cpp
• src/amd/vulkan/radv_cmd_buffer.c
• src/amd/vulkan/radv_descriptor_set.c
• src/amd/vulkan/radv_device.c
• src/amd/vulkan/radv_query.c
• src/amd/vulkan/radv_shader.c
• src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
• src/broadcom/compiler/v3d_compiler.h
• src/broadcom/compiler/vir_dump.c
• src/broadcom/vulkan/v3dv_pipeline.c
• src/compiler/glsl/gl_nir_link_uniform_blocks.c
• src/compiler/nir/nir_opt_algebraic.py
• src/compiler/nir/nir_opt_intrinsics.c
• src/compiler/spirv/vtn_variables.c
• src/gallium/auxiliary/driver_trace/tr_screen.c
• src/gallium/auxiliary/nir/tgsi_to_nir.c
• src/gallium/auxiliary/target-helpers/inline_sw_helper.h
• src/gallium/auxiliary/target-helpers/sw_helper.h
• src/gallium/drivers/d3d12/d3d12_compiler.cpp
• src/gallium/drivers/d3d12/d3d12_context.cpp
• src/gallium/drivers/d3d12/d3d12_screen.cpp
• src/gallium/drivers/etnaviv/etnaviv_state.c
• src/gallium/drivers/freedreno/meson.build

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