-
c1d83ae9
by Marek Olšák
at 2019-05-23T08:48:21Z
radeonsi: update buffer descriptors in all contexts after buffer invalidation
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108824
Cc: 19.1 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 78e35df52aa2f7d770f929a0866a0faa89c261a9)
[Juan: resolve trivial conflicts]
[Juan: remove the commit from the ignored cherry-pick]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Conflicts:
src/gallium/drivers/radeonsi/si_state_draw.c
-
ce2d68aa
by Lionel Landwerlin
at 2019-05-23T08:50:11Z
vulkan/overlay: fix timestamp query emission with no pipeline stats
The
if (!pipe && timestamp)
logic was broken. It should have been :
if (!pipe && !timestamp)
Let just drop this condition as the following code does the right
thing for all cases.
An error was appearing with the following variables :
VK_INSTANCE_LAYERS=VK_LAYER_MESA_overlay VK_LAYER_MESA_OVERLAY_CONFIG=gpu_timing
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ea7a6fa98055ad ("vulkan/overlay: add pipeline statistic & timestamps support")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 213d6527d49aeafe28d2bd320ad462730e0d56eb)
-
60d524fd
by Marek Olšák
at 2019-05-23T08:51:16Z
radeonsi: fix a regression in si_rebind_buffer
Don't update non-buffer images.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110701
Fixes: 78e35df52aa2f7d770f929a0866a0faa89c261a9 "radeonsi: update buffer descriptors in all contexts after buffer invalidation"
Cc: 19.1 <mesa-stable@lists.freedesktop.org>
Tested-By: Gert Wollny <gert.wollny@collabora..com>
(cherry picked from commit d6053bf2a170a0fec6d232fda097d2f35f0e9eae)
-
e13c13f5
by Philipp Zabel
at 2019-05-23T08:53:19Z
etnaviv: fill missing offset in etna_resource_get_handle
Without this gbm_bo_get_offset() can return 0 where it shouldn't.
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 1ccb8a071b5793852cf4e7a44ae31ba1eee07a19)
-
b02c6e8e
by Greg V
at 2019-05-23T08:56:14Z
gallium: enable dmabuf on BSD as well
The DRM_CONF_SHARE_FD code did not check for Linux, so the commit that
introduced PIPE_CAP_DMABUF broke Wayland-EGL clients on FreeBSD.
Fixes: 8ae50e60 (gallium: replace DRM_CONF_SHARE_FD with PIPE_CAP_DMABUF)
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 506ebf55c0446e690c2f40471fce2d4ea2f9762d)
-
9037cf26
by Lionel Landwerlin
at 2019-05-23T08:57:26Z
vulkan: fix build dependency issue with generated files
On machines with many cores, you can run into that issue :
../mesa-9999/src/vulkan/overlay-layer/overlay.cpp:42:10: fatal error: vk_enum_to_str.h: No such file or directory
v2: Move declare_dependency around (Eric)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Jan Ziak
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit cb7c9b2a9352cc73a2d3becc0427c53c8baf153a)
-
03fd3447
by Danylo Piliaiev
at 2019-05-27T08:26:47Z
anv: Do not emulate texture swizzle for INPUT_ATTACHMENT, STORAGE_IMAGE
If descriptorType is VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
or VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT, the imageView member of each
element of pImageInfo must have been created with the identity swizzle.
Fixes: d2aa65eb
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit c82dcf89ae853f6c499bc2c4422293750b4e1d1b)
-
95ffe632
by Christian Gmeiner
at 2019-05-27T08:28:37Z
etnaviv: use the correct uniform dirty bits
Found during code inspection.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit 78fb5594bee51402f279e54e52f79341b05f5a68)
-
74c53676
by Dave Airlie
at 2019-05-27T08:31:05Z
Revert "mesa: unreference current winsys buffers when unbinding winsys buffers"
This reverts commit 12bf7cfecf52083c484602f971738475edfe497e.
This commits caused lots of problems:
https://bugs.freedesktop.org/show_bug.cgi?id=110721
https://bugs.freedesktop.org/show_bug.cgi?id=110761
Fixes: 12bf7cfecf52 ("mesa: unreference current winsys buffers when unbinding winsys buffers")
Pushing without review as we need to get it into next stable.
(cherry picked from commit 7fe5a8e874b2cae2b1ada3f6aab8ca6766753b1e)
-
87ac0bd8
by Qiang Yu
at 2019-05-28T07:09:05Z
lima: fix lima_blit with non-zero level source resource
lima_blit will do blit between resources with different levels.
When blit from a level!=0 source, it will sample from that level
of resource as texture.
Current texture setup won't respect level when not mipmap filter.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
(cherry picked from commit 1dc593e9b9318a73b49792435776faba02562806)
-
4b3c805b
by Qiang Yu
at 2019-05-28T07:10:04Z
lima: fix render to non-zero level texture
Current implementation won't respect level of surface to render.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
(cherry picked from commit 54490b0b368a6c58e1af72d4c151fdba415be210)
-
16eac8f7
by Chenglei Ren
at 2019-05-28T07:11:10Z
anv/android: fix missing dependencies issue during parallel build
The libmesa_anv_gen* modules require anv_extensions.h, patch makes sure
it gets generated as a dependency before building them.
Signed-off-by: Chenglei Ren <chenglei.ren@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 13b38ca1e4341f5f16ae3ee9856552db12fda4cf)
-
fe7c45b9
by Lionel Landwerlin
at 2019-05-28T07:12:43Z
anv: fix apply_pipeline_layout pass for arrays of YCbCr descriptors
When using the binding tables to access arrays of YCbCr descriptors we
did not consider the offset of the accessed element. We can't do a
simple multiple because the binding table entries are tightly packed.
For example element 0 of the array could use 2 entries/planes and
element 1 could use 2 entries/planes.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3bb8768b9d62 ("anv: toggle on support for VK_EXT_ycbcr_image_arrays")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 2042f22e28b3a16ea137ac2083beaedd855b2c5f)
-
0dcba748
by Timothy Arceri
at 2019-05-28T07:13:40Z
Revert "st/mesa: expose 0 shader binary formats for compat profiles for Qt"
This reverts commit 55376cb31e2f495a4d872b4ffce2135c3365b873.
It's been over a year and both QT 5.9.5 and 5.11.0 contained a fix for the
original issue. It seems i965 only ever applied this workaround to the
18.0 branch.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 11e16ca7ce0a702088b35ccccea85e243d801ef9)
-
dd9635c1
by Juan A. Suarez Romero
at 2019-05-29T14:44:45Z
Update version to 19.1.0-rc4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
-
411114c4
by Samuel Pitoiset
at 2019-05-30T09:00:31Z
radv: allocate more space in the CS when emitting events
If the driver waits for CP DMA to be idle and emit an EOP event
we need more space.
This fixes a crash with Quake Champions.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 47a10edefb3510d1cae071037dac78a46b31949b)
-
4c7dfaba
by Lionel Landwerlin
at 2019-05-30T09:01:40Z
nir/lower_non_uniform: safely iterate over blocks
This fixes a problem where the same instruction gets replaced twice.
This was happening when the replaced instruction would be at the end
of a block.
Replacement of :
if ssa_8 {
....
intrinsic bindless_image_store (ssa_44, ssa_16, ssa_0, ssa_15) (5, 0, 34836, 32) /* image_dim=Buf */ /* image_array=false */ /* format=34836 */ /* access=32 */
}
Would be :
if ssa_8 {
loop {
vec1 32 ssa_47 = intrinsic read_first_invocation (ssa_44) ()
vec1 1 ssa_48 = ieq ssa_47, ssa_44
if ssa_48 {
loop {
vec1 32 ssa_49 = intrinsic read_first_invocation (ssa_44) ()
vec1 1 ssa_50 = ieq ssa_49, ssa_44
if ssa_50 {
intrinsic bindless_image_store (ssa_44, ssa_16, ssa_0, ssa_15) (5, 0, 34836, 32) /* image_dim=Buf */ /* image_array=false */ /* format=34836 */ /* access=32 */
break
} else {
....
}
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3bd545764151 ("nir: Add a lowering pass for non-uniform resource access")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 366811bedb67ae7d31a02ea9b1f9fa942fb93602)
-
a1927000
by Jason Ekstrand
at 2019-05-30T09:06:28Z
iris: Don't assume UBO indices are constant
It will be true for the constant/system value buffer because they use a
constant zero but it's not true in general. If we ever got here when
the source wasn't constant, nir_src_as_uint would assert.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 9dc57eebd578b976b94c54d083377ba0920d43a8)
-
92f4a16a
by Jason Ekstrand
at 2019-05-31T08:11:35Z
intel/fs,vec4: Use g0 as the header for MFENCE
We set header_present but then pass it some random garbage. Give it g0
instead. I'm not actually sure this does anything but g0 is the usual
header data and this is what the windows driver does so it seems like a
good idea.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 859de4a74857d2736f6e2dd9d2fd98b92bbc69d9)
-
c2a94577
by Jason Ekstrand
at 2019-05-31T08:13:44Z
intel/fs: Do a stalling MFENCE in endInvocationInterlock()
Fixes: 939312702e "i965: Add ARB_fragment_shader_interlock support"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 9e403dc56e3ab702abc68fd65ed4ab324ba69e69)
-
a13bda49
by Jason Ekstrand
at 2019-05-31T08:15:31Z
nir/dead_cf: Call instructions aren't dead
When we inlined cf_node_has_side_effects into node_is_dead, all the
conditions flipped and we forgot to flip one. Fortunately, it doesn't
matter right now because no one uses this pass on shaders with more than
one function.
Fixes: b50465d197 "nir/dead_cf: Inline cf_node_has_side_effects"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
(cherry picked from commit 8948048c6f01209bac0051e41cd84c38853bd251)
-
fecdcce0
by Jan Zielinski
at 2019-05-31T15:03:55Z
swr/rast: fix 32-bit compilation on Linux
Removing unused but problematic code from simdlib header to fix
compilation problem on 32-bit Linux.
Reviewed-by: Alok Hota <alok.hota@intel.com>
(cherry picked from commit cf673747cefca03c2b672db6788c1ac2af6d9f33)
-
b2c5c166
by Bas Nieuwenhuizen
at 2019-06-03T08:15:53Z
nir: Actually propagate progress in nir_opt_move_load_ubo.
Found with Jasons new metadata rework (https://gitlab.freedesktop.org/mesa/mesa/merge_requests/950).
Fixes: af355aaa071 "nir: add nir_opt_move_load_ubo() optimization pass"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit e24a7840f60ac2290761ea2dc2831e8c3ba8bbfc)
-
90d045f9
by Jonathan Marek
at 2019-06-03T08:20:25Z
freedreno/ir3: fix input ncomp for vertex shaders
ncomp is never set for vertex shaders, but a3xx and a4xx still use it.
Fixes: 831f1a05c0d freedreno/ir3: rework varying packing
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@chromium.org>
(cherry picked from commit 1db86d8b62860380c34af77ae62b019ed2376443)
-
a37f10af
by Rob Clark
at 2019-06-04T15:06:46Z
freedreno/ir3: set more barrier bits
Blob is also setting the .l bit, and it seems to solve some intermittent
failures with a couple of deqp's:
dEQP-GLES31.functional.image_load_store.2d.qualifiers.coherent_r32i
dEQP-GLES31.functional.image_load_store.2d.qualifiers.volatile_r32f
Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit f9fa456e1d09f1a6b2dccde056b3754f3f198ba7)
-
3fce389c
by Rob Clark
at 2019-06-04T15:06:46Z
freedreno/a6xx: fix GPU crash on small render targets
Fixes dEQP-GLES2.functional.multisampled_render_to_texture.readpixels
Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 8eaa2d502131bdce874603f522eabc4a5719f2e6)
-
4524f09c
by Marek Olšák
at 2019-06-04T15:06:46Z
u_blitter: don't fail mipmap generation for depth formats containing stencil
Bugzilla: https://bugzilla.freedesktop.org/show_bug.cgi?id=109754
Cc: 19.0 19.1 <mesa-stable@lists.freedesktop.org>
Tested-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
(cherry picked from commit 4b11ed443b85e4fcddc5d0ef60dec096ecdb951e)
-
8773e202
by Axel Davy
at 2019-06-04T15:06:46Z
d3dadapter9: Revert to old throttling limit value
Recently PIPE_CAP_MAX_FRAMES_IN_FLIGHT was changed from 2
to 1:
20909284f204091757c050aa40cfffaf3f981b9c
No driver seems to overwrite the default value.
One user reports severe regressions for some games.
For now, revert to the value 2 for nine.
Cc: "19.1" mesa-stable@lists.freedesktop.org
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
(cherry picked from commit 5820ac6756898a1bd30bde04555437a55c378726)
-
51998d72
by Timothy Arceri
at 2019-06-04T15:06:46Z
st/glsl: make sure to propagate initialisers to driver storage
This essentially reverts 20234cfe3a20.
Fixes piglit test:
tests/spec/arb_get_program_binary/execution/uniform-after-restore.shader_test
Fixes: 20234cfe3a20 "st/mesa: don't propagate uniforms when restoring from cache"
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110784
(cherry picked from commit fea36a8f43ea010ce0581a63b4b5fa1213a35982)
-
5394f157
by Pierre-Eric Pelloux-Prayer
at 2019-06-04T15:06:46Z
radeonsi: init sctx->dma_copy before using it
Commit a1378639ab19 reordered context functions initializations but broke
sctx->b.resource_copy_region init when using AMD_DEBUG=forcedma.
In this case sctx->dma_copy was assigned a value after being used in:
sctx->b.resource_copy_region = sctx->dma_copy;
This commit moves the FORCE_DMA special case after sctx->dma_copy initialization.
See https://bugs.freedesktop.org/show_bug.cgi?id=110422
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 4583f09caa5aef719a1eec282f24a86c789cbba6)
-
cf6472e7
by Sagar Ghuge
at 2019-06-04T15:06:46Z
intel/compiler: Fix assertions in brw_alu3
v2: Fix assertion for src1 (Ian Romanick)
Fixes: 3b967e17 (intel/compiler: Avoid false positive assertions)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 3016756398c988e965ed189cfd99dc94ddb16626)
-
38927a35
by Samuel Pitoiset
at 2019-06-04T15:06:46Z
radv: do not use gfx fast depth clears for layered depth/stencil images
The driver should only fast depth clears with the graphics path
when the view covers all image layers, otherwise this might
corrupt layers when HTILE is enabled.
Cc: 19.0 19.1 mesa-stable@lists.freedesktop.org
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 8a35eb0602735194f2976000ddff9dca2c8b5741)
-
60688cc3
by Rhys Perry
at 2019-06-05T08:27:14Z
ac/nir: mark some texture intrinsics as convergent
Otherwise LLVM can sink them and their texture coordinate calculations
into divergent branches.
v2: simplify the conditions on which the intrinsic is marked as convergent
v3: only mark as convergent in FS and CS with derivative groups
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 73dda85512942e67991a5fbc3c9a1714e7624d00)
-
96fbd543
by Marek Olšák
at 2019-06-05T08:29:08Z
ac: fix a typo in ac_build_wg_scan_bottom
Cc: 19.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit c9b64b58dee89ac78d38358f7ebd75cf0d6b86dd)
-
2a45ddd4
by Vinson Lee
at 2019-06-05T09:00:53Z
freedreno: Fix GCC build error.
../src/freedreno/vulkan/tu_device.c:900:4: error: initializer element is not constant
.minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 },
^
Suggested-by: Kristian Høgsberg <krh@bitplanet.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110698
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit d4e70be7396b5330fca5b5ece2327a3e1c42b6e7)
-
9d8f104f
by Juan A. Suarez Romero
at 2019-06-05T16:23:45Z
Update version to 19.1.0-rc5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
-
626ea696
by Emil Velikov
at 2019-06-06T08:25:47Z
egl/dri: flesh out and use dri2_create_drawable()
Wrap the loader->createNewDrawable() dance into a helper and use it
throughout the codebase.
This addresses a cases like surfaceless (SL) on swrast (SL on kms_swrast
is fine) where we'd attempt using the wrong driver and crash out.
v2: fixup quirky GBM (Mathias)
v3: fixup GBM for real (Marek)
Cc: mesa-stable@lists.freedesktop.org
Cc: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com> (v2)
Signed-off-by: Marek Olšák <marek.olsak@amd.com> (v2)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 2282ec0ad6581b588f7bdde1211357123316b4b9)
-
a5c864f6
by Deepak Rawat
at 2019-06-06T08:40:58Z
winsys/drm: Fix out of scope variable usage
In this particular instance, struct member were used outside of the
block where it was defined. Fix this by moving the definition outside of
block.
Signed-off-by: Deepak Rawat <drawat@vmware.com>
Fixes: 569f83898768 ("winsys/svga: Add support for new surface ioctl, multisample pattern")
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 828e1b0b4c5eef96a7f9a64010532263430e1f13)
-
971eeb93
by Lionel Landwerlin
at 2019-06-06T08:46:17Z
intel/perf: fix EuThreadsCount value in performance equations
EuThreadsCount is supposed to be the number of threads per EU, not the
total number of threads in the whole device.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1fc7b951278428 ("i965: Add Gen8+ INTEL_performance_query support")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 0430c6d18a90549b1dd40ea29a0c28d1a8e3a47d)
-
90623adb
by Lionel Landwerlin
at 2019-06-06T09:34:23Z
intel/perf: improve dynamic loading config detection
We're currently trying to detect dynamic loading config support by
trying to remove to test config (hard coded in the i915 driver) and
checking we get ENOENT.
This can fail if the test config was updated in Mesa but not yet in
i915.
A better way to do this is to pick an invalid ID and check for ENOENT.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c1621274401b4bd2de7db1f7a813f6bfce8307f8)
-
1f40ef24
by Jason Ekstrand
at 2019-06-06T09:37:29Z
nir/propagate_invariant: Don't add NULL vars to the hash table
Fixes: 8410cf66d "nir/propagate_invariant: Skip unknown vars"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit d96878a66a559f6690f01e82f06fcf92ae958d3c)
-
147d6693
by Nataraj Deshpande
at 2019-06-06T09:41:56Z
anv: Fix check for isl_fmt in assert
Checking isl_fmt returned value in assert seems appropriate
instead of format variable.
Fixes: f1654fa7e31 "anv/android: support creating images from external format"
Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
(cherry picked from commit d6724471a5775cbbeaafff1e1982f322b1d04c94)
-
28b72f51
by Deepak Rawat
at 2019-06-09T16:44:49Z
winsys/svga/drm: Fix 32-bit RPCI send message
Depending on whether compiled with frame-pointer or not, the temporary
memory location used for the bp parameter in these macros are referenced
relative to the stack pointer or the frame pointer.
Hence we can never reference that parameter when we've modified either
the stack pointer or the frame pointer, because then the compiler would
generate an incorrect stack reference.
Fix this by pushing the temporary memory parameter on a known location on
the stack before modifying the stack- and frame pointers.
Also in case of failuire RPCI channel is not closed which lead to vmx
running out of channels.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
(cherry picked from commit 72fc886826e97a547828da427e1a157b83ba5ea0)
-
6f44b7eb
by Charmaine Lee
at 2019-06-09T16:46:05Z
svga: Remove unnecessary check for the pre flush bit for setting vertex buffers
This fixes the missing rebind when the can_pre_flush bit
is not set and the vertex buffers are the same as what have been sent.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Signed-off-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
(cherry picked from commit f29b8fde915728134b2e2b912642fe573d405fcb)
-
7ca66dc0
by Nanley Chery
at 2019-06-09T16:47:13Z
anv/cmd_buffer: Initalize the clear color struct for CNL+
On CNL+, the clear color struct is composed of RGBA channel values and
fields which are either reserved by the HW or used to control
fast-clears. Currently anv initializes the channel values to zero and
allows the other fields to be undefined.
Satisfy the MBZ field requirements by removing an optimization that
doesn't hold true for CNL+ and pulling in the number of dwords to
initialize from ISL.
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit b4198e792c037dccb4d433abc1368bd8cc8d22ee)
-
9f71165a
by Rob Clark
at 2019-06-09T16:49:12Z
freedreno/a6xx: fix issues with gallium HUD
In some cases the draw for the text wasn't working. This seems to be
fixed by resyncing some of the "golded registers" from blob (initial
values were based on somewhat older blob version).
Perhaps good to have a bit of soak time on master, but would be good
to eventually land in 19.x stable branches.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
(cherry picked from commit b820c09fa8d1ce362cac0bc6e71693578d115563)
-
3301eeee
by Rob Clark
at 2019-06-09T16:50:03Z
freedreno/a6xx: fix hangs with newer sqe fw
With the newer (v1.76) fw, we were getting hangs (compared to older
v1.66 fw). Re-work the GMEM code to structure things a bit closer to
the blob. This moves some PKT7 packets from IB2 to IB1, which I think
is what was confusing SQE and causing it to get stuck in an infinite
loop. But in general structuring things at least closer to the same way
blob does makes it easier to compare cmdstream.
Note: this is a bit on the large side for what I'd normally consider for
stable.. but right now it is looking like it is the newer fw that is
headed for linux-firmware. This should defn have some soak time on
master, but probably a good idea for this patch to end up in distro mesa
builds by the time a630_sqe.fw hits linux-firmware.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
(cherry picked from commit 958f6ffb60640c333a8b568c5f41467a1fecd1c0)
-
c025240f
by Eric Engestrom
at 2019-06-09T16:51:36Z
util/os_file: actually return the error read() gave us
Fixes: 316964709e21286c2af5 "util: add os_read_file() helper"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 7e35f20d44321b20777020ad067d39116d142013)
-
84bd3612
by Kenneth Graunke
at 2019-06-09T16:52:59Z
egl/x11: calloc dri2_surf so it's properly zeroed
Commit 2282ec0a refactored drawable creation across various platforms
into a new dri2_create_drawable helper function.
The GBM code in platform_drm.c code passed in dri2_surf->gbm_surf as the
loaderPrivate, while most other backends passed in dri2_surf directly.
To try and handle this, the patch checked if dri2_surf->gbm_surf was
non-NULL, and if so, presumed that the caller is the DRM platform and
we should use the dri2_surf->gbm_surf pointer.
This worked for most platforms, which calloc their dri2_surf structure,
zeroing the data. Unfortunately, platform_x11.c used malloc, leaving
most of the dri2_surf as garbage. In particular, dri2_surf->gbm_surf
was often non-NULL, causing dri2_create_drawable to try and use it,
passing a garbage pointer to the createNewDrawable hook, usually leading
to a SIGBUS or SIGSEGV when trying to dereference that bad pointer.
Since most callers calloc the data, make platform_x11.c follow suit.
Fixes crashes with i915_dri.so when running dEQP-GLES2.
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 4e3297f7d4d87618bf896ac503e1f036a7b6befb)
-
a7a2d403
by Samuel Pitoiset
at 2019-06-11T07:58:06Z
radv: fix alpha-to-coverage when there is unused color attachments
When alphaToCoverage is enabled, we should always write the alpha
channel of MRT0 if it's unused. This now matches RadeonSI.
This fixes the new CTS:
dEQP-VK.pipeline.multisample.alpha_to_coverage_unused_attachment.samples_*.alpha_invisible
Cc: 19.0 19.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl
(cherry picked from commit 91aa25f4625014ddf194578fc1c1d0a505e5f8db)
-
eb532d1a
by Emil Velikov
at 2019-06-11T07:59:38Z
mapi: add static_date offset to MaxShaderCompilerThreadsKHR
As elaborated in the next patch, there is some hidden ABI that
effectively require most entrypoints to be listed in the file.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110302
Cc: Marek Olšák <maraeo@gmail.com>
Fixes: c5c38e831ee ("mesa: implement ARB/KHR_parallel_shader_compile")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 61960547df89809194583b7faf553a64b557ae96)
-
d4797ff1
by Emil Velikov
at 2019-06-11T08:01:57Z
mapi: correctly handle the full offset table
Earlier commit converted ES1 and ES2 to a new, much simpler, dispatch
generator. At the same time, GL/glapi and the driver side are still
using the old code.
There is a hidden ABI between GL*.so and glapi.so, former referencing
entry-points by offset in the _glapi_table. Hence earlier commit added
the full table of entry-points, alongside a marker for other cases like
indirect GL(X) and driver-size remapping.
Yet the patches did not handle things fully, thus it was possible to
get different interpretations of the dispatch table after the marker.
This commit fixes that adding an indicative error message to catch
future bugs.
While here correct the marker (MAX_OFFSETS) comment.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110302
Fixes: cf317bf0937 ("mapi: add all _glapi_table entrypoints tostatic_data.py")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a379b1c0ee31a792bba250cc466ad4b161a610ec)
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d0581242
by Samuel Pitoiset
at 2019-06-11T08:05:33Z
radv: fix setting CB_SHADER_MASK for dual source blending
CB_SHADER_MASK was computed without the second color buffer
format which looks totally wrong to me.
While we are at it, copy a comment from RadeonSI.
Cc: 19.0 19.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit e9316fdfd4899c269a19e106a6ffa4309ae48b27)
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49c17e84
by Bas Nieuwenhuizen
at 2019-06-11T08:11:24Z
radv: Prevent out of bound shift on 32-bit builds.
uintptr_t is 32-bits then and shifting it by 32 bits results in undefined
behavior IIRC.
Fixes: b3c8de1c55c "radv: save all descriptor pointers into the trace BO"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 39c71e002561052d0596200b2d0ebdb8cc39d862)
-
0d2ea312
by Juan A. Suarez Romero
at 2019-06-11T14:22:23Z
Update version to 19.1.0
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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1517811f
by Juan A. Suarez Romero
at 2019-06-11T15:07:39Z
docs: Add release notes for 19.1.0
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>