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ba3eb3c9
by Dylan Baker
at 2019-03-27T17:10:37Z
docs: Add SHA256 sums for mesa 19.0.1
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dc6f00d5
by Jason Ekstrand
at 2019-03-27T18:49:05Z
Revert "anv/radv: release memory allocated by glsl types during spirv_to_nir"
This reverts commit 4e1bbb000cdfe4ba01bee5a6868c54fed7285dae. It turns
out that some DXVK apps due to some implementation detail of DXVK or
other create and destroy instances in an interleaved way. Freeing the
glsl_type memory without being a bit more careful causes use-after-free
issues. Looks like we need to try again.
(cherry picked from commit ce47999ceed7efe010a1b6cc592780514803670a)
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29bfb1af
by Leo Liu
at 2019-03-28T19:14:39Z
radeon/vcn: add H.264 constrained baseline support
VCN supports this profile as well as UVD, so add it
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f8ef8b56a6d2f40772678eabd5d20f14081ad23b)
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a175dffe
by Samuel Pitoiset
at 2019-03-28T19:14:46Z
radv: skip updating depth/color metadata for conditional rendering
I don't think we should update metadata when conditional rendering
is enabled. For some reasons, some CTS breaks only on SI.
This fixes the following CTS on SI:
dEQP-VK.conditional_rendering.draw_clear.clear.depth.*
Cc: 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 6596eb2b3080e8858bee3d89041df068333c250a)
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891c4ff6
by Samuel Pitoiset
at 2019-03-29T15:31:53Z
radv: do not always initialize HTILE in compressed state
Especially when performing a transtion from UNDEFINED->GENERAL,
the driver shouldn't initialize HTILE metadata in compressed
state because it doesn't decompress when the src layout is
GENERAL.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110259
Fixes: 3a2e93147f7 ("radv: always initialize HTILE when the src layout is UNDEFINED")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 62a9d757e6074215c145c9637014d9acb16d865d)
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9987a3d4
by Karol Herbst
at 2019-03-29T15:32:00Z
nir/print: fix printing the image_array intrinsic index
Fixes: 0de003be0363 ("nir: Add handle/index-based image intrinsics")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 6ffc72472cc15368f95b18c1362298dd651bc7f1)
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a1c30b8b
by Eric Engestrom
at 2019-04-01T16:47:34Z
meson: strip rpath from megadrivers
More specifically, use the library file that has been post-processed by Meson
when creating the hardlinks.
Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=108766
Fixes: 3218056e0eb375eeda47 "meson: Build i965 and dri stack"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit aa7afe324c2092fb31f9498cb3eda47dda96e6f2)
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a4d5161d
by Leo Liu
at 2019-04-01T16:47:39Z
radeon/vcn/vp9: search the render target from the whole list
The number of render targets could be more than max of references,
so we search the full list of the render pictures for the current
render target index
https://bugs.freedesktop.org/show_bug.cgi?id=109648
Signed-off-by: Leo Liu <leo.liu@amd.com>
Tested-by: James Zhu <James.Zhu@amd.com>
Acked-by: James Zhu<James.Zhu@amd.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit d4e0fbc92fd08be504f328144c874da47b78e5dc)
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e46e3bfd
by Marek Olšák
at 2019-04-01T16:47:45Z
radeonsi: fix assertion failure by using the correct type
src/gallium/drivers/radeonsi/si_state_viewport.c:196: si_emit_guardband:
Assertion `vp_as_scissor.maxx <= max_viewport_size[vp_as_scissor.quant_mode]
&& vp_as_scissor.maxy <= max_viewport_size[vp_as_scissor.quant_mode]' failed.
The comparison was unsigned, so negative maxx or maxy would fail.
Fixes: 3c540e0a7488 "radeonsi: Fix guardband computation for large render targets"
(cherry picked from commit 3ad2a9b3faa19e29fe1c2a28c712f265ee29423b)
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b7769cdf
by Eric Anholt
at 2019-04-02T16:14:20Z
dri3: Return the current swap interval from glXGetSwapIntervalMESA().
We were caching only the value set with glXSwapIntervalSGI(), missing out
on the default setting of the swap interval by the loader. This fixes
glxgears's warning about being vblank synchronized by default.
Fixes: 9777c4234b0e ("loader: drop the [gs]et_swap_interval callbacks")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit edc7deec42bc5f97d0eae9f910d79c6bc31e05ce)
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d1f4c969
by Eric Anholt
at 2019-04-05T16:07:57Z
v3d: Bump the maximum texture size to 4k for V3D 4.x.
4.1 and 4.2 both have the same 16k limit, but it I'm seeing GPU hangs in
the CTS at 8k and 16k. 4k at least lets us get one 4k display working.
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 62360e92ec97d59389330a5aeb070416523da774)
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73bc3248
by Eric Anholt
at 2019-04-05T16:08:03Z
v3d: Don't try to use the TFU blit path if a scissor is enabled.
We'll need to do a render-based blit for scissors, since the TFU (as seen
in this conditional) can only update a whole surface.
Fixes: 976ea90bdca2 ("v3d: Add support for using the TFU to do some blits.")
Fixes piglit fbo-scissor-blit.
(cherry picked from commit 4c70f276bc043f5d1a7647b8fbbb41100e051e69)
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b4936868
by Caio Marcelo de Oliveira Filho
at 2019-04-08T16:30:03Z
nir: Take if_uses into account when repairing SSA
If a def is used as an condition before its definition, we should also
consider this a case to repair. When repairing, make sure we rewrite
any if conditions too.
Found in while inspecting a SPIR-V conversion from a 'continue block'
that contains a conditional branch. We pull the continue block up to
the beggining of the loop, and the condition in the branch ends up
defined afterwards.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 364212f1ede4b "nir: Add a pass to repair SSA form"
(cherry picked from commit c037dbb0efad573aab1467befd35d2c4f4cdbbce)
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57b7dbbb
by Lionel Landwerlin
at 2019-04-09T15:35:49Z
intel: add dependency on genxml generated files
Drivers using genxml will start compilation before generated files are
created, so add a dependency to it.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 48e48b8560ae6ad1728ced54f8f8f5245b3e99cf)
Conflicts resolved by Dylan
Conflicts:
src/gallium/drivers/iris/meson.build
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20db3b0e
by Boyuan Zhang
at 2019-04-09T15:36:40Z
st/va: reverse qt matrix back to its original order
The quantiser matrix that VAAPI provides has been applied with inverse z-scan.
However, what we expect in MPEG2 picture description is the original order.
Therefore, we need to reverse it back to its original order.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110257
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit d507bcdcf26b417dea201090165af651253b6b11)
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34975916
by Dylan Baker
at 2019-04-11T03:30:30Z
VERSION: bump version for 19.0.2
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2964ee3a
by Dylan Baker
at 2019-04-11T03:34:09Z
docs: Add release notes for 19.0.2
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92ee867e
by Timo Aaltonen
at 2019-04-11T08:09:17Z
Merge branch 'upstream-experimental' into debian-experimental
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13ad2e91
by Timo Aaltonen
at 2019-04-11T08:09:57Z
bump the version
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81f580ea
by Timo Aaltonen
at 2019-04-11T08:50:37Z
release to experimental