[Date Prev][Date Next] [Thread Prev][Thread Next] [Date Index] [Thread Index]

[Git][xorg-team/xserver/xorg-server][ubuntu] dri2-Sync-i965_pci_ids.h-from-Mesa.patch: Update i965_pci_ids.h to include…



Title: GitLab

Timo Aaltonen pushed to branch ubuntu at X Strike Force / xserver / xorg-server

Commits:

3 changed files:

Changes:

  • debian/changelog
    1
    +xorg-server (2:1.19.6-1ubuntu3) UNRELEASED; urgency=medium
    
    2
    +
    
    3
    +  * dri2-Sync-i965_pci_ids.h-from-Mesa.patch: Update i965_pci_ids.h to
    
    4
    +    include latest CFL. (LP: #1753954)
    
    5
    +
    
    6
    + -- Timo Aaltonen <tjaalton@debian.org>  Thu, 08 Mar 2018 09:27:43 +0200
    
    7
    +
    
    1 8
     xorg-server (2:1.19.6-1ubuntu2) bionic; urgency=medium
    
    2 9
     
    
    3 10
       * improve-outputclass.diff: Backport commits from upstream to improve
    

  • debian/patches/dri2-Sync-i965_pci_ids.h-from-Mesa.patch
    1
    +From 90e0cdd42dfda2accfadffa5c550712696902e14 Mon Sep 17 00:00:00 2001
    
    2
    +From: Rodrigo Vivi <rodrigo.vivi@intel.com>
    
    3
    +Date: Wed, 7 Mar 2018 07:46:20 -0800
    
    4
    +Subject: [PATCH] dri2: Sync i965_pci_ids.h from Mesa.
    
    5
    +
    
    6
    +Copied from Mesa with no modifications.
    
    7
    +
    
    8
    +Gives us Geminilake and Kaby Lake platform names updates and
    
    9
    +sync on Coffee Lake PCI IDs.
    
    10
    +
    
    11
    +Cc: Timo Aaltonen <timo.aaltonen@canonical.com>
    
    12
    +Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
    
    13
    +Reviewed-by: Adam Jackson <ajax@redhat.com>
    
    14
    +---
    
    15
    + hw/xfree86/dri2/pci_ids/i965_pci_ids.h | 26 +++++++++++++++++---------
    
    16
    + 1 file changed, 17 insertions(+), 9 deletions(-)
    
    17
    +
    
    18
    +diff --git a/hw/xfree86/dri2/pci_ids/i965_pci_ids.h b/hw/xfree86/dri2/pci_ids/i965_pci_ids.h
    
    19
    +index 57e70b7ae..feb9c582b 100644
    
    20
    +--- a/hw/xfree86/dri2/pci_ids/i965_pci_ids.h
    
    21
    ++++ b/hw/xfree86/dri2/pci_ids/i965_pci_ids.h
    
    22
    +@@ -151,7 +151,7 @@ CHIPSET(0x590B, kbl_gt1, "Intel(R) Kabylake GT1")
    
    23
    + CHIPSET(0x590E, kbl_gt1, "Intel(R) Kabylake GT1")
    
    24
    + CHIPSET(0x5913, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
    
    25
    + CHIPSET(0x5915, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
    
    26
    +-CHIPSET(0x5917, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
    
    27
    ++CHIPSET(0x5917, kbl_gt2, "Intel(R) UHD Graphics 620 (Kabylake GT2)")
    
    28
    + CHIPSET(0x5912, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
    
    29
    + CHIPSET(0x5916, kbl_gt2, "Intel(R) HD Graphics 620 (Kaby Lake GT2)")
    
    30
    + CHIPSET(0x591A, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
    
    31
    +@@ -160,22 +160,30 @@ CHIPSET(0x591D, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
    
    32
    + CHIPSET(0x591E, kbl_gt2, "Intel(R) HD Graphics 615 (Kaby Lake GT2)")
    
    33
    + CHIPSET(0x5921, kbl_gt2, "Intel(R) Kabylake GT2F")
    
    34
    + CHIPSET(0x5923, kbl_gt3, "Intel(R) Kabylake GT3")
    
    35
    +-CHIPSET(0x5926, kbl_gt3, "Intel(R) Iris Plus Graphics 640 (Kaby Lake GT3)")
    
    36
    +-CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 (Kaby Lake GT3)")
    
    37
    ++CHIPSET(0x5926, kbl_gt3, "Intel(R) Iris Plus Graphics 640 (Kaby Lake GT3e)")
    
    38
    ++CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 (Kaby Lake GT3e)")
    
    39
    + CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4")
    
    40
    +-CHIPSET(0x3184, glk,     "Intel(R) HD Graphics (Geminilake)")
    
    41
    +-CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)")
    
    42
    ++CHIPSET(0x3184, glk,     "Intel(R) UHD Graphics 605 (Geminilake)")
    
    43
    ++CHIPSET(0x3185, glk_2x6, "Intel(R) UHD Graphics 600 (Geminilake 2x6)")
    
    44
    + CHIPSET(0x3E90, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
    
    45
    + CHIPSET(0x3E93, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
    
    46
    +-CHIPSET(0x3E91, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
    
    47
    +-CHIPSET(0x3E92, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
    
    48
    ++CHIPSET(0x3E99, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
    
    49
    ++CHIPSET(0x3EA1, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
    
    50
    ++CHIPSET(0x3EA4, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
    
    51
    ++CHIPSET(0x3E91, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
    
    52
    ++CHIPSET(0x3E92, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
    
    53
    + CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
    
    54
    +-CHIPSET(0x3E9B, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
    
    55
    ++CHIPSET(0x3E9A, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
    
    56
    ++CHIPSET(0x3E9B, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
    
    57
    + CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
    
    58
    ++CHIPSET(0x3EA0, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
    
    59
    ++CHIPSET(0x3EA3, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
    
    60
    ++CHIPSET(0x3EA9, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
    
    61
    ++CHIPSET(0x3EA2, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
    
    62
    ++CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
    
    63
    + CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
    
    64
    + CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
    
    65
    + CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
    
    66
    +-CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
    
    67
    + CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
    
    68
    + CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
    
    69
    + CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
    
    70
    +-- 
    
    71
    +2.15.1
    
    72
    +

  • debian/patches/series
    ... ... @@ -26,3 +26,4 @@ xmir.patch
    26 26
     xi2-resize-touch.patch
    
    27 27
     xwayland-tablet.diff
    
    28 28
     improve-outputclass.diff
    
    29
    +dri2-Sync-i965_pci_ids.h-from-Mesa.patch


  • Reply to: